JPS6334113Y2 - - Google Patents

Description

[Detailed description of the invention] The present invention uses the suction force of a solenoid to bring the mechanism into a predetermined operating state, and also allows the formation of a recording (REC) pose or play pose to be performed in one step.
This relates to a tape recorder that allows key input.

In such a tape recorder, the mechanism can be put into a predetermined operating state by a feather touch operation, and moreover, for example, creating a REC pause state, which conventionally required two operations, REC and pause, can be performed with one operation. This is intended to improve operability, but in addition to the stop, play, fast forward (FF), rewind (REW), and REC operation keys, a REC pause key or play pause key is generally provided.
For example, depending on the operation of the REC pause key,
It is designed to operate the REC solenoid and the pause solenoid.

Such a tape recorder also has a control provided corresponding to each operation key, having a memory means that is set and sends an output by operation of the corresponding key, and reset by operation of another key. However, since it takes time for the solenoid to operate and for the mechanism to be set to the predetermined operating state (mode), the control circuit is designed not to accept the next operation key input until the switching of the operating mode is completed. It's getting old. However, in the case of pause, due to the nature of the function, it is meaningless unless the pause state can be created immediately when you want to enter the pause state, and even if the operation is delayed for a moment, there will be an inconvenience that an extra tape will be recorded or played. The circuit is designed to accept pause input at any time as an exception.

However, with such conventional tape recorders,
As shown in Figure 1a, in response to REC key input A
REC solenoid is operated B, and after the operation is completed
When there is a REC pause key input C, the REC solenoid is operated B in response to the REC key input A as shown in Figure 1b, and in the process of this operation the REC solenoid is activated.
When there is a pause key input C, the REC solenoid and pause solenoid are operated B' and D, respectively, in response to the REC pause key input C. For this reason, the REC solenoid is operated more than necessary to carry out a predetermined operation, and this poses a problem of shortening the battery life, especially in radio-cassette players that use batteries as a power source. Such a problem also occurs when switching the mechanical section from the play state to the play pause state.

In order to solve the above problems, for example,
Even if there is a REC pause key input when there is already a REC key input, the REC pause key input will not be
It is possible to prevent the REC solenoid from operating, but for example, simply installing a gate to block the REC solenoid operation signal in response to the REC pause key input will cause the REC solenoid to operate as shown in Figure 1c. When the REC pause key is input during the solenoid operation process, the control circuit
When the memory circuit corresponding to the REC key is reset, the operation of the REC solenoid ends prematurely as shown by E, resulting in another problem in that the REC pause state cannot be formed.

This invention was made in view of the above points,
The purpose is to use one key input to
To provide a tape recorder capable of forming a REC pause or a play pause state, in which a REC solenoid or a play solenoid can be operated in just the right amount.

Hereinafter, the present invention will be explained with reference to the illustrated embodiments.

FIG. 2 shows an embodiment of the tape recorder according to the present invention. In the figure, S ₁ to S ₆ are always open momentary switches: stop key, play key, FF (fast forward) key, REW (rewind) key,
A REC key and a REC pause key are connected between the + power supply and the control circuit 10.

The control circuit 10 is provided corresponding to each key, and is set by turning on the corresponding key to send out a high-level output, and is reset by turning on another key to output an L-level output.The control circuit 10 is composed of, for example, a flip-flop. Equipped with storage means. The storage means, except for the one corresponding to the REC pause key _S6 , is not set even if the next key operation is performed until the mechanism section 20 completes a predetermined operation corresponding to each key operation.

The outputs corresponding to the keys S ₁ to S ₆ of the control circuit 10 are directly connected to one of the AND gates G ₁ to G ₆ via the inverters I ₁ to I ₆ to the clear inputs of the flip-flops F/F ₁ to F/F ₆ . are connected to the respective inputs. Flip-flops F/F ₁ to F/F ₆ are connected to the other inputs of AND gates G ₁ to G ₆ .
output is connected. Therefore, the outputs of the AND gates G ₁ to G ₆ are output from the control circuit 10.
The corresponding output goes from L to H by going from L to H, and the flip-flops F/F ₁ to F/F ₆ are inverted by the rising signal to their clock input and the output goes from H to L. By H
to L, and sends out a pulse output with a constant width.

The outputs of the above AND gates G ₁ to G ₄ and G ₆ are:
It is directly connected to the stop, play, FF, REW, and pause inputs of the mechanism section 20, but the output of the AND gate _G5 is connected to the mechanism through an AND gate _G7 , an AND gate _G8 , and an OR gate _G9, respectively. The pause release input and the REC input of the unit 20 are connected to each other.

The AND gates _G7 and _G8 are controlled by the states of the Q output and the output of the flip-flop F/ _F7 connected to the other input, respectively. The other input of the above OR gate G ₉ has an AND gate G ₆ on one input.
The output of the flip-flop F/ is connected to the other input.
The outputs of F ₈ are connected and the outputs of G ₁₀ are connected, respectively, and the AND gate
The output of _G6 is selectively applied to the REC input of the mechanism section 20 via an AND gate _G10 and an OR gate _G9 under the control of a flip-flop F/ _F8 .

The mechanism section 20 has stop, play, FF, REW, pause release, REC, and pause solenoids that operate in response to H-level signals applied to their inputs to generate suction force. It is designed to be set to a predetermined state by operation. The mechanism section 20 also includes a first switch SW ₁ that is turned on when the stop, play, FF, REW, pause release, and REC solenoids are activated and their respective states are set, and a pause solenoid that is activated. and a second switch SW ₂ that is turned on when the state is set, and when the first and second switches SW ₁ and SW ₂ are turned on, the signal lines L ₁ and L ₂ are connected, respectively. It is designed to send out a switching operation detection signal.

The signal line L ₁ is connected to the clock input of flip-flops F/F ₁ to F/F ₅ and F/F ₈ , and the signal line L ₂
are respectively connected to the clock inputs of flip-flop F/F ₆ , and each flip-flop connects signal lines L1 and _F6 when the clear input is low.
The level of _L2 is inverted by rising from L to H.

Note that the D inputs of flip-flops F/F ₁ to F/F ₆ and F/F ₈ are connected to the + power supply,
The D input of flip-flop F/F ₇ is connected to the pause output of control circuit 10. The clear input and clock input of flip-flop F/F ₇ are connected to the Q output of flip-flop F/F ₅ and the Q output of flip-flop F/F ₆ , respectively. On the other hand, the clear input of the flip-flop F/F ₈ is connected to the output of an OR gate _G11 whose inputs are connected to the stop, play, FF, and REW outputs of the control circuit 10, respectively.

The operation of the tape recorder configured as above will be explained below.

Assuming that the tape recorder is now in the stop state, the stop output of the control circuit 10 is H,
The output of flip-flop F/ _F1 is set to L. In such a state, for example, if you turn on the play key _S2 , the stop output of the control circuit goes to L and the play output goes to H, so flip-flop F/F ₁ is cleared and its output goes to H. At the same time, the output of AND gate _G2 becomes H. The H output of the AND gate _G2 operates the play solenoid of the mechanism section 20. When the mechanism section 20 enters the play state due to the operation of this play solenoid, the switch SW ₁ is turned on and the signal line L ₁ becomes H, so that the flip-flop F/F ₂ whose clear input is at L at this time is inverted and its output changes from H to L
become. For this reason, and gate G ₂ is closed,
The output changes from H to L and the play solenoid stops operating.

The above-mentioned operation is performed when the mechanism section 20 performs REC or
The same operation is performed when the stop key S ₁ , play key S ₂ , FF key S ₃ and REW key S ₄ are turned on while in a certain state other than the REC pause, and when each key is operated, an AND gate is activated. A pulse output with a constant width is generated at the outputs of _G1 to _G4 , and each solenoid is operated by this pulse output.

Next, the operation when the REC key or REC pause key is turned on and then the REC pause key or REC key is turned on while the mechanism unit 20 is in a state other than REC or REC pause will be described with reference to the operation waveform diagrams of Figures 3a and 3b.

Now, when there is a REC key input A as shown in FIG. 3a in response to the operation of the REC key _S5 , the REC output a of the control circuit 10 rises to H.
At this time, since the output of flip-flop F/F ₅ is H, and the Q output and output of flip-flop F/F ₇ are L and H, respectively, the H output of the control circuit 10 is output from the AND gate.
After passing through _G5 and _G8 , the output g of OR gate _G9 becomes H
level, and the REC solenoid of the mechanism section 20 is activated. When the mechanism section 20 enters the REC state due to the operation of this REC solenoid, the switch SW ₁ is turned on and the signal line L ₁ becomes H level, thereby causing the flip-flop F/F ₅ to turn on.
is inverted, and its output c changes from H to L. Therefore, the output of AND gate G ₅ becomes L, and accordingly, the output g of OR gate G ₉ also becomes L.
REC solenoid stops operating.

When the REC key _S5 is operated as described above, the stop, play, FF, or REW output of the control circuit 10, which may have been high until then, becomes low.
Since all the inputs of OR gate _G11 become L, the signal line _L1 becomes H, flip-flop F/F ₈ is inverted, and its output f becomes H.
It falls from L to L.

As described above, when the mechanism section 20 is in the REC state, when there is a REC key input C in response to the operation of the REC pause key S ₆ , the REC output a of the control circuit 10 becomes L and the REC pause output is activated. b becomes H. Therefore, the clear input of flip-flop F/F ₅ rises from L to H, which clears flip-flop F/F ₅ , causing its output to go from L to H, causing the Q output to go to H.
becomes L. At this time, the control circuit 10
The REC pause output b passes through the AND gate G ₆ to which the output of the flip-flop F/F ₆ which is H is added, so the output h of the AND gate G ₆ becomes H and the pause solenoid of the mechanism section 20 is activated. It will start working. However, at this time, since the output f of the flip-flop F/ _F8 is L, the output h of the AND gate _G6 , which is H, does not pass through the AND gate _G10 , and the REC solenoid does not operate.

When the pause solenoid operates as described above and finishes its operation, the mechanism section 20
Since it is in REC state, it is combined with this
While forming the REC pause state, an H level pulse is generated on the signal line _L2 by turning on the switch _SW2 upon completion of the operation of the pause solenoid. The pulse of this signal line _L2 is the flip-flop F/
It is applied to the clock input of _F6 , and its rising edge inverts the flip-flop F/ _F6 . As a result, the Q output and output d of flip-flop F/F ₆ become H and L, respectively, and the AND gate
When G ₆ is closed and its output h becomes L,
Flip-flop F/ _F7 is inverted and its Q output e and output become H and L, respectively. Therefore, no extra current flows through the pause solenoid that has completed its predetermined operation. Note that the reason why the Q output e of the flip-flop F/F ₇ which is H is added to the input of the AND gate G ₇ at this time is to prepare for a later pause release, and this point will be described later.

As is clear from the above operation, even if the REC pause key S ₆ is operated after the mechanism section 20 is placed in the REC state by operating the REC key S ₅ , the REC
The solenoids and pause solenoids are not energized with more current than is necessary to establish a predetermined state through their respective operations.

Next, the operation when only the pause state is canceled once the REC pause state is set will be explained with reference to FIG. 3b.

Now, when there is a REC pause key input C in response to the operation of the REC pause key _S6 , the REC pause output b of the control circuit 10 rises to H. At this time, since the Q outputs d and f of flip-flops F/F ₆ and F/F ₈ are both at H, the output b of the control circuit 10 passes through the AND gate G ₆ and appears at its output h, and Further, pass through AND Gate G ₁₀ and OR Gate G ₉ to reach OR Gate.
Since it appears in the output of _G9 , the REC solenoid and pause solenoid of the mechanism section 20 are operated simultaneously. When the mechanism section 20 reaches a predetermined operating state due to the operation of both solenoids, the switch SW ₁
And SW ₂ is turned on, and an H pulse is sent to the signal lines L ₁ and L ₂ . Therefore, flip-flops F/F ₆ and F/F ₈ are inverted by the rise of this pulse, and flip-flops F/F ₆
The Q output and the output d of the flip-flop F/F 8 become H and L, respectively, and the output f of the flip-flop F/F ₈ becomes L.
By this, the Q of flip-flop F/F ₇ is
As output e and output become H and L, respectively, AND gates G ₆ and G ₁₀ are closed. As a result, the output h of AND gate G ₆ and the output g of OR gate G ₉ both become L, and further
Current no longer flows to the REC solenoid and pause solenoid.

When the REC pause state is formed as described above, when there is a REC key input A in response to the operation of the REC key S ₅ , the REC of the control circuit 10 is activated.
Output a rises to H. This H output is an AND gate
Since it passes through _G5 and _G7 and appears at the output i of the AND gate _G7 , the pause release solenoid of the mechanism section 20 is activated. When the pause release operation is completed, switch SW ₁ is turned on and an H pulse is generated on signal line L ₁ , so flip-flop F/
_F5 is inverted and its Q output and output c become H and L, respectively. For this reason, andgate G ₅
is closed, the output i of AND gate _G7 becomes L, and the operation of the pause release solenoid is stopped. At the same time, flip-flop F/F ₇ is cleared by the Q output of flip-flop F/F ₅ , which causes the Q output e and the output of flip-flop F/F ₇ to become L and H, respectively, and the AND gate G ₇ and G ₈ will be closed and opened respectively.
Furthermore, the pulse on the signal line _L1 mentioned above is also applied to the clock input of flip-flop F/ _F8 , so
Flip-flop F/ _F1 is inverted again and its output changes from L to H, closing AND gate _G10 .
From the above operations, when in the REC pause state
It can be seen that by operating the REC key _S5 , only the pose is canceled and the mechanism section 20 is placed in the REC state.

Finally, in the process of REC operation, press the REC pause key S ₆
The operation when the switch is turned on will be explained with reference to the operation waveform diagram in FIG. 3c.

REC key input A according to the operation of REC key S ₅ now
If there is, then as described above with respect to Figure 3a,
The REC output a of the control circuit 10 and the output g of the OR gate _G9 rise from L to H, and the REC solenoid of the mechanism section 20 starts operating.
REC before the operation of this REC solenoid ends.
When there is a REC pause key input B in response to the operation of the pause key S ₆ , the REC in the control circuit 10
The storage means corresponding to key S ₅ is reset,
REC output a changes from H to L. However, at this time, the REC pause output b of the control circuit 10 becomes H, which appears at the output g of the OR gate G9 via the AND gates _G6 and _G10 and _{the OR gate G9 ,} so the output g continues to be H and the REC solenoid continues to operate. Also, the output h of the AND gate _G6 , which becomes H at this time, operates the pause solenoid.

Since the REC solenoid starts its operation earlier than the pause solenoid, its operation is completed first and switch SW ₁ is turned on first. This causes an H pulse to appear on the signal line _L1 , which inverts the flip-flop F/ _F8 and changes its output f from H to L. For this reason, andgate
_G10 is closed, the output g of OR gate _G9 becomes L, and the operation of the REC solenoid is stopped.

After that, when the pause solenoid completes its predetermined operation, switch SW ₂ is turned on and an H pulse is sent to signal line L ₂ , so flip-flop F/
_F6 is inverted and its Q output and output d become H and L, respectively, and accordingly, the AND gate
The output h of _G6 becomes L and the operation of the pause solenoid is stopped. Also, flip-flop F/
_F7 is inverted by the Q output of flip-flop F/ _F6 , and its Q output e and output are respectively H.
and L, the AND gates _G7 and _G8 are opened and closed, respectively. This and gate G ₇
The open state is formed in order to release the pause by operating the REC key _S5 later.

As is clear from the above explanation, even if the REC pause key is input while the REC solenoid is operating,
The REC solenoid is operated in just the right amount and stops its operation when it completes its predetermined operation.

In addition, in the above-mentioned embodiment, the tape recorder is
Although only a REC pause key is provided, if a play pause key is provided in place of the REC pause key, the play key S ₂ and REC key S ₅ may be replaced, and the REC pause key may be replaced with a play pause key. Further, if a play pause key is provided in addition to the REC pause key, the circuit related to the REC pause key shown in FIG. 2 may also be provided for the play pause key.

As described above, the present invention prevents the REC or play solenoid that has completed its predetermined operation from operating any further, so that the REC or play solenoid is operated in just the right amount, especially for radio-cassette players powered by batteries. A suitable tape recorder is obtained.

[Brief explanation of the drawing]

1A to 1C are operational waveform diagrams for explaining the problems of the conventional tape recorder, FIG. 2 is a block diagram showing an embodiment of the tape recorder according to the present invention, and FIGS. FIG. 3 is an operation waveform diagram for explaining the operation of the tape recorder shown in FIG. 2; S ₅ ... REC key, S ₆ ... REC pause key,
SW ₁ ... Switch (detection means), F/F ₈ ... Flip-flop (memory circuit), G ₁₀ ... AND gate (gate circuit).

Claims (1)

[Claims for Utility Model Registration] A key input section having at least a stop key and a REC or play key and a REC pause or play pause key, and a state specified by the key in response to the operation of any key of the key input section. a control circuit that outputs a control signal for switching the tape recorder until another key is operated; a drive means that outputs a drive signal for switching the mechanism of the tape recorder according to the control signal from the control circuit; a first detecting means for detecting the end of the switching operation of the mechanical section excepting; a second detecting means for detecting the end of the switching operation of the mechanical section to the pose state; and a detection from the first detecting means. Output control for controlling the output of a drive signal from the drive means to solenoids other than the pause solenoid based on the signal, and controlling the output of the drive signal from the precursor drive means to the pause solenoid based on the detection signal from the second detection means. a drive source having at least a REC or play solenoid and a pause solenoid that are actuated by a drive signal from the drive means and put the mechanical parts into a REC or play state and a pause state, respectively; a storage means which is set to a first state in response to a detection signal from the first detection means and a second state in response to a detection signal from the first detection means; The drive signal that drives the solenoid
1. A tape recorder comprising: gate means that enables application to a REC or play solenoid;