JPS6333871A - Field-effect thin-film transistor - Google Patents

Abstract

PURPOSE:To change a first solid layer having a narrow band gap into a polycrystal, and to improve the mobility of the first solid layer by projecting electromagnetic waves, such as light, microwaves or the like or radiation such as electron rays or applying heat in the process or last step of laminating. CONSTITUTION:Two kinds of solid layers, first solid layers 1, 3, 5, 7 and solid layers 2, 4, 6, 8 are alternately laminated continuously, and the first solid layers 1, 3, 5, 7 are turned into polycrystals by projecting electromagnetic waves, such as light, microwaves or the like or radiation such as electron rays regarding the first solid layers in the process of laminating or at the last step of laminating. Accordingly, the electron mobility of the first solid layers 1, 3, 5, 7 can be increased to a value which has not been acquired by an amorphous material, thus largely improving electron mobility as the whole multilayer structure, then lowering threshold voltage to a preferable level.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of the Invention] The present invention relates to a field effect thin film transistor with improved functionality, particularly to a field effect thin film transistor suitable for use at high speeds.

[Description of prior art]

In a thin film transistor (TPT), which is a field effect transistor (FET) made of a thin film, a two-layer structure consisting of a repeating first solid layer and second solid layer of a semiconductor or insulator is used in the semiconductor path in hopes of achieving high-speed operation. A field effect thin film transistor using a multilayer material formed by stacking the above layers is known.

In such a field effect thin film transistor, the first
The solid layer and the second solid layer are made of GaAs/AI! Some devices are made using crystalline semiconductors such as GaAs, and although they are capable of high-speed operation, there are problems in that the selection range of substrates is narrow, the manufacturing process is complicated, and it is difficult to increase the area.

However, due to recent advances in amorphous semiconductor technology,
A field effect thin film transistor has been proposed in which the first solid layer and the second solid layer of the multilayer material are formed of a non-single crystal material, particularly an amorphous material. Regarding this,
Compared to crystalline semiconductors, it has been attracting attention and being evaluated because it has manufacturing advantages such as wide substrate selectivity, simple manufacturing process, and ease of increasing the area, but its practicality is as follows. It is not enough that there are problems,
A solution to this problem is desired.

That is, a field effect thin film transistor formed using a multilayer material using a non-single crystal material, especially an amorphous material, has a small value of electron mobility (μ) in the amorphous material.
Since the threshold voltage (Vtk) is high, there is a problem in that the speed cannot be increased when a crystalline semiconductor is used.

[Purpose of the invention]

The present invention eliminates the above-mentioned problems related to field-effect thin film transistors, has no particular restrictions on substrate selection, and can easily be made to have a large area through a simple manufacturing process, which meets the requirements of the transistor. An object of the present invention is to provide a field-effect thin film transistor having a stacked structure including a solid layer made of a non-single-crystalline material and a solid layer made of a polycrystalline material, which has excellent structural characteristics.

[Structure of the invention]

The present invention eliminates the above-mentioned problems associated with conventional field-effect thin film transistors and achieves the above-mentioned objects of the present invention. The layer is a solid layer composed of a material in a polycrystalline state, and the other layer is a solid layer composed of a non-single crystal material, and the two types of solid layers are laminated to improve the improvement. The present invention relates to an improved field effect thin film transistor which has high electron mobility, can lower the threshold voltage to a desirable level, and can operate at high speed as a field effect thin film transistor.

The field effect thin film transistor of the present invention has been developed from the viewpoint of solving the above-mentioned problems with respect to the conventional field effect thin film transistor having a multilayer amorphous material structure used in the conventional semiconductor path portion and from the viewpoint of achieving the above object of the present invention. The present inventor has completed the above-mentioned knowledge as a result of intensive research.

In the conventional method, that is, in a field effect thin film transistor having a conventional multilayer amorphous material structure, the first solid layer with the narrower bandgap, which determines the electron mobility of the entire constituent layer material, is also made of amorphous material. Therefore, the electron mobility is lower than that of crystalline semiconductors, and the threshold voltage is high. When we tried irradiating electromagnetic waves such as microwaves, radiation such as electron beams, and applying heat, in each case, the first solid layer became polycrystalline, and the first solid layer became polycrystalline. As a result, the electron mobility of the first solid layer can be improved to a value that could not be obtained with an amorphous material, and the electron mobility of the multilayer structure as a whole is greatly improved, reaching a threshold value. It has been found that the value voltage can be lowered to a preferable level, and furthermore, from these facts, it has been found that the operation of such a field effect thin film transistor can be sufficiently adapted to high speed operation.

The field effect thin film transistor of the present invention will be further explained below with reference to the drawings.

FIG. 1 is an explanatory diagram of the energy band of an example of a field effect thin film transistor of the present invention, and in the figure, E
v represents the upper end of the valence band, EF represents the Fermi level, and EC represents the lower end of the conduction band, and the horizontal axis represents the layer thickness.

The thin film transistor of the present invention having the energy band shown in FIG. In, 1°3.5,7. . . . indicates the first solid layer, 2° 4.6, 8.・・・・・・・・・
. . indicates the second solid layer, and ■.1. φ1 indicates the band gap and electron affinity of the first solid layer, respectively, and vt3
φ2 represents the band gap and electron affinity of the second solid layer, respectively.

In the thin film transistor of the present invention, the thickness d1 of the first solid layer is 5 to 500, the thickness d2 of the second solid layer is 50 to 1000, and the electron affinity of the first solid layer is φ, and the electron affinity φ2 of the second solid layer φ, −
By setting φ2 to 1 eV or more, a well that can be quantum mechanically confined is formed in the first solid layer,
The electrons are thereby bound to the first solid layer.

Therefore, the electron density of the first solid layer increases.

In this case, during the lamination process or at the final stage of the lamination, the first solid layer is irradiated with light, electromagnetic waves such as microwaves, or radiation such as electron beams, or heat is applied to polycrystallize the core layer.

Incidentally, the above-mentioned "layering process" refers to a time point after the first solid layer is deposited and the second solid layer is deposited.

Therefore, lamination is carried out by repeating a cycle of depositing a first solid layer, then depositing a second solid layer, and then irradiating with radiation or heating.

Moreover, the "final stage of lamination" means the point in time after the lamination operations of the first solid layer and the second solid layer are all completed.

By irradiating with radiation or heating during the layering process or at the final stage, in both cases, compared to the case where irradiation with radiation or heating is performed immediately after depositing the first solid layer, , the interface with the second solid layer can be made flat, and the first solid layer can be easily polycrystallized by receiving energy from the interface with the second solid layer.

Here, the constituent material of the first solid layer is Si.

Semiconductor materials such as 5iGe and Ge can be used. In addition, the constituent materials of the second solid layer include SiC, S
A semiconductor or insulator material with a wider band gap than the material used for the first solid layer, such as tN, 5to2+ BN, BP, or AIN, can be used.

When the first solid layer is polycrystallized by irradiation with electromagnetic waves or radiation or by applying heat, preferably 1
00 Å or more, more preferably 500 Å or more, optimally 1
It is desirable to use polycrystals with a grain size of 000 Å or more. The irradiation conditions or heating conditions for electromagnetic waves or radiation necessary for polycrystallization having the above-mentioned grain size vary depending on the material used, but for example, when using a halogen lamp, it is preferable that the irradiated part of the sample for more than 5 seconds, 6
Polycrystals having the above-mentioned grain size can be obtained by heating the temperature at 1000° C. or higher for 10 seconds or more, preferably 10 seconds or more. When using an electron beam, preferably an accelerating voltage of 5 kV or more, a beam current of 0.5+wA or more, a scanning speed of 100 cm/sec or less, and a beam diameter of 500 nm or less, more preferably an accelerating voltage of 10 kV or more and a beam current of 1. Irradiation is performed under the conditions of 0 mA or more, a scanning speed of 20 cm/sec or less, and a beam diameter of 100 nm or less. Furthermore, when heating using a linear heater, the lower fixed heater is preferably kept at 500°C or higher, more preferably 800°C or higher,
The upper moving heater is preferably moved at a temperature of 1000° C. or higher, more preferably 1400° C. or higher, at a distance of 10 m or less from the sample surface and at a speed of 511/SeC or lower parallel to the sample surface.

Furthermore, when using a laser, the output is preferably IW or more, preferably 5W or more, and the substrate temperature is lowered to 200
℃ or higher, and narrow the beam diameter to preferably 500° or less, more preferably 100° or less, preferably 50cm/
Scanning is performed at a speed of sec or less, more preferably loam/sec or less. By performing electromagnetic wave or radiation irradiation or heating under the above conditions, the first solid layer can be polycrystallized to a desired grain size. The number of laminated layers is preferably 201i or more, more preferably 40 or more,
The optimal number of layers is 60 or more.

〔Example〕

Hereinafter, the present invention will be explained in more detail using Examples.
The present invention is not limited to these.

1"1 In this example, a field effect thin film transistor was manufactured using the multilayer structure film of the present invention in a semiconductor passage section.

FIG. 2 is a cross-sectional view schematically showing the field effect thin film transistor.

In the figure, 51 is a forming substrate made of an insulator such as glass, and 52 is an electrode formed on the forming base +5.51. The cough bridge 52 is formed of heat-resistant molybdenum, tungsten, or the like, or Si(n'') with a high impurity concentration, and is etched in consideration of irradiating or heating the multilayer film formed thereon. 53 is an insulating layer provided on top of the electrode 52, and a first solid layer 1,3°5.7.
......, 39 and second solid layer 2,4゜6
．． 8. . . . 40 are alternately stacked, and the stacked structure portion forms a semiconductor passage portion of a field effect thin film transistor. 71 and 72 are electrodes arranged on both sides of the multilayer structure part, one electrode 71 is used as the source (S) of the field effect thin film transistor, and the other electrode 72 is used as the drain (D) of the field effect thin film transistor. ) is used as and these electrodes 7
An n+ layer 61.62 is provided between the electrode 71.72 and the laminated structure portion, so that the electrode 71.72 and the laminated structure portion are in ohmic contact.

In this example, a field effect thin film transistor having the above structure, that is, using a multilayer structure film in the semiconductor passage portion, was manufactured according to the following steps.

3 to 7 are cross-sectional views schematically showing the manufacturing process in this example, and the same reference numerals as in FIG. 2 indicate the same components as in FIG. 2.

First, an electrode 52 is placed on a forming substrate 51 made of a glass substrate.
was deposited and etched to form a gate electrode (G). (Fig. 3) Next, on the substrate 51 on which the gate electrode (G) 52 was formed,
An amorphous SiN:H film (hereinafter abbreviated as ra-3tN:H film) 53, which is an insulating film, was deposited by a glow discharge method (GD method).

That is, the substrate 51 on which the gate electrode has been formed is placed in a reaction container of a deposited film forming apparatus using a glow discharge method, the substrate temperature is maintained at 250° C., and silane gas (hereinafter referred to simply as “l”) diluted to 10% with hydrogen gas is placed. It is abbreviated as 5iH4J.

) 5SCCM and ammonia gas 20SCC:M were introduced into the reaction vessel, and the pressure inside the reaction vessel was set to 0.15 To.
The raw material gas was decomposed by applying a high frequency of 13.56 MHz at an output of 15 W, and 1500 a-5iN:H films 53 were deposited on the substrate 51.

Next, the first solid layer, an amorphous Si:H film (hereinafter referred to as "a-3i:I(
It is abbreviated as "membrane". ) 1, the substrate temperature is 250°C, the raw material gas is SiH4 gas 20SCCM, and the pressure inside the container is 0.12 Tor.
50 people deposited the film under the following conditions: r, high frequency (13.56 MHz), and 20 W output.

Furthermore, on top of this, the aforementioned one-color frame film 53 (a −5iN
:H film) and total (under the same film formation conditions, the second solid layer a
-5iN: H film 2 was deposited by 100 people.

After that, as shown in FIG. 8, 0, I
Torr hydrogen gas (H2) is introduced, and the quartz window 86a,
The sample 84 on which the second solid layer 2 has been formed is irradiated with halogen lamps 85a and 85b through b, and the movable substrate holder 83 on which the sample 84 is placed is moved at 14 m/s.
The film was moved at a speed of EC, and the portion of the deposited film irradiated with halogen lamp light was kept at 1000° C. for 10 seconds to polycrystallize only the a-St:H film 1, which is the first solid layer. . (FIG. 4) The crystal grain size at this time was 850 Å or more.

Thereafter, in exactly the same manner as above, the steps of depositing the a-Si:H film, depositing the a-5iN:H film, and irradiating with halogen lamp light were repeated 20 times to form a total of 40 thin layers. (FIG. 5) After the lamination process was completed, the gate was etched using a resist mask smaller than the pole (G) 52 to form a so-called mesa transistor.

Next, a silicon layer doped with phosphorus with a high impurity concentration (hereinafter abbreviated as "n layer") 6 is formed using a glow discharge method.
1, substrate temperature 250°C, source gas St H48SCC
Phosphine gas (PH:l) diluted to 11000 pp with M and hydrogen gas 50 SCCM, pressure inside the container 0.
The film was deposited to a thickness of 750 under film forming conditions of 12 Torr, high frequency (13.56 MHz), and output of 20 W. Next, an electrode 71 such as AP was vacuum-deposited by 1000 people to form a resist mask 81. (FIG. 6) Finally, after etching the Al electrode 71 and the n'' layer not covered by the resist mask 81, the resist mask 81 was removed to form a field effect thin film transistor shown in FIG.

Next, the effects of the field effect thin film transistor formed according to this example will be explained using FIG. 1.

In this example, in FIG. 1, the band gap of the first solid layer is V + ': 1.1 eV, the band gap of the second solid layer is V,: 5 eV, and the band gap of the first solid layer is V + ';: 1.1 eV. Difference in electron affinity between and second solid layer (φ, −φz): 2
eV, and the first solid layer film JrJ,d, =5
Since the film thickness a2=100, the thickness of the polycrystalline silicon which is the first solid layer is 11.3, 5.
......, a well that can be quantum mechanically confined is formed in 39, and electrons are transferred to polycrystalline silicon layers 1, 3, 5 degrees... 39, and the electron density of the polycrystalline silicon layer increases. As a result, in the polycrystalline silicon layer, the mobility is improved in the direction perpendicular to the quantum well, that is, in the direction parallel to the interface between the first solid layer and the second solid layer.

Here, by polycrystallizing the first solid layer, the first solid layer becomes 3.5. When 39 is a-3i :H deposited by the glow discharge method under the above conditions, the mobility is about 0.5CI112/V・S, whereas polycrystalline silicon If the mobility is 251”/
V, S, which could be improved to values that cannot be obtained with amorphous. As a result, the mobility of the multilayer material as a whole was improved to 110 crn''/V-5. Also, the threshold voltage of a transistor with a channel length of 10Pn and a channel width of 100-V was 1.2V.

A field effect thin film transistor having a structure similar to that of Example 1 was manufactured in the following manner.

First, a gate electrode 52 is formed on a formation substrate 51 in exactly the same manner as in Example 1, and an insulating film a-5
iN: Hrpj! 1500 people deposited 53.

Next, using the glow discharge method, under the same conditions as in Example 1, the first
50 samples of a-3i:H film 1, which is a solid layer, and 100 samples of a-3tN:H film 2, which is a second solid layer, were deposited.

Thereafter, the substrate 51 on which the second solid layer 2 is formed is transferred to the apparatus shown in FIG. was polycrystallized. The conditions for electron beam irradiation are: Kato voltage 10 kV;
The current of the child gun filament is 2.0 mA, the beam diameter is 100
-1 The electron beam scanning speed was 10 cm/sec. The crystal grain size thus obtained was 750 Å or more.

Above a-3t: H film deposition, a-5iN:
The process of H film deposition and electron beam irradiation was repeated 20 times to form a multilayer structure including 20 polycrystalline silicon layers and 20 a-5iN:H films.

Thereafter, a field effect thin film transistor having the structure shown in FIG. 2 was formed in the same manner as in Example 1.

In this example, the channel length is 10 pTn, and the channel width is 1
As a result of forming a transistor with a mobility of 102
cm''/V-3 and a threshold voltage of 1.5V were obtained.

This embodiment shows an example in which radiation irradiation or heating is performed in the process of stacking the first solid layer and the second solid layer in accordance with the first and second embodiments described above.

Next, as shown in FIG. 7, Embodiment 3.4 is shown in which radiation irradiation or heating is performed at the final stage of the lamination.

Example 3 The structure of the field effect thin film transistor formed in this example is completely the same as that in Example 1.

The manufacturing process will be explained below. In exactly the same manner as in Example 1, a gate electrode 52 was formed on a formation substrate 51, and 1,500 a-5iN:H films 53, which were insulating films, were deposited. Next, using the glow discharge method, 50 people 1, 3,
5.・・・・・・・・・39 and the second solid layer a
-5iN: H film 100 people2. 4. 6°...
. . 40 were laminated in 20 layers each, for a total of 40 layers. After the completion of lamination, as shown in FIG.
The substrate 102 on which the deposited film has been formed is placed on the lower fixed heater 101 kept at 0°C, and the linear upper movable heater 103 is heated to 1700°C to apply heat from a distance of 5B from the surface of the deposited film. While adding, the upper moving heater 103 is moved parallel to the deposited film surface at a speed of l vs / sec, and the first solid layer a-5t:H film 1.3.5.・
......, only 20 layers of 39 were polycrystallized.

Thereafter, in the same manner as in Example 1, etching, formation of an n''' layer, vapor deposition of an Af electrode, formation of a resist mask, and formation of an Al
By etching the electrode and the n'' layer and removing the resist mask, a field effect thin film transistor having the structure shown in FIG. 2 was formed.

In this example, the channel length is 10[, the channel width is 10]
As a result of creating a 0- transistor, the mobility is 123
arm"/V-5, and the threshold value was 0.9 .Furthermore, the crystal grain size was 1000 Å or more.

Application ±1 a-5i after completion of lamination: H film 1. 3. 5.・
A field-effect thin film transistor having the structure shown in FIG. 2 was formed in the same manner as in Example 3, except that the polycrystallization of 39 was performed in the following manner.

That is, after lamination is completed, the sample is transferred to an annealing chamber 111 as shown in FIG. 11, and a quartz window 115 is passed through the entire multilayer film.
A continuous argon ion laser 113 with an output of 5 W is irradiated to form the a-5i :H films 1, 3, 5 .
......, only 20 layers of 39 were polycrystallized. At this time, the substrate temperature was kept at 400°C and the beam diameter was set to 10
01 and scanned at a speed of 1 effi/sec.

As a result, the crystal grain size was 900 Å or more.

In this example, as a result of forming a transistor with a channel length of 1101 r and a channel width of 100 -, the mobility is 11
8 clll''/VS, the threshold value was 1.1■.

In this example, amorphous 5t is used as the first solid layer.
A Ge:H:F film (hereinafter abbreviated as ra 5tGe film) was used.

First, a gate electrode 52 is formed on a formation substrate 51 in exactly the same manner as in Example 1, and an a-5tN:H film 5 which is an insulating film is formed.
1500 people deposited 3. Next, using the glow discharge method, St F 430SC (:M%Ge F
Using aO12SCCM and Hz 20SCCM, substrate temperature 280℃, high frequency (13,56MHz) output 3
Under the film forming conditions of 0W, reaction vessel internal pressure Q, and 3QTorr,
80 people deposited a 5iGe film to serve as the first solid layer.

Next, a second solid layer of a-5iN:H was deposited under exactly the same conditions as the first deposited a-5iN:H1153.
After depositing 150 films, as shown in FIG. 8, 2. OX
Under reduced pressure of 10-” Torr, the quartz window 86a,
The sample 84 is irradiated with halogen lamps 85a and 85b through
The a 5iGe film, which is the first solid layer, was polycrystallized by moving the a 5iGe film as the first solid layer at a temperature of 800° C. for 10 seconds in the portion irradiated with the halogen lamp light after deposition. At this time, the crystal grain size was 600 Å or more. Thereafter, under the same conditions as above, 80 a-5iGe films were deposited, and a-Si
The process of depositing 150 N:H films and irradiating with a halogen lamp was repeated 25 times. Then, in exactly the same manner as in Example 1,
A field effect thin film transistor with the structure shown in Figure 2 is formed. As a result of forming a transistor with a channel length I Q yrn and a channel width of 100 μm using the above method, the mobility was 6
A value of 5cn''/V and an SL threshold voltage of 0.8V were obtained.

The gate electrode 5 is formed on the formation substrate 51 in the same manner as in Example 1.
2 and an insulating film a-3iN:H film 53
1,500 people deposited.

Next, using a glow discharge method, SiF* was used as a raw material gas.
Using IO3CCM and Ge F # 1.5SCCM, substrate temperature 300°C, reaction vessel internal pressure 0.10To
rr, amorphous Ge:H which is the first solid layer under the film forming conditions of high frequency (13,56 MHz) output 25 W:
F film (hereinafter abbreviated as ra-Ge film) was deposited by 100 people.

Next, using the glow discharge method, H! Si Ht 5 SCCM and C2H414 diluted with gas
Using SCCM, substrate temperature 300°C, reaction vessel internal pressure 0
．． 15W, high frequency (13,56MHz) output 25W, the second solid layer, amorphous SiC:H
film (hereinafter abbreviated as "a-3iC:H film").

200 people deposited.

Hereinafter, the deposition of a-Ge film, a
-5iC: The process of depositing the H film was repeated 20 times to form a total of 40 layers.

After the lamination was completed, heat was applied to the entire multilayer film to polycrystallize the a-Ge film, which was the first solid layer. As shown in FIG.
Place the sample 102 on top of the sample 102, heat the linear upper moving heater 103 to 1000 degrees Celsius, heat the sample portion 104 at the bottom of the upper moving heater 3 degrees away from the sample, and turn the upper moving heater 1
03 was moved parallel to the sample surface at a speed of 1/sec. As a result, the a-Ge film, which is the solid layer of tube 1, became polycrystalline, and the crystal grain size became 800 Å or more. Next, the multilayer film is etched into the shape shown in FIG. 5, and in the same manner as in Example 1, a field effect thin film transistor having the structure shown in FIG. 2 is formed. By the above method, a transistor with a channel length of I Q pm and a channel width of 100 mm was formed, resulting in a mobility of 70 CI112/V·S and a threshold voltage of 0.7 V.

In the above embodiments, the structure of the field-effect transistor is a lower gate stagger type as shown in Fig. 2, but it is not limited to this type only, and may include an upper gate stagger type or a coplanar type. It may be a structure.

In addition, although the glow discharge method was used as the manufacturing method for the first solid layer and the second solid layer, the method is not limited to this method. For example, photo-CVD method, sputtering method, HOMO-
A method using a CVD method, a high vacuum evaporation method, or the like may be used.

〔Effect of the invention〕

The field effect thin film transistor of the present invention has a multilayer structure in which a first solid layer and a second solid layer are alternately laminated, and in the process or final stage of the lamination, electromagnetic waves such as light or microwaves or electron beams are applied. By irradiating with radiation such as
It is possible to polycrystallize the solid layer of the first solid layer, thereby improving the mobility of the first solid layer to a value that could not be obtained with amorphous, and dramatically improving the mobility of the multilayer material as a whole. Because the threshold voltage of The operation of a field effect thin film transistor can be increased in speed.

[Brief explanation of the drawing]

FIG. 1 is a band structure diagram of a multilayer material in a field effect thin film transistor of the present invention, and FIG. 2 is a schematic cross-sectional view of the field effect thin film transistor of the present invention. 3 to 7 are explanatory views of the manufacturing process of the field effect thin film transistor of the present invention. FIG. 8 is an explanatory diagram of a halogen lamp irradiation device used in the manufacturing process, FIG. 9 is an explanatory diagram of an electron beam irradiation device used in the manufacturing process, and FIG. 10 is an explanatory diagram of a halogen lamp irradiation device used in the manufacturing process. FIG. 11 is an explanatory diagram of a linear heat treatment device used in the process, and FIG.
Ion laser irradiation Ev... Upper end of valence band Ey... Fermi level Ec... Lower end of legend ■1. φ1...First solid layer 1.3.5゜7
Band gap and electron affinity of ,......■
2. φ2...Second solid layer 2.4,6゜8,・
Regarding the band gap and electron affinity of Figures 3 to 7, 1, 3. 5.7. ......,39...
...first solid layer 2, 4.6.8.・・・・・・・・・、40・・・・・・
- Second solid layer 51... Formation substrate 52... Gate electrode 53... Insulating film 61. 62...n layer 71, 72...electrode 81...resist mask in FIG. 8, 81...reaction chamber 82a, b... ...Glow discharge electrode 83.
......Movable board holder 84...
... Samples 35a, b... Halogen lamp 35a,
b... Regarding the quartz plate in Fig. 9, 701...... Electron gun 702a, b...... Control electrode 903 a,
b... Control electrodes 704a, b...
...Deflection electrode 905...Substrate holder 906...Regarding the sample in Figure 10, 101...Lower fixed heater 102...
......Sample 103...Top moving heater 104...
110...Reaction chamber 111...Annealing chamber 112...Regarding the portion of the sample heated by the upward moving heater in FIG. ...Game I Valve 113...
...Ar ion laser 114...
・Sample 115...Quartz window Figure 1 (-) Figure 2 Figure 10 Figure 11

Claims (1)

[Claims] It is formed by laminating a plurality of solid layers made of semiconductors or insulators made of non-single-crystalline materials, and the solid layer with the narrower band gap is formed during the lamination process or the solid layer of the insulator. A field effect thin film transistor characterized in that it is polycrystallized by irradiation with electromagnetic waves or radiation or by applying heat in the final stage of a lamination operation.