JPS6333353B2 - - Google Patents
Info
- Publication number
- JPS6333353B2 JPS6333353B2 JP53101095A JP10109578A JPS6333353B2 JP S6333353 B2 JPS6333353 B2 JP S6333353B2 JP 53101095 A JP53101095 A JP 53101095A JP 10109578 A JP10109578 A JP 10109578A JP S6333353 B2 JPS6333353 B2 JP S6333353B2
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- solid
- photoconductor
- state imaging
- imaging device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000003384 imaging method Methods 0.000 claims description 14
- 239000000758 substrate Substances 0.000 claims description 11
- 239000004065 semiconductor Substances 0.000 claims description 10
- 230000005669 field effect Effects 0.000 claims description 4
- 239000012212 insulator Substances 0.000 claims 2
- 230000000903 blocking effect Effects 0.000 description 5
- 239000011159 matrix material Substances 0.000 description 5
- 206010034972 Photosensitivity reaction Diseases 0.000 description 4
- 230000036211 photosensitivity Effects 0.000 description 4
- 230000003287 optical effect Effects 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- UHYPYGJEEGLRJD-UHFFFAOYSA-N cadmium(2+);selenium(2-) Chemical compound [Se-2].[Cd+2] UHYPYGJEEGLRJD-UHFFFAOYSA-N 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 238000001771 vacuum deposition Methods 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 206010034960 Photophobia Diseases 0.000 description 1
- 229910006404 SnO 2 Inorganic materials 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 208000013469 light sensitivity Diseases 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 238000005036 potential barrier Methods 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 230000027756 respiratory electron transport chain Effects 0.000 description 1
- SBIBMFFZSBJNJF-UHFFFAOYSA-N selenium;zinc Chemical compound [Se]=[Zn] SBIBMFFZSBJNJF-UHFFFAOYSA-N 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
Landscapes
- Solid State Image Pick-Up Elements (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
Description
【発明の詳細な説明】 本発明は、固体撮像装置に関する。[Detailed description of the invention] The present invention relates to a solid-state imaging device.
従来、ホトダイオードを光検知部とし、これを
マトリツクス状に配置し、さらにXY走査のため
の電界効果トランジスタ回路を組合せたもの（以
下XYマトリツクス型という。例えば特公昭45−
30768号）がある。また最近、XYマトリツクス
型にみられるような走査パルスに伴うスパイクノ
ズルの少ない自己走査型撮像装置として開発され
たものにBBD、CCD（以下電荷転送型という。例
えば特開昭46−1221号、特開昭47−26091号）が
ある。しかし、いずれも光検知部のホトダイオー
ドはXY走査のための電界効果トランジスタある
いは電荷転送用の電極部とともに同一基板面に構
成される必要があるため、その単位面積あたりの
光利用効率がたかだか1/3〜1/5となつていた。 Conventionally, photodiodes were used as light detection units, arranged in a matrix, and combined with a field effect transistor circuit for XY scanning (hereinafter referred to as the XY matrix type. For example, the
30768). Recently, BBD and CCD (hereinafter referred to as charge transfer type) have been developed as self-scanning type imaging devices with fewer spike nozzles associated with scanning pulses as seen in the XY matrix type. No. 26091 (1972). However, in both cases, the photodiode of the light detection part needs to be configured on the same substrate surface with the field effect transistor for XY scanning or the electrode part for charge transfer, so the light utilization efficiency per unit area is at most 1/2. It was 3 to 1/5.
これらの欠点を除去すべく、光検知部のホトダ
イオードの代りに光導電体に光感度をもたせ、こ
れをXYマトリツクス型と組合せた固体撮像装置
（例えば特開昭49−91116号）および電荷転送型と
組合せた固体撮像装置（例えば特願昭50−21166
号（特開昭51−95720号））が提案されているが、
いずれの場合も光導電体膜上の電極は半導体基板
と同電位（接地電位）に保たれていた。 In order to eliminate these drawbacks, a solid-state imaging device (for example, Japanese Patent Laid-Open No. 49-91116) and a charge transfer type have been developed in which a photoconductor has photosensitivity instead of a photodiode in the photodetection section and is combined with an XY matrix type (for example, Japanese Patent Application Laid-Open No. 49-91116). Solid-state imaging device combined with
(Japanese Patent Application Laid-open No. 51-95720)) has been proposed,
In either case, the electrode on the photoconductor film was kept at the same potential as the semiconductor substrate (ground potential).
本発明は、上記のような構成の固体撮像装置に
おいて、光導電体上の電極に電圧を印加する機構
を具備することによりブルーミングを抑制する機
能を備えた固体撮像装置を提供するものである。 The present invention provides a solid-state imaging device configured as described above, which has a function of suppressing blooming by including a mechanism for applying a voltage to an electrode on a photoconductor.
以下本発明の一実施例を図面とともに説明す
る。 An embodiment of the present invention will be described below with reference to the drawings.
第１図はシリコン基板上に形成された回路素子
が電荷転送型の場合の固体撮像装置の一単位の断
面構造を示した例である。ｐ型半導体基板１０に
n+型領域１１を形成しダイオードを設ける。１
２はp+型領域で、CCD動作の場合にn+型領域１
１からの電子の注入を阻止するための電位障壁で
あり、１３はn+型領域で、BBD動作の場合の電
位の井戸であり、それぞれCCD、BBDの時のみ
設置すればよい。CCD動作、BBD動作は基本的
に同じ電荷転送であるので、以下はn+型領域１
３のあるBBD動作で説明を行なう。１４は第１
ゲート電極でありn+型領域１１との重なり部分
を有している。１６は半導体基板１０と第１ゲー
ト電極１４との間の絶縁体膜でゲート酸化膜であ
る。１５は第１電極１７と半導体基板１０及び第
１ゲート電極１４とを電気的に分離するための絶
縁体層である。１７は第１電極でn+型領域１１
と電気的に接続したダイオードの電極であるとと
もに正孔阻止層１８の電極ともなつている。１９
は（Zn1-xCdxTe）1-y（In2Te3）yよりなる光導電
体であり、その上に透明電極２０が形成されてお
り、本発明にかかる電圧源２１により正電位が印
加されている。しかしこれは正電位に限定される
ものではなく、光導電体の特性により、負電位を
印加する場合もあり得る。更に、この電圧源２１
は電池等に限らず、例えば、光電信号の出力を検
出しその出力信号を直流電圧に変換して電圧源２
１に帰還する構成により電気的な自動絞り機能と
して、動作させることが出来る。２２は入射光で
ある。 FIG. 1 is an example showing a cross-sectional structure of one unit of a solid-state imaging device in which the circuit elements formed on a silicon substrate are of a charge transfer type. to the p-type semiconductor substrate 10
An n + type region 11 is formed and a diode is provided. 1
2 is a p + type region, and in the case of CCD operation, n + type region 1
1 is a potential barrier for blocking electron injection from 1, and 13 is an n + type region, which is a potential well for BBD operation, and needs to be installed only for CCD and BBD, respectively. CCD operation and BBD operation are basically the same charge transfer, so the following is n + type region 1
The explanation will be given using the BBD operation shown in step 3. 14 is the first
It is a gate electrode and has an overlapping portion with the n + type region 11. 16 is an insulating film between the semiconductor substrate 10 and the first gate electrode 14, which is a gate oxide film. Reference numeral 15 denotes an insulating layer for electrically separating the first electrode 17 from the semiconductor substrate 10 and the first gate electrode 14 . 17 is the first electrode and n + type region 11
This serves as the electrode of the diode electrically connected to the hole blocking layer 18 as well as the electrode of the hole blocking layer 18 . 19
is a photoconductor made of (Zn 1-x Cd x Te) 1-y (In 2 Te 3 ) y , on which a transparent electrode 20 is formed, and a positive potential is applied by a voltage source 21 according to the present invention. is applied. However, this is not limited to a positive potential, and depending on the characteristics of the photoconductor, a negative potential may be applied. Furthermore, this voltage source 21
For example, it detects the output of a photoelectric signal and converts the output signal into a DC voltage, and is used as a voltage source 2.
1, it can be operated as an electric automatic diaphragm function. 22 is incident light.
この第１図の構造の光情報読み込み動作を説明
する。第２図にこの素子を駆動するパルスパター
ンと第１電極１７における電位変化を示した。時
点t1において第１ゲート電極１４にVCHなる読み
込みパルスを印加すると、電極１７における電位
は第２図ｂに示した如く（VCH―VT）にチヤージ
される。ここでVTはn+型領域１１，１３および
第１ゲート電極１４より構成されるFETのしき
い値電圧である。今、入射光２２があると、光導
電体１９において電子―正孔対が生成され、それ
ぞれ電極１７，２０に到達して電極１７の電位が
低下する。この電位低下は入射光量に比例し、１
フイールド期間蓄積されるので、VSまで低下す
る。さらに時点t2において第１ゲート電極１４に
VCHを印加すると、その下の半導体の表面電位は
上昇し、その結果n+型領域１１からn+型領域１
３に電子の移送が行なわれる。その結果、n+型
領域１１の電位は再び上昇し、（VCH―VT）とな
る。従つて、n+型領域１３に移動した電荷の総
量は入射光の照度に対応する。 The optical information reading operation of the structure shown in FIG. 1 will be explained. FIG. 2 shows the pulse pattern for driving this element and the potential change at the first electrode 17. When a read pulse V CH is applied to the first gate electrode 14 at time t 1 , the potential at the electrode 17 is charged to (V CH -V T ) as shown in FIG. 2b. Here, V T is the threshold voltage of the FET composed of the n + -type regions 11 and 13 and the first gate electrode 14 . Now, when there is incident light 22, electron-hole pairs are generated in the photoconductor 19, which reach the electrodes 17 and 20, respectively, and the potential of the electrode 17 decreases. This potential drop is proportional to the amount of incident light, and is 1
As it is accumulated over the field period, it drops to V S. Furthermore, at time t2 , the first gate electrode 14
When V CH is applied, the surface potential of the semiconductor underneath increases, and as a result, from n + type region 11 to n + type region 1
3, electron transfer is performed. As a result, the potential of the n + type region 11 rises again to (V CH -V T ). Therefore, the total amount of charge transferred to the n + type region 13 corresponds to the illuminance of the incident light.
以上は光検知部と第１ゲート電極１４による固
体素子の一単位についての説明であるが、n+型
領域１３に読込まれた光電変換信号を自己走査に
よつて出力部に送り出す手段について以下に説明
する。第３図は第１図に示した固体素子の一単位
を一次元に配置した場合の平面図であり、破線で
かこまれた部分２３は上記一単位を示している。
その他の数字は第１図の数字に対応している。隣
り合う単位に含まれる第１ゲート電極１４，２５
との間に第２ゲート電極２４，２６が付設されて
いる。前述した一連の操作で第１ゲート電極１４
で読み込まれた電荷は第２のゲート電極２４に第
２図に示した正の転送パルスを加えることにより
電荷転送の形で第２ゲート電極２４の下に移動す
る。さらに第２ゲート電極２４の下に移動した電
荷は同様の原理に基づいて第１ゲート電極２５、
第２ゲート電極２６と次々に転送され出力段まで
転送される。すなわち光検知部で光電変換された
信号を２相のクロツク信号で出力段に送り出すこ
とができる。 The above is an explanation of one unit of the solid-state device consisting of the photodetector and the first gate electrode 14. However, the means for sending the photoelectric conversion signal read into the n + type region 13 to the output section by self-scanning will be explained below. explain. FIG. 3 is a plan view of a one-dimensional arrangement of one unit of the solid-state element shown in FIG. 1, and a portion 23 surrounded by a broken line indicates the one unit.
The other numbers correspond to those in FIG. First gate electrodes 14 and 25 included in adjacent units
Second gate electrodes 24 and 26 are provided between them. Through the series of operations described above, the first gate electrode 14
By applying a positive transfer pulse shown in FIG. 2 to the second gate electrode 24, the charges read in are moved under the second gate electrode 24 in the form of charge transfer. Furthermore, the electric charge that has moved below the second gate electrode 24 is transferred to the first gate electrode 25 based on the same principle.
It is transferred to the second gate electrode 26 one after another and is transferred to the output stage. That is, the signal photoelectrically converted by the photodetector can be sent to the output stage as a two-phase clock signal.
次に本発明装置の製造方法の一例について説明
する。ｐ型シリコンよりなる半導体基板１０に
n+型領域１１，１３を拡散法により形成し、全
面を熱酸化法によりゲート酸化膜１６を形成す
る。次にポリシリコンにより第１ゲート電極１４
を形成し、ゲート酸化膜１６をエツチングにより
n+型領域１１の部分のみにコンタクト窓を開け
る。ひきつづき低融点ガラス例えばリンガラス等
により絶縁体層１５を堆積しゲート酸化膜の場合
と同様n+型領域１１の部分にコンタクト窓を開
口し、その後熱処理を加えて、塑性流動を起こさ
せ、表面を滑らかにする。次にMo、Ta等よりな
る電極１７を形成し半導体基板上の回路素子は形
成される。更にこの上に正孔阻止層１８のZnO、
ZnS、ZnSe、CdS、CdSeを真空蒸着法により0.1
〜0.5μの厚さに形成し、ひきつづき光導電体１９
である（Zn1-xCdxTe）1-y（In2Te3）yを同じく真
空蒸着法により0.6〜2.5μの厚さに形成する。次
にこのようにして得られた異種接合を真空中に
300〜600℃、２〜30分熱処理を加え、更にスパツ
タリング法によりIn2O3あるいはSnO2を含む透明
電極を0.1〜0.5μの厚さに形成すると、本発明の
固体撮像素子が得られる。 Next, an example of a method for manufacturing the device of the present invention will be explained. A semiconductor substrate 10 made of p-type silicon
N + type regions 11 and 13 are formed by a diffusion method, and a gate oxide film 16 is formed on the entire surface by a thermal oxidation method. Next, the first gate electrode 14 is made of polysilicon.
is formed, and the gate oxide film 16 is etched.
A contact window is opened only in the n + type region 11. Subsequently, an insulating layer 15 is deposited using a low melting point glass such as phosphor glass, a contact window is opened in the n + type region 11 as in the case of the gate oxide film, and then heat treatment is applied to cause plastic flow and the surface is smoothen. Next, electrodes 17 made of Mo, Ta, etc. are formed, and circuit elements on the semiconductor substrate are formed. Furthermore, on top of this, a hole blocking layer 18 of ZnO,
0.1 ZnS, ZnSe, CdS, CdSe by vacuum evaporation method
The photoconductor 19 is formed to a thickness of ~0.5μ.
(Zn 1-x Cd x Te) 1-y (In 2 Te 3 ) y is formed to a thickness of 0.6 to 2.5 μ by the same vacuum evaporation method. Next, the dissimilar bond obtained in this way is placed in a vacuum.
By applying heat treatment at 300 to 600° C. for 2 to 30 minutes and further forming a transparent electrode containing In 2 O 3 or SnO 2 to a thickness of 0.1 to 0.5 μm by sputtering, the solid-state imaging device of the present invention can be obtained.
次に本発明の特徴である第２電極への電圧のバ
イアス効果について詳述する。バイアス効果の１
つにブルーミングの防止機構がある。ブルーミン
グ現象とは強い入射光があつた場合に光生成キヤ
リアが横方向に拡がり入射光サイズ以上に光信号
が拡がる現象であるが、電荷転送型の固体撮像装
置では、その機能上転送方向への白い線として生
じる。それを第２図を用いて説明すると、リード
パルスにより（VCH―VT）に設定されたダイオー
ド電位は、光入射により１フイールド期間中に
VSまで低下するが、光入射が強くなりすぎると、
ダイオード電位はV〓以下となり（ｂ図一点鎖線）
転送パルスの印加時も読み込み動作が生じ、転送
方向の絵素が転送時にあたかも光信号があるかの
如くに電位変動を起こし白い線となる。一方、本
発明のように光導電体を形成し、その上の電極２
０に正バイアスVDを印加しておくと、光入射に
よるダイオード電位の低下はVD以下になり得ず、
このVDをV〓以上に設定しておくなら転送パルス
による読み込み動作は生ぜずブルーミング現象は
抑制される。 Next, the bias effect of the voltage applied to the second electrode, which is a feature of the present invention, will be described in detail. Bias effect 1
There is a blooming prevention mechanism. Blooming phenomenon is a phenomenon in which photogenerated carriers spread laterally when strong incident light hits, and the optical signal spreads beyond the size of the incident light.However, in charge transfer type solid-state imaging devices, due to their functionality, the blooming phenomenon occurs in the direction of transfer. Appears as a white line. To explain this using Figure 2, the diode potential set to (V CH -V T ) by the read pulse changes during one field period due to light incidence.
However , if the light incidence becomes too strong,
The diode potential becomes less than V〓 (dotted chain line in figure b)
A reading operation also occurs when a transfer pulse is applied, and the picture elements in the transfer direction cause potential fluctuations during transfer, as if there were an optical signal, resulting in a white line. On the other hand, as in the present invention, a photoconductor is formed, and an electrode 2 on it is formed.
If a positive bias V D is applied to 0, the diode potential cannot drop below V D due to light incidence.
If this V D is set higher than V〓, no read operation by transfer pulses will occur and the blooming phenomenon will be suppressed.
以上は、半導体基板に電荷転送型の回路素子を
形成し、光導電体として正孔層と（Zn1-xCdxTe）
1-y（In2Te3）yとの異種接合を用いた場合を中心
に述べてきたが本発明はこれに限定されるもので
はなく、XYマトリツクス型の場合においても、
電荷転機能がアドレス機能に変わるのみでバイア
スによる光感度の調整機能はこの場合においても
同様に作用する。又光導電体は、その特性におい
て光感度が電圧依存性を有するなら光感度の調整
機能は同様に存在し例えばそのような光導電体と
してSb2S3、CdSe等を挙げることが出来る。 In the above, a charge transfer type circuit element is formed on a semiconductor substrate, and a hole layer and (Zn 1-x Cd x Te) are used as a photoconductor.
Although the present invention has been mainly described using a heterojunction with 1-y (In 2 Te 3 ) y , the present invention is not limited to this, and even in the case of an XY matrix type,
The light sensitivity adjustment function by bias operates in the same manner in this case, except that the charge transfer function is changed to an address function. Furthermore, if a photoconductor has voltage dependence in its photosensitivity, it also has the ability to adjust photosensitivity, and examples of such photoconductors include Sb 2 S 3 and CdSe.
以上説明したように、本発明は光導電体上の電
極にバイアス電圧を印加することにより、ブルー
ミング現象を抑制する機能を備え、実効的な入射
光のダイナミツクレンジを拡げることができる上
にバイアス電圧による光感度の調整はアナログ的
に取扱えるため最適感度とし得ること等々種々の
利点がある。 As explained above, the present invention has a function of suppressing the blooming phenomenon by applying a bias voltage to the electrode on the photoconductor, and can expand the effective dynamic range of incident light. Adjustment of photosensitivity using voltage can be handled in an analog manner, so it has various advantages such as being able to achieve optimal sensitivity.
第１図は本発明の一実施例の電荷転送型固体撮
像装置の一単位の構造断面図、第２図ａ，ｂは同
装置の動作を説明するための図でクロツクパルス
の時間関係および光導電体膜の電位変化を示す
図、第３図は第１図の固体撮像装置の一単位を一
次元に配置し電荷転送をもたせた構造の平面図で
ある。
１０……半導体基板、１１，１３……n+型領
域、１２……p+型領域、１７……第１電極、１
８……正孔阻止層、２１……電圧源。
FIG. 1 is a structural sectional view of one unit of a charge transfer solid-state imaging device according to an embodiment of the present invention, and FIGS. 2a and 2b are diagrams for explaining the operation of the device, showing the time relationship of clock pulses and photoconductivity. FIG. 3, which is a diagram showing potential changes in body membranes, is a plan view of a structure in which one unit of the solid-state imaging device of FIG. 1 is arranged one-dimensionally to provide charge transfer. 10... Semiconductor substrate, 11, 13... N + type region, 12... P + type region, 17... First electrode, 1
8... Hole blocking layer, 21... Voltage source.
Claims (1)
導電型を有するソース、ドレイン領域および第１
のゲート電極を有する電界効果トランジスタを形
成し、この電界効果トランジスタの上層に上記ソ
ース領域の一部を除いて絶縁体層を設置し、この
絶縁体層の上に上記ソース領域と電気的に結合し
た第１電極を形成し、上記第１電極上に光導電体
を形成し、更に上記光導電体上に第２の電極を形
成してなり、上記第２電極に電圧を印加する手段
を有してなる固体素子を、第２のゲート電極を介
して複数個配列してなることを特徴とする固体撮
像装置。 ２ 特許請求の範囲第１項記載の固体撮像装置に
おいて、ドレイン領域に重なり部分を有するよう
に第２のゲート電極を設置した構成よりなること
を特徴とする固体撮像装置。 ３ 特許請求の範囲第１項記載の固体撮像装置に
おいて光導電体として（Zn1-xCdxTe）1-y
（In2Te3）yを用いたことを特徴とする固体撮像装
置。[Claims] 1. A semiconductor substrate having one conductivity type, source and drain regions having the opposite conductivity type, and a first
A field effect transistor having a gate electrode is formed, an insulator layer is provided on the upper layer of this field effect transistor except for a part of the source region, and the insulator layer is electrically coupled to the source region. forming a first electrode, forming a photoconductor on the first electrode, and further forming a second electrode on the photoconductor, and having means for applying a voltage to the second electrode. A solid-state imaging device comprising a plurality of solid-state devices arranged through a second gate electrode. 2. A solid-state imaging device according to claim 1, characterized in that the second gate electrode is disposed so as to have an overlapping portion in the drain region. 3. (Zn 1-x Cd x Te) 1-y as a photoconductor in the solid-state imaging device according to claim 1
A solid-state imaging device characterized by using (In 2 Te 3 ) y .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10109578A JPS5527772A (en) | 1978-08-18 | 1978-08-18 | Solid state pickup device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10109578A JPS5527772A (en) | 1978-08-18 | 1978-08-18 | Solid state pickup device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5527772A JPS5527772A (en) | 1980-02-28 |
| JPS6333353B2 true JPS6333353B2 (en) | 1988-07-05 |
Family
ID=14291523
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10109578A Granted JPS5527772A (en) | 1978-08-18 | 1978-08-18 | Solid state pickup device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5527772A (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55163881A (en) * | 1979-06-08 | 1980-12-20 | Hitachi Ltd | Manufacture of light receiving surface |
| JPS5753182A (en) * | 1980-09-17 | 1982-03-30 | Fuji Photo Film Co Ltd | Solid-state image pickup device |
| JPS58168274A (en) * | 1982-03-29 | 1983-10-04 | Matsushita Electric Ind Co Ltd | Solid state image pickup device |
| US4583002A (en) * | 1983-06-06 | 1986-04-15 | Fuji Photo Film Co., Ltd. | Imaging sensor with automatic sensitivity control comprising voltage multiplying means |
-
1978
- 1978-08-18 JP JP10109578A patent/JPS5527772A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5527772A (en) | 1980-02-28 |
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