JPS63313887A - Optical electronic element - Google Patents

Abstract

PURPOSE:To control the confinement width of carriers variably by providing an electric field applying means in which a depletion layer is formed on at least one side section of an active layer and a clad layer. CONSTITUTION:The layer structure of a P-type AlGaAs clad layer 2 shaped onto a P-type GaAs substrate 1, an undoped GaAs active layer 3 and an N-type AlGaAs clad layer 4 is formed, one part of the clad layer 2, the active layer 3 and the clad layer 4 are etched to a mesa type, an electrode 6 for confinement is shaped onto the side section of the mesa type section through an insulating layer 5, and electrodes 7, 8 for drive are formed respectively onto the surface of the clad layer 4 and the rear of the substrate 1. Consequently, when the electrode 6 for confinement is viced, the bands of the side section regions 9 of the active layer 3 and the clad layers 2, 4 are bent. Accordingly, the length of bending regions is determined by applied voltage, thus controlling the confinement width of carriers by applied voltage.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention is applied to semiconductor lasers and other optical electronic devices. In particular, it relates to a structure for passing high-density current through an active layer within an optoelectronic device.

〔overview〕

The present invention relates to an optoelectronic device having a structure in which a high-density current is passed through an active layer formed of a semiconductor to emit light, in which an electric field is applied to the sides of the active layer or cladding layer to form a depletion layer. This provides an optical electronic device with a simple structure that allows control of carrier confinement width! [Prior Art] In order to improve the light emission characteristics of semiconductor lasers, optical amplifiers, and other optoelectronic devices, it is necessary to confine carriers in the direction transverse to the light propagation direction in the active layer. In conventional optoelectronic devices, 11) the active layer is mesa-shaped;
(2) Using a multi-quantum well layer in the active layer, Carriers were confined by methods such as making the multiple quantum well layer disordered by impurity diffusion.

An example of an opto-electronic device using method (1) is 15, for example, Ikuo Mido et al., rlnGaAsP double channel planar buried heterostraft laser diode (DC-PBHLD) with effective current.・Confinement”, IEIEI
E-Journal of Lightweight Technology No. L
Volume T-1 No. 1 1. ．． March 983 ([KUOMITO
et,al,.

"TnGaAsPDouble-Cha'nnel-P
lan'er-Buried-Hetero-stru
ture La5er Diode (DC-PBH
LD) With Bffec-tive Cur'r
ent Confinement”, IBBB Jo
Urnal of Lightwave Technology
ogy, Vol, LT-1, No, l, March
1983).

Examples of optoelectronic devices using the method (2) include Tadashi Fukuzawa et al. ", Applied Physics Letters, Journal of the American Physical Society, Volume 45, No. 1, January 1, 1984 (Tadashi Fukuzawaet, a
ll” GaAlAs buried multi
'quantum wellasers fab
ricated by diffusion-ind
uced dis-ordering”, Appl.
Phys, Lett, 45(1), IJuly 198
4).

[Problem that the invention seeks to solve]

However, method (1) described above requires a regrowth process, and method (2) requires diffusion of impurities into the multiple quantum well layer, making the manufacturing process complicated for both methods. There were drawbacks. Furthermore, since the width in which carriers can be confined is determined by photolithography, there is a drawback that it is difficult to realize a confinement width of 1 or less.

Furthermore, there was a drawback that the confinement width was fixed.

SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems and provide an electro-optical element that is easy to manufacture and can variably control the carrier confinement width.

[Means for solving problems]

The optoelectronic device of the present invention includes a semiconductor active layer that is optically activated by injection of current carriers, a cladding layer that supplies carriers to the active layer, and a cladding layer that supplies carriers to the active layer. In the optoelectronic device, the carrier confinement means includes an electric field application means for forming a depletion layer on at least one side of the active layer and the cladding layer. do.

[For production]

The optoelectronic device of the present invention does not confine current carriers by the structure of the device, but utilizes band bending due to the application of an electric field. That is, an electric field is applied from the side to the active layer or cladding layer to generate a depletion layer in that region. Therefore, carriers are confined in regions other than the depletion layer.

According to the present invention, the light emitting characteristics in the active layer can be improved. Furthermore, it is also possible to narrow the confinement width to the extent that a quantum effect can be obtained, and a quantum wire structure can also be obtained. Furthermore, since the carrier confinement width can be controlled by the applied voltage, the confinement width can be optimally set depending on the oscillation conditions, and a stable oscillation state can be maintained.

Moreover, the optical output can also be modulated by the applied voltage.

〔Example〕

FIG. 1 shows a sectional view of an optoelectronic device according to a first embodiment of the present invention. This example is a mesa-type A using a p-type GaAs substrate.
The present invention is implemented in a lGaAs/GaAs double hetero laser.

This example device has a layer structure including a p-type A]GaAs cladding layer 2, an undoped GaAs active layer 3, and an n-type AlGaAs cladding layer 4 formed on a p-type GaAs substrate 1. , the active layer 3 and the cladding layer 4 are etched into a mesa shape, and a confinement electrode 6 is provided on the side of the mesa shape portion with an insulating layer 5 interposed therebetween. Drive electrode 7.
8 is provided.

In this specification, the term "top" indicates the direction in which each layer is grown on the substrate 1, and does not indicate the positional relationship in use of this device.

The feature of this device is that pn junctions that are reverse biased during operation are not provided on both sides of the mesa structure formed by the active layer 3 and the cladding layer 2.4;
The confinement electrode 6 is provided through the confinement electrode 6.

FIG. 2 is an enlarged view of the active layer 3 and its vicinity.

Biasing the confinement electrode 6 bends the bands in the side regions 9 of the active layer 3 and the cladding layer 2.4. Although the confinement electrode 6 may be biased positively or negatively with respect to the active layer 3, the operation will be described below by taking as an example the operation when the confinement electrode 6 is biased negatively.

FIG. 3 shows the state of bands in the active layer 3 and its vicinity.

During operation, electrons and holes are injected into the active layer 3.

The injected electrons are located approximately below the quasi-Fermi level FC of the conduction band and at the conduction band edge E. The injected holes exist approximately between the upper side of the pseudo Fermi level Fv of the valence band and the valence band edge Ev.

When the confinement electrode 6 is biased negatively, the bands are bent at both ends of the active layer 3, as shown in FIG. Therefore, a depletion layer in which electrons cannot exist is generated at both ends of the active layer 3, and electrons are confined in the center of the active layer 3. A depletion layer is similarly generated in the n-type cladding layer 4, and electrons can be intensively injected into the center of the active layer 3.

Furthermore, since the length of the band bending region is determined by the applied voltage, the carrier confinement width can be controlled by the applied voltage. By increasing the applied voltage, it is also possible to reduce the carrier confinement width until a quantum effect occurs.

When biased positively, holes can be confined in the center, and a similar effect can be obtained.

FIG. 4 shows a cross-sectional view of a second embodiment of the opto-electronic device of the present invention.

This embodiment differs from the first embodiment in that a lightly doped layer 4' is provided between the active layer 3 and the cladding layer 4.

Generally, the region in a semiconductor where the band bends becomes longer as the amount of doping of the semiconductor decreases. Therefore, the smaller the doping amount, the greater the carrier confinement effect.

However, if the amount of doping is reduced, the resistance increases.

Therefore, in this embodiment, a thin lightly doped layer 4' is provided between the cladding layer 4 and the active layer 3. This lightly doped layer 4
Since the amount of doping is small, carriers can be confined in the center, and by making it thin, the resistance can be made sufficiently small.

FIG. 5 shows a sectional view of an optoelectronic device according to a third embodiment of the present invention. This example is a planar type A using a p-type GaAs substrate.
The present invention is implemented in a lGaAs/GaAs double hetero laser.

This element consists of a p-type A formed on a p-type GaAs substrate 1.
]GaAs cladding layer 2, undoped GaAs active layer 3
and has a 40-layer structure of n-type AlGaAs cladding layer,
Driving electrodes 7.8 are provided on the front surface of the cladding layer 4 and the back surface of the substrate 1, respectively. Further, on the surface of the cladding layer 4, confinement electrodes 6' are provided on both sides of the driving electrode 7 with an insulating layer 5' interposed therebetween.

When the confinement electrode 6' is negatively biased, the band of the region 10 in the vicinity thereof is bent, a depletion layer is created between the active layer 3 and the n-type cladding layer 4, and carriers in the active layer 3 can be confined in the center thereof. can.

In the above embodiments, the structure in which a voltage is applied to both the active layer and the cladding layer has been described as an example, but the present invention can be similarly implemented with a structure in which a voltage is applied substantially only to the cladding layer.

FIG. 6 shows a sectional view of an optoelectronic device according to a fourth embodiment of the present invention. In this embodiment, the active layer is not etched, only the cladding layer is etched into a mesa shape, and an electric field is applied to this mesa shape portion.

On the p-type GaAs substrate 61, p-type Alo, 3Ga(
GaAs active layer 63 via 1,7As cladding layer 62
is provided. On the active layer 63, n-type A1°, 3G
ao, 7^S low doped layer 64, n-type A1o, 3Gao,
,^S cladding layer 65 and n-type GaAs highly doped layer 66 are provided, and these layers are formed in a mesa shape with a small thickness of the lightly doped layer 64 remaining. A confinement electrode 68 is provided on the side of this mesa structure with an insulating layer 67 made of Si3N interposed therebetween. S on the confinement electrode 68
i3N, an insulating layer 69 is provided, and a driving electrode 70 is provided on this insulating layer 69 and the highly doped layer 66. A driving electrode 71 is provided on the back surface of the substrate 61.

Substrate 61, cladding layer 62, active layer 63, lightly doped layer 6
4. The thickness of the cladding layer 65 and the highly doped layer 66 is 100μm or less, 1μ■, 0.1μ■, and 0.5μ, respectively.
■, 0.5μm and 0.5μ■. The thickness of the lightly doped layer 64 between the active layer 63 and the insulating layer 67 is 0.1 μm.
It is. Insulating layer 67, confinement electrode 68, insulating layer 69
, the thickness of the driving electrode 70 is 0.1 am, respectively.
0.5 am, 0.5 ttmSo, 5μ■. The thickness of the drive electrode 71 is 0.5 μm.

The width of the mesa structure is 2μ■.

Cladding layer 62, lightly doped layer 64 and cladding layer 65
The doping amount of is l xlQ18cm-3, 1×
10I10173 and IX1018cm-'.

To manufacture this device, first, a cladding layer 62, an active layer 63, a lightly doped layer 6
4. Sequentially grow the cladding layer 65 and the highly doped layer 66. Next, a mask is provided on the highly doped layer 66 using photoresist, and the highly doped layer 66, cladding layer 65, and lightly doped layer 64 are etched. At this time, the lightly doped layer 64 is left with a thickness of 0.1 μm. Next, an insulating layer 67, a confinement electrode 68, and an insulating layer 69 are deposited with the mask remaining. After this, the mask is removed with a solvent and the layer formed thereon is removed. As a result, the highly doped layer 66 appearing on the surface and the surface of the insulating layer 69,
Driving electrodes 70 are deposited. In order to facilitate wall spacing in later steps, the back surface of the substrate 61 is polished to a thickness of about 100 μm, and driving electrodes 71 are deposited thereon.

The width W of the depletion layer in a semiconductor is determined by the relative dielectric constant K of the material.
(13.1 for GaAs), doping amount? 'L(1×I
QI'1 cm-3), built-in potential ψ. and the bias voltage V, it is determined by the following formula. Here, q is the electron charge, ε.

is the dielectric constant of vacuum.

Therefore, the width W of the depletion layer in the lightly doped layer 74 is equal to the built-in potential ψ. For example, when the sum of and bias voltage V is 5V, 3V, and IV, each 0.27μ
m, 0.21 μm, and 0.12 μm.

Furthermore, since the doping amount is IXIO"cm', the resistivity of the lightly doped layer 64 is 0.1 Ωcm or less,
For example, if the width of the mesa structure is 2 μl, the resonator length is 500 μm, and the thickness of the low doped layer 64 is 0.5 μm, the resistance value R is R= (0,'l ΩcmXQ, 5 μm) / (2
μm×500, icm)=0.5Ω. Therefore, when a current of 100 mA is passed through this element, the power loss due to the lightly doped layer 64 is 5+nW, which is sufficiently small.

FIG. 7 shows a sectional view of an optoelectronic device according to a fifth embodiment of the present invention. This example is a mef-type A]G using a p-type GaAs substrate.
The present invention is implemented in an aAs/GaAs double hetero laser, and instead of providing an insulating layer between the confinement electrode and the cladding layer, a Schottky junction between the confinement electrode and the cladding layer is used. is significantly different from the fourth embodiment.

The n-type cladding layer 4 is formed in a mesa shape, and a confinement electrode 6'' is provided on the side thereof.

In this embodiment, negatively biasing the confinement electrode 6'' results in a reverse bias between the cladding layer 4 and the confinement electrode 6''. This bends the band and traps electrons in the center of the active layer 3.

In the above embodiments, the present invention was implemented in an AlGaAs/GaAs double hetero laser, but the present invention can be similarly implemented in other optical electronic devices that require carrier confinement, such as optical amplification devices. Further, the present invention can be implemented in the same way even if an n-type substrate is used instead of a p-type substrate, and AlGa
The present invention can be similarly practiced using semiconductor light emitting materials other than As/GaAs.

When the present invention is implemented in an element having a multiple quantum well structure,
A quantum wire structure can be realized.

Furthermore, if the confinement width is made small enough to obtain a quantum effect, the quantum level can be changed depending on the confinement width. Therefore, depending on the applied voltage, the absorption coefficient and refractive index near the absorption edge can be changed significantly,
Can be applied as a modulator.

〔Effect of the invention〕

As explained above, in the optical electronic device of the present invention, the carrier confinement width can be variably controlled. Since this confinement width is not determined by photolithography, a width of 1 μm or less can be easily obtained. Furthermore, the confinement width can be narrowed to the extent that a quantum effect can be obtained, making it possible to obtain a quantum wire structure.

Furthermore, since the carrier confinement width can be controlled by the applied voltage, the confinement width can be optimally set depending on the oscillation conditions, and a stable oscillation state can be maintained. Moreover, the optical output can also be modulated by the applied voltage.

The optoelectronic device of the present invention can be manufactured by simply adding an electrode forming step to the conventional manufacturing process, and can be manufactured through a simple process.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of an optoelectronic device according to a first embodiment of the present invention. FIG. 2 is an enlarged view of the active layer and its vicinity. FIG. 3 is a diagram showing the state of bands in the vicinity of the active layer. FIG. 4 is a sectional view of an optoelectronic device according to a second embodiment of the present invention. FIG. 5 is a sectional view of an optoelectronic device according to a third embodiment of the present invention. FIG. 6 is a sectional view of an optoelectronic device according to a fourth embodiment of the present invention. FIG. 7 is a sectional view of an optoelectronic device according to a fifth embodiment of the present invention. 1... Substrate, 2... Clad layer, 3... Active layer,
4... Cladding layer, 4'... Low doped layer, 5...
Insulating layer, 6.6', 6''... Confinement electrode, 7, End... Drive electrode, 61... Substrate, 62... Clad layer, 63... Active layer, 64... Low doped layer, 65.
... Cladding layer, 66... Highly doped layer, 67... Insulating layer, 68... Confinement electrode, 69... Insulating layer,
70.71... Drive electrode. Patent applicant: Optical Measurement Technology Development Co., Ltd. -1. Agent: Naotaka Ide, patent attorney. Figure 1 Band diagram Second embodiment Fourth embodiment Figure 6 Figure 7

Claims (6)

[Claims] (1) A semiconductor active layer that is optically activated by injection of current carriers, a cladding layer that supplies carriers to this active layer, and a carrier that concentrates carriers injected into the active layer in a certain region. and a confinement means, wherein the carrier confinement means includes an electric field application means for forming a depletion layer on at least one side of the active layer and the cladding layer. (2) The cladding layer has a mesa-shaped structure, and the electric field applying means includes an insulating layer provided on the side of the cladding layer, and an electrode that applies an electric field to the cladding layer via this insulating layer. An optoelectronic device according to claim (1), comprising: (3) The active layer and the cladding layer have a mesa-shaped structure, and the electric field applying means applies an electric field to the structure via an insulating layer provided on the side of the structure and this insulating layer. An optoelectronic device according to claim 1, comprising an electrode. (4) The active layer and the cladding layer have a planar structure, and the electric field applying means includes an insulating layer provided on the surface of the structure and an electrode that applies an electric field to the structure via this insulating layer. An optoelectronic device according to claim (1), comprising: (5) The active layer and the cladding layer have a mesa-shaped structure, and the electrode means includes a Schottky junction on the side of the structure that provides a reverse bias with respect to the carrier supply layer. The optoelectronic device according to any one of items (2) to (4). (6) The optoelectronic device according to any one of claims (1) to (5), wherein the cladding layer includes a lightly doped layer provided in contact with the active layer.