JPS6331154B2 - - Google Patents

Info

Publication number
JPS6331154B2
JPS6331154B2 JP56144277A JP14427781A JPS6331154B2 JP S6331154 B2 JPS6331154 B2 JP S6331154B2 JP 56144277 A JP56144277 A JP 56144277A JP 14427781 A JP14427781 A JP 14427781A JP S6331154 B2 JPS6331154 B2 JP S6331154B2
Authority
JP
Japan
Prior art keywords
discrimination
circuit
output
current mirror
differential
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56144277A
Other languages
Japanese (ja)
Other versions
JPS5846775A (en
Inventor
Tetsuo Kubota
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP56144277A priority Critical patent/JPS5846775A/en
Publication of JPS5846775A publication Critical patent/JPS5846775A/en
Publication of JPS6331154B2 publication Critical patent/JPS6331154B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/44Receiver circuitry for the reception of television signals according to analogue transmission standards
    • H04N5/60Receiver circuitry for the reception of television signals according to analogue transmission standards for the sound signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Television Receiver Circuits (AREA)

Description

【発明の詳細な説明】 本発明はテレビジヨン受像機の音声弁別出力処
理回路に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an audio discrimination output processing circuit for a television receiver.

現在のテレビジヨン受像機では、チユーナの局
部発振周波数制御用のAFT電圧はVIF(映像中間
周波数)のキヤリア信号から作成し、音声信号の
復調はSIF(音声中間周波数)信号と上記映像キ
ヤリア信号とのビートによるインタキヤリア信号
を得て行うようにしているのが、一般的である。
しかし、この方式では、AFT電圧作成用の周波
数弁別回路と音声復調用のFM検波回路が夫々必
要であり、しかも、インタキヤリア方式の欠点で
ある“ハズ”の発生を余儀なくされることにな
る。
In current television receivers, the AFT voltage for controlling the local oscillation frequency of the tuner is created from the VIF (video intermediate frequency) carrier signal, and the demodulation of the audio signal is performed using the SIF (audio intermediate frequency) signal and the video carrier signal. Generally, this is done by obtaining an intercarrier signal based on the beat of .
However, this method requires a frequency discrimination circuit for creating the AFT voltage and an FM detection circuit for audio demodulation, and is unavoidably subject to the drawbacks of the intercarrier method.

このため、本出願人は、斯る点を考慮すること
によつて、次のような方式を先に特願昭55−
34470号で提案した。即ち、チユーナから導出さ
れるセパレートキヤリア型式のSIF信号を単一の
周波数弁別(FM検波)回路に導いて周波数弁別
し、その弁別出力から音声信号及びAFT電圧を
得るようにしたものがそれである。
Therefore, by taking these points into consideration, the present applicant has proposed the following method in the patent application filed in 1983-
Proposed in issue 34470. That is, a separate carrier type SIF signal derived from a tuner is guided to a single frequency discrimination (FM detection) circuit to perform frequency discrimination, and an audio signal and an AFT voltage are obtained from the discrimination output.

第1図は斯る方式を採用したテレビジヨン受像
機の要部概略構成を表わしており、図中のブロツ
クで示される回路はその各ブロツク内に記載の動
作を行うようになつているが、ここで注意を要す
るのは次の点である。即ち、同図のものでは、周
波数弁別回路3の出力からAFT電圧と音声信号
を得るようにしているので、上記弁別回路3の出
力をAFT電圧取り出し回路4と音声増幅回路5
に与える際に、この両回路が互いに相手側の影響
を受けないようにしなければならないことであ
る。
FIG. 1 shows a schematic configuration of the main parts of a television receiver that adopts this system, and the circuits indicated by blocks in the figure perform the operations described in each block. The following points need to be noted here. That is, in the case of the same figure, since the AFT voltage and the audio signal are obtained from the output of the frequency discrimination circuit 3, the output of the discrimination circuit 3 is sent to the AFT voltage extraction circuit 4 and the audio amplification circuit 5.
It is necessary to ensure that both circuits are not influenced by the other circuit when applying the power to the other circuit.

然るに、本発明は斯る課題の解決を目的として
なされたものであり、以下、第2図に示す本発明
の一実施例について説明する。
However, the present invention has been made to solve this problem, and one embodiment of the present invention shown in FIG. 2 will be described below.

第2図は第1図の破線で囲まれた本発明処理回
路を含む部分をIC化した場合の一実施例を示し
ており、第1図のブロツクと対応する個所には同
一図番を付している。この第2図の回路に於いて
SIF信号(中心周波数54.25MHz)は端子P1に導
入され、このSIF信号が周波数弁別(FM検波)
回路3に導かれる。
FIG. 2 shows an example in which the portion including the processing circuit of the present invention surrounded by the broken line in FIG. 1 is integrated into an IC, and parts corresponding to the blocks in FIG. are doing. In this circuit shown in Figure 2,
The SIF signal (center frequency 54.25MHz) is introduced into terminal P1, and this SIF signal is used for frequency discrimination (FM detection).
It leads to circuit 3.

前記周波数弁別回路3はトランジスタT1,T
2等からなるバツフア増幅段3a、トランジスタ
T3〜T5等からなる差動弁別段3b、外付けの
コイルL1とコンデンサC1,C2からなる180゜
移相器を備えるピークデイフアレンシヤル型に構
成されており、その弁別出力が上記差動弁別段3
bのT3,T4の各コレクタからベース接地型の
トランジスタT6,T11を夫々介して次段の
AFT電圧取り出し回路4に導かれるようになつ
ている。なお、この周波数弁別回路4の特性は第
3図のようになつている。
The frequency discrimination circuit 3 includes transistors T1, T
It is configured as a peak differential type including a buffer amplification stage 3a consisting of 2 etc., a differential discrimination stage 3b consisting of transistors T3 to T5 etc., and a 180° phase shifter consisting of an external coil L1 and capacitors C1 and C2. The discrimination output is the differential discrimination stage 3.
From the collectors of T3 and T4 of b to the next stage through common base type transistors T6 and T11
It is designed to be guided to the AFT voltage extraction circuit 4. The characteristics of this frequency discrimination circuit 4 are as shown in FIG.

前記AFT電圧取出し回路4は、第1、第2、
第3電流ミラー回路4a,4b,4cと、端子P
6に接続された外付けの抵抗Ra,Rb及びコンデ
ンサC5から構成されている。そして、第1第2
電流ミラー回路4a,4bの各入力側トランジス
タT8,T12が前述のT6,T11を夫々介し
て前記差動弁別段3bのT3,T4の各コレクタ
に各々接続され、且つ、その第1電流ミラー回路
4aの出力側トランジスタT10が第3電流ミラ
ー回路4cの入力側トランジスタT15に接続さ
れている。従つて、この各電流ミラー回路の抵抗
R13,R14及びR17〜R21の値が全て等
しいとすれば、第2電流ミラー回路4bの出力側
トランジスタT13には差動弁別段3bの一方T
4のコレクタ電流に等しい電流が流れ、第3電流
ミラー回路4cの出力側トランジスタT17には
上記差動弁別段の他方T3のコレクタ電流に等し
い電流が流れる。この結果、そのT13,T17
の電流差に応じた直流電圧が端子P6に発生する
ことになり、この電圧がAFT電圧として取り出
される訳である。
The AFT voltage extraction circuit 4 includes first, second,
Third current mirror circuits 4a, 4b, 4c and terminal P
It consists of external resistors Ra and Rb connected to 6 and a capacitor C5. And the first and second
The input transistors T8 and T12 of the current mirror circuits 4a and 4b are respectively connected to the collectors of T3 and T4 of the differential discrimination stage 3b via the aforementioned T6 and T11, respectively, and the first current mirror circuit The output side transistor T10 of the third current mirror circuit 4a is connected to the input side transistor T15 of the third current mirror circuit 4c. Therefore, if the values of the resistors R13, R14 and R17 to R21 of each current mirror circuit are all equal, the output side transistor T13 of the second current mirror circuit 4b has one T of the differential discrimination stage 3b.
4, and a current equal to the collector current of the other transistor T3 of the differential discrimination stage flows through the output transistor T17 of the third current mirror circuit 4c. As a result, T13, T17
A DC voltage corresponding to the current difference is generated at the terminal P6, and this voltage is taken out as the AFT voltage.

ここで、前記AFT電圧を作成する際に、前記
差動弁別段3bからの弁別出力中の交流分即ち音
声信号成分は前記コンデンサC5によつて平滑さ
れるので、端子P6に得られるAFT電圧は、上
記弁別出力の直流分、即ちSIF信号のキヤリア周
波数に応じて変化することになる。
Here, when creating the AFT voltage, the AC component in the discrimination output from the differential discrimination stage 3b, that is, the audio signal component, is smoothed by the capacitor C5, so the AFT voltage obtained at the terminal P6 is , will change depending on the DC component of the discrimination output, that is, the carrier frequency of the SIF signal.

なお、上記AFT電圧の特性(第4図)の直線
変化領域(W′)の傾斜は、先の周波数弁別回路
3の特性(第3図)の直線検波領域(W)のそれ
よりも充分に急峻になるように選定されており、
これはAFT感度の向上を目的としているが、斯
る点は本発明の要旨外であるので詳細な説明は省
略する。
Note that the slope of the linear variation region (W') of the above AFT voltage characteristics (Fig. 4) is much greater than that of the linear detection region (W) of the characteristics of the frequency discrimination circuit 3 (Fig. 3). It is chosen to be steep,
This is aimed at improving AFT sensitivity, but since such a point is outside the gist of the present invention, detailed explanation will be omitted.

次に音声増幅回路5は、前記第1電流ミラー回
路4aのもう一つの出力側トランジスタT7のコ
レクタ電流、即ち差動弁別段3bのT3のコレク
タ電流に等しい電流をベースに受けるトランジス
タT18及びその負荷として動作するトランジス
タT19からなるエミツタホロワ段5aと、その
エミツタホロワ出力が同一抵抗値の抵抗R24,
R25を介して各ベースに印加されるトランジス
タT19,T20及びその定電流用トランジスタ
T21等からなる差動増幅段5bと、その差動対
トランジスタの一方T20のベースに接続された
音声周波数成分減衰用の外付けコンデンサC6等
から構成されている。従つて、上記第1電流ミラ
ー回路4aのT7によつて取り出された弁別出力
が上記エミツタホロワ段5aを通つて上記差動増
幅段5bに導かれる際に、その弁別出力の直流分
は前記抵抗R24,R25によつてT17,T2
0の各ベースに印加されるが、交流分即ち音声信
号成分は前記コンデンサC6のためにT19のベ
ースにしか印加されない。その結果、上記差動増
幅段5bは弁別出力の交流分に対してのみ増幅作
用を行なうことになり、従つて、電源投入直後や
チヤンネル切換直後のようなチユーナの離調時
に、周波数弁別回路3の動作点が先の第3図のA
点からB点又はC点に移動して弁別出力の直流レ
ベルが変化しても、上記差動増幅段5bのT1
9,T20の各コレクタからは直流レベルが一定
電位に保持されたた音声信号が得られる。そし
て、この音声信号が図示しない音量制御回路等を
通つて音声出力回路に導かれる訳である。
Next, the audio amplification circuit 5 includes a transistor T18 whose base receives a current equal to the collector current of the other output side transistor T7 of the first current mirror circuit 4a, that is, the collector current of T3 of the differential discrimination stage 3b, and its load. An emitter follower stage 5a consisting of a transistor T19 operating as a transistor T19, and a resistor R24 whose emitter follower output has the same resistance value
A differential amplification stage 5b consisting of transistors T19, T20 and a constant current transistor T21 applied to each base via R25, and an audio frequency component attenuator connected to the base of one of the differential pair transistors T20. It consists of an external capacitor C6, etc. Therefore, when the discrimination output taken out by T7 of the first current mirror circuit 4a is led to the differential amplification stage 5b through the emitter follower stage 5a, the DC component of the discrimination output is transferred to the resistor R24. , T17, T2 by R25
However, the alternating current component, ie, the audio signal component, is applied only to the base of T19 due to the capacitor C6. As a result, the differential amplification stage 5b performs amplification only on the alternating current component of the discrimination output. Therefore, when the tuner is detuned, such as immediately after power-on or channel switching, the frequency discrimination circuit 5b amplifies only the AC component of the discrimination output. A in Figure 3, where the operating point of
Even if the DC level of the discrimination output changes by moving from point B to point C, T1 of the differential amplifier stage 5b
An audio signal whose DC level is kept at a constant potential is obtained from each of the collectors 9 and T20. This audio signal is then guided to the audio output circuit through a volume control circuit (not shown) or the like.

以上説明した如く、本発明の音声弁別出力処理
回路は、チユーナから導出されたセパレートキヤ
リア型式のSIF信号を入力とする周波数弁別回路
から差動型式の弁別出力を取り出すように構成
し、その差動弁別出力を電流ミラー回路に導き、
この電流ミラー回路でAFT電圧作成用の出力と
音声信号取り出し用の出力を分離して取り出すよ
うにしているので、AFT電圧作成用の回路と音
声信号取り出し用の回路が互いに相手側の影響を
受けないことになり、従つて、AFT電圧と音声
信号を正確に得ることができる。
As explained above, the audio discrimination output processing circuit of the present invention is configured to take out the differential type discrimination output from the frequency discrimination circuit which inputs the separate carrier type SIF signal derived from the tuner, and Lead the discrimination output to the current mirror circuit,
This current mirror circuit separates the output for creating the AFT voltage and the output for taking out the audio signal, so the circuit for creating the AFT voltage and the circuit for taking out the audio signal are not influenced by each other. Therefore, the AFT voltage and audio signal can be obtained accurately.

また、AFT電圧は上記差動弁別出力の双方を
利用して作成し、音声信号はその差動弁別出力の
一方から得るようにしているので、大きなAFT
電圧を得ることができる(AFTの制御感度を大
きく採れる)と共に、音声信号のデイエンフアシ
ス用の部品〔第2図中のコンデンサ(C9)〕は1
組のみ設ければよく、このため特に本発明回路を
IC化した場合には外付け部品数及び外付け端子
数が少なくなり、好適である。
In addition, the AFT voltage is created using both of the differential discrimination outputs mentioned above, and the audio signal is obtained from one of the differential discrimination outputs, so a large AFT
In addition to being able to obtain voltage (greater AFT control sensitivity), the parts for audio signal de-emphasis [the capacitor (C 9 ) in Figure 2] are 1
It is only necessary to provide the circuit of the present invention.
If it is implemented as an IC, the number of external parts and external terminals will be reduced, which is preferable.

なお、第2図の実施例では差動型式の弁別出力
を取り出す周波数弁別回路として、ピークデイフ
アレンシヤル検波器を使用したが、周波数弁別動
作に於けるAM抑圧度の低下等を若干犠牲にすれ
ば、クオドレイチヤ型検波器を使用することも考
えられる。
In the example shown in Fig. 2, a peak differential detector is used as the frequency discrimination circuit for extracting the differential type discrimination output, but this is done at the expense of reducing the degree of AM suppression in the frequency discrimination operation. If so, it may be possible to use a quadrature detector.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明を適用するテレビジヨン受像機
の要部概略構成を示すブロツク図、第2図はその
音声弁別出力処理回路の一実施例を示す回路図、
第3図及び第4図はその動作説明のための特性図
である。 3:周波数弁別回路、4:AFT電圧取り出し
回路、5:音声増幅回路、3a:差動弁別段、4
a,4b,4c:電流ミラー回路。
FIG. 1 is a block diagram showing a schematic configuration of main parts of a television receiver to which the present invention is applied, and FIG. 2 is a circuit diagram showing an embodiment of the audio discrimination output processing circuit.
FIGS. 3 and 4 are characteristic diagrams for explaining the operation. 3: Frequency discrimination circuit, 4: AFT voltage extraction circuit, 5: Audio amplification circuit, 3a: Differential discrimination stage, 4
a, 4b, 4c: current mirror circuit.

Claims (1)

【特許請求の範囲】[Claims] 1 チユーナから導出されたセパレートキヤリア
型式の音声中間周波数信号を単一の周波数弁別回
路によつて弁別し、その弁別出力からAFT電圧
と音声信号を得るようにしたテレビジヨン受像機
に於いて、前記周波数弁別回路から差動型式の弁
別出力を取り出すように構成し、その差動弁別出
力の一方に応じた同じ大きさの電流が第1電流ミ
ラー回路の二つの出力側トランジスタに夫々流れ
るようになし、その一方の出力側トランジスタか
ら音声信号を得ると共に、前記差動弁別出力の他
方に応じた電流が第2電流ミラー回路の出力側ト
ランジスタに流れるようになし、この第2電流ミ
ラー回路の出力側トランジスタに対して、前記第
1電流ミラー回路の他方の出力側トランジスタと
等しい電流が流れるように設けた第3電流ミラー
回路の出力側トランジスタを直列接続し、その接
続中点に接続した平滑用コンデンサからAFT電
圧を得るようにしたことを特徴とするテレビジヨ
ン受像機の音声弁別出力処理回路。
1. In a television receiver in which a separate carrier type audio intermediate frequency signal derived from a tuner is discriminated by a single frequency discrimination circuit, and an AFT voltage and an audio signal are obtained from the discrimination output, the above-mentioned A differential type discrimination output is taken out from the frequency discrimination circuit, and a current of the same magnitude according to one of the differential discrimination outputs flows through the two output side transistors of the first current mirror circuit, respectively. , an audio signal is obtained from one of the output side transistors, and a current corresponding to the other of the differential discrimination outputs is caused to flow to the output side transistor of the second current mirror circuit, and the output side of the second current mirror circuit is A smoothing capacitor connected to the connection midpoint of the output transistor of a third current mirror circuit connected in series so that a current equal to that of the other output transistor of the first current mirror circuit flows through the transistor. 1. A sound discrimination output processing circuit for a television receiver, characterized in that an AFT voltage is obtained from a television receiver.
JP56144277A 1981-09-11 1981-09-11 Sound discriminating output processing circuit for television receiver Granted JPS5846775A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56144277A JPS5846775A (en) 1981-09-11 1981-09-11 Sound discriminating output processing circuit for television receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56144277A JPS5846775A (en) 1981-09-11 1981-09-11 Sound discriminating output processing circuit for television receiver

Publications (2)

Publication Number Publication Date
JPS5846775A JPS5846775A (en) 1983-03-18
JPS6331154B2 true JPS6331154B2 (en) 1988-06-22

Family

ID=15358338

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56144277A Granted JPS5846775A (en) 1981-09-11 1981-09-11 Sound discriminating output processing circuit for television receiver

Country Status (1)

Country Link
JP (1) JPS5846775A (en)

Also Published As

Publication number Publication date
JPS5846775A (en) 1983-03-18

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