JPS63309073A - Still image pickup camera - Google Patents

Abstract

PURPOSE:To securely display a moving body image as a still picture at a proper position on a photographic image screen by outputting 1st and 2nd transfer pulse groups and a 3rd transfer pulse from a timing generation part in response to a shutter closing signal supplied from a control circuit. CONSTITUTION:The timing generation part 6 outputs the 1st transfer pulse group Pi, the 2nd transfer pulse group Ps, and the 3rd transfer pulse Ta in response to the shutter closing signal Stc supplied from the control circuit 10. Then the control circuit 10 when supplied with an external trigger signal Pout supplies the external trigger signal Pout as a shutter trigger signal Ps to a clear pulse generation part 20 and outputs the shutter closing signal Stc to the timing generation part 6 a shutter driving time after the shutter trigger signal is outputted to the clear pulse generation part 20. Consequently, the fast moving body image can be displayed as a still image at the prescribed position on the image pickup screen.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of the Invention) The present invention relates to a still image pickup camera using a frame transfer type or interline transfer type CCI) solid-state image pickup device.

(Prior art and its problems) FIG. 6 shows a general CCD solid-state image sensor.

This solid-state imaging device 1 includes an imaging section 2, a storage section 3, and a horizontal shift register 4. Image data (signal charge) for one horizontal line of the imaging section 2 is transferred to the storage section 3 by inputting one clock of the first transfer pulse group Pi. Image data for one horizontal line in the storage section 3 is transferred to the horizontal shift register 4 by inputting l clocks of the second transfer pulse group Ps. One image data in the horizontal shift register 4 is transferred to the outside by l clocks of the third transfer pulse T.

FIG. 7 shows a schematic configuration of a conventional still imaging camera.

5 is a photographing lens arranged in front of the solid-state image sensor l;
7 is a timing generator, 7 is a driver, 8 is an amplifier, and 9 is a signal processor.

As shown in FIG. 8, the timing generating section 6 generates a large number of pixels equal to the number of pixels of the imaging section 2 (-the number of pixels of the storage section 3) in synchronization with the vertical synchronizing signal VD during the vertical retrace period To. The first transfer pulse group Pi and the second transfer pulse group Ps are output simultaneously and continuously.

As a result, all the image data (signal charge) for one field stored in the storage section 3 is transferred to the horizontal shift register 4 and disappears, but all the image data for one field stored in the imaging section 2 is transferred to the horizontal shift register 4 and lost. is newly transferred to the storage unit 3 and stored therein. As a result, the imaging unit 2 starts accumulating signal charges for the next one field.

In this imaging section 2, the accumulation of signal charges for one field continues until the next vertical synchronization signal VD arrives. That is, the signal charge accumulation period is an l-field period, which is 1.760 seconds.

During the l-field period in which the imaging section 2 is accumulating signal charges, the second transfer pulse group Ps is outputted to the accumulation section 3 in accordance with the horizontal synchronization signal HD, and one second transfer pulse group Ps causes one The image data for the horizontal line is transferred to the horizontal shifter 1/register 4.

The image data for 1 horizontal 942 minutes transferred to the horizontal shift register 4 is outputted to the outside every image data every time the third transfer pulse Ta is input. Horizontal synchronization signal 1-ID
Since the number of third transfer pulses Ta that is greater than the number of pixels for l horizontal 942 is output between adjacent pixels, one horizontal scanning period from the input of one horizontal synchronization signal HD to the input of the next horizontal synchronization signal HD 1 (all of the image data for one horizontal line is output to the outside as a video signal.

During the l-field period work, the l stored in the storage section 3
All image data for one minute is output as a video signal.

However, in the conventional still imaging camera having such a configuration, the following problems remain.

That is, since the shutter operation timing is fixed, there is a problem in that when attempting to image a fast-moving object, it is difficult to always monitor the fast-moving object as a still image at an appropriate location on the monitor screen. Specifically, when capturing an image of a license plate of a car traveling at high speed, for example, in the still imaging camera according to the conventional example, the first and second transfer pulse groups PiSPs are fixed based on the vertical synchronization signal VD. Since the number plate is generated at a specific timing and the timing is unrelated to the driving of the car, it is difficult to constantly monitor the license plate at the optimal position on the imaging screen.

In addition, in order to use the video signal transferred from the horizontal shift register to constantly monitor the image of the moving object at the appropriate position on the imaging screen using an internal circuit, special and complicated processing is required. Since it is necessary to go through an algorithm, there are problems such as the complexity of the processing circuit configuration.

(Object of the invention) The present invention has been made in view of the above problems, and includes:
It is an object of the present invention to provide a still imaging camera that can reliably display a still image of a moving object at an appropriate position on an imaging screen.

(Structure and Effects of the Invention) [Structure] In order to achieve the above object, the present invention has the following structure.

That is, the still imaging camera of the present invention includes a CCD imaging section,
CCD consisting of CCD storage section and horizontal shift register
a solid-state imaging device; a first transfer pulse group for transferring one field's worth of accumulated signal charges in the imaging section to the accumulation section; and a first transfer pulse group for transferring one field's worth of accumulated signal charges in the accumulating section to the horizontal shift register. Timing generation for outputting a second transfer pulse group and intermittently outputs a third transfer pulse for transferring one field of image data transferred to the horizontal shift register pixel by pixel within one field period. and a group of clear pulses for transferring one field's worth of accumulated signal charge of the imaging section to the storage section in response to an input shutter trigger signal and completely clearing the imaging section are output once every two times. In a still imaging camera equipped with a CCD clear pulse generator, when an external trigger signal is given, the external trigger signal is output as the shutter trigger signal and processed, and the shutter trigger signal is output and then output. The control circuit includes a control circuit that outputs a shutter close signal to the timing generation section after the driving time has elapsed, and the timing generation section operates in response to the shutter close 1F signal given from the control circuit to generate the first transfer pulse group. , a second transfer pulse group, and a third transfer pulse.

[Effect]

The effects of this configuration are as follows.

The timing generator outputs a first transfer pulse group, a second transfer pulse group, and a third transfer pulse. and,
The imaging section of the CCD solid-state imaging device transfers the accumulation signal ri to the storage section in response to the first transfer pulse group. The storage section is
The accumulated signal charge is transferred to the horizontal soft 1 nonostar in response to the second transfer pulse group. Further, the horizontal shift register outputs image data for one field pixel by pixel in response to the third transfer pulse.

The clear pulse generating section transfers one field's worth of accumulated signal charges of the imaging section to the accumulation section in response to the shutter trigger signal, thereby clearing all accumulated signal charges of the imaging section.

When the control circuit receives an external trigger signal, the control circuit supplies the external trigger signal to the clear pulse generator as a shutter trigger signal.

Further, the control circuit outputs a shutter closing signal to the timing generating section after a lapse of the Nyatta drive time after outputting the external trigger signal to the clear pulse generating section.

〔effect〕

Therefore, according to the still imaging camera of the present invention having the above configuration and operation, when an external trigger signal is given, the external trigger signal is used as a shutter trigger signal, so that a high-speed moving object can be seen on the imaging screen. It can always be displayed as a still image at a predetermined position above. Specifically, for example, regardless of the speed of a car as a high-speed moving object, by generating an external trigger signal at the timing when the car arrives at a predetermined imaging position (the optimal position for reading the license plate), the number plate can be read. The plate can be displayed stationary at an optimal position on the imaging screen.

(Description of Embodiments) Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 is a schematic diagram of a static 1-to-411 visual camera according to an embodiment of the present invention. In FIG. 1, the same reference numerals as those shown in FIG. 7 according to the conventional example refer to the same parts, portions, etc. indicated by the reference numerals in this embodiment.

Further, unless otherwise specified, the present embodiment and the conventional example have the same configuration with respect to connection relationships and the like.

The configuration of this embodiment differs from the conventional example as follows.

The internal l trigger signal Pin is generated according to the vertical synchronization signal VD given from the timing generator 6, and the generated internal trigger signal Pin is output as the shutter trigger signal SP, while being asynchronous with the vertical synchronization signal VD. When an external trigger signal Pou is given from the outside, the external trigger signal P is given priority over the internal trigger signal Pin.
Output is processed as a shutter trigger signal SP, and an external trigger signal P is output based on the trigger signal SIJ.
After the elapsed time, the timing generating section 6 generates the no-ya-ya-stop signal Stc.
A shutter control circuit 10 is provided which outputs an output to.

The configuration of the shutter control circuit IO will be explained with reference to FIG. 2. In FIG. 2, 11 is an internal trigger signal generation circuit that receives a vertical synchronization signal VD and generates and outputs an internal trigger signal Pin after a predetermined time ta has elapsed since the vertical synchronization signal VD is applied; 12 is an internal trigger signal generation circuit; an OR gate 13 to which an internal trigger signal Pin from the generation circuit 11 and an external I/trigger signal Pout are applied;
14 is a vertical synchronizing signal differentiating circuit that differentiates the vertical synchronizing signal VD and outputs a differentiated signal Sd; 14 is a clear terminal CL to which the differentiated signal Sd is applied; a T input terminal connected to the power supply terminal;
Internal trigger signal Pin from OR gate 12.

and a D flip-flop having a D input terminal fed with an external trigger signal P out, and a Q output terminal, 1
5 is a monostable multivibrator having a time constant determined by a resistor R and a capacitor C, and has an input terminal to which the output of the D flip-flop 14 is applied, and a Q output terminal; ort gate that outputs the pulse output and external trigger signal Pout as shutter trigger signal SP; 17 is OR gate 1;
This is a shutter close signal output circuit that outputs a shutter close signal Stc to the timing generator 6 after a shutter drive time tC has elapsed since the shutter trigger signal SP is applied from the timing generator 6. 40 is A N where the input level on one side is inverted.
It is a D gate, and the external trigger signal P out is input to the input terminal on one side, and the internal trigger signal Pin is input to the input terminal on the other side.

Then, only when the internal trigger signal Pin is input, the internal trigger signal Pin is output as a shutter trigger signal SP from an output terminal to a strobe control circuit to be described later.

Returning to FIG. 1, 20 operates in response to the Nyatta trigger signal SP from the shutter control circuit 10, and continuously outputs clear pulses CP in a number greater than the prime number on the CCDCD imaging section (-the number of pixels in the CCD storage section 3). This is a CCD clear pulse generation unit that outputs. The output terminal of the CCD clear pulse generator 20 is connected to the input terminals of two OR gates 21 and 22.

The output terminal of the first transfer pulse group Pi of the timing generator 6 is connected to the other input terminal of the OR gate 21, and the output terminal of the second transfer pulse group Ps of the timing generator 6 is connected to O.
It is connected to the other input terminal of the R gate 22. The output terminals of the OR gates 21, 22 are connected to the driver 23.

30 is an internal trigger signal Pi from the shutter control circuit IO
In response to the shutter trigger signal SP based on n, the first and second transfer pulse groups Pi of the next cycle.

This is a strobe control circuit that outputs a light emission signal Sf that causes the strobe 31 to emit light during a period up to the output of Ps;
Reference numeral 2 denotes a strobe power supply circuit that applies a driving power S₻ to the strobe 31 in response to a light emission signal Sf from the strobe control circuit 31.

The other configurations are the same as those of the conventional example, so explanations will be omitted.

Next, the operation of the still imaging camera of this embodiment will be explained based on the time charts of FIGS. 3, 4, and 5.

First, the external trigger signal P of the still imaging camera of the embodiment
If out is not given, that is, the internal trigger signal P
The operation when only in is given will be explained with reference to the time chart in FIG. Figure 3 shows the vertical synchronization signal V
D, first transfer pulse group Pi, second transfer pulse group Ps
, horizontal synchronization signal HD.

3 is a time chart of a shutter trigger signal SP, a clear pulse CP, a strobe light emission pulse Sr, and a strobe drive power pulse S■.

In synchronization with the vertical synchronization signal VD, the timing generator 6 generates a first transfer pulse group Pi1, a second transfer pulse fiPs,
The third transfer pulse Ta is continuously output. The first transfer pulse group Pi and the second transfer pulse group Ps output from the timing generator 6 are each outputted from an OR gate 21.
．． 22 and the driver 7 to the CCDCD imaging section and the CCDCD storage section. The operations of the imaging section 2 and the storage section 3 based on the input of the first transfer pulse nPi and the second transfer pulse details Ps successively output from the timing generating section 6 are the same as in the conventional example.

In other words, all the image data (signal charge) for one minute of l-feel stored in the storage unit 3 is transferred to the horizontal soft recorder 4.
Instead, all the image data for one field stored in the imaging section 2 is newly transferred to the storage section 3 and stored therein.

As a result, the imaging unit 2 starts accumulating signal charges for the next one field. In this imaging unit 2, the accumulation of the signal Tr1 for the field ■ is the next vertical synchronizing signal V.
This continues until the time point before the arrival of D, that is, the time point when the clear pulse CP comes. The imaging unit 2 is accumulating signal charges.
During the field period, the second transfer pulse Ps is output to the storage section 3 for each horizontal synchronization signal HD, and one second
Image data for one horizontal line is transferred to the horizontal shift register 4 by the transfer pulse Ps. The image data for l horizontal lines transferred to the horizontal shift register 4 is
Each time a transfer pulse Ta is input, one image data is outputted to the outside.

Since the number of third transfer pulses Ta greater than the number of pixels for one horizontal line is output between adjacent horizontal synchronization signals HD, the input of one horizontal synchronization signal 1-I D is transferred from the input of one horizontal synchronization signal 1-I to the next horizontal synchronization signal 1-I. All of the image data for one horizontal line within one horizontal scanning period II up to the input of D is outputted to the outside as a video signal.

On the other hand, the shutter control circuit IO outputs a shutter trigger signal SP based on the internal trigger signal Pin after a predetermined time ta has elapsed since the vertical synchronization signal VD is applied from the timing generator 6. In response to this shutter trigger signal SP, the clear pulse generating section 20 outputs a number of clear pulses CP greater than the number of pixels of the imaging section 2. This clear pulse CP is applied to the driver 7 via OR gates 21 and 22, respectively. The driver 7 outputs the clear pulse CP to the imaging section 2 and the storage section 3, respectively.

As a result, in the imaging unit 2 and the storage unit 3 to which the clear pulse CP has been applied, all the image data for one minute of l-feel stored in the storage unit 3 is transferred to the horizontal noft reno star 4 and disappears, but instead of being lost, the image data is All the image data for 1 minute that was stored in section 2 is now stored in storage section 3.
transferred to and stored.

In this way, the signal charge is cleared and disappears in the imaging section 2. In this state, the imaging section 2 newly starts accumulating signal charges. The signal charge accumulation period tb is
This is the period from the start of the accumulation until the first transfer pulse nPi and the second transfer pulse group Ps, which are output in synchronization with the next vertical synchronization signal VD, are output.

The accumulation period tb corresponds to the shutter speed, and the faster the subject moves, the shorter the accumulation period tb. By doing so, the subject can be captured as a still image with less blur. Can be done.

Transfer from the storage unit 3 to the horizontal register 4 is performed by a second transfer pulse Ps synchronized with the horizontal synchronization signal [ID, and the horizontal shift register 4 transfers the transferred signal by a third transfer pulse Ta. 7ri (R (image data)) is output to the amplifying section 8 pixel by pixel.

Further, in response to the shutter trigger signal SP based on the internal trigger signal Pin output from the AND circuit 40 of the shutter control unit IO, a strobe light emission pulse (light emission signal) Sf is output from the strobe control circuit 31, and this light emission pulse Sf In response to this, the strobe power supply circuit 32 applies a strobe drive power pulse S■ to the strobe light 31 within the above-mentioned accumulation period tb, thereby causing the strobe light 31 to emit light. When the strobe 31 emits light in this way and the accumulation period tb is short, in other words, even if the shutter speed is fast, enough light is taken in for imaging, and as described above, there is less blurring and the image is even brighter and clearer. You can get a good image.

As mentioned above, the light emission of the stroph 31 is limited to the accumulation period tb, and does not overlap with the output timing of the next first transfer pulse group Pi1 and second transfer pulse group Ps. The smear phenomenon that occurs when light is diffused does not occur.

Next, an explanation will be given of the imaging operation when the external l trigger signal Pout is applied, but prior to that, the operation of the sensor control circuit lO will be explained based on the time chart of FIG. 4.

The time chart (a) in FIG. 4 shows the internal trigger signal Pi
This is a case where the external trigger signal P out is given to the shutter control circuit 10 temporally earlier than n. First, the time chart (a) will be explained.

Internal trigger signal generation circuit! l is the vertical synchronization signal V
Every time D is given, the internal trigger signal Pin is turned off after a predetermined time ta has elapsed from the rise of the vertical synchronizing signal VD.
It is constantly generated and output to the R gate 12.

Further, when the differential signal Sd from the differentiating circuit 13 that differentiates the vertical synchronizing signal VD is input to its clear terminal CL, D
The output potential of the output terminal Q of the flip-flop 14 becomes low level. In this state, the T
The output potential of the D flip-flop 14 whose input terminal receives the external trigger signal Pout shifts to a high level.

In response to the output potential from the D flip-flop 14 changing from low level to high level, the monostable multivibrator! 5 outputs a pulse output having a predetermined pulse width. This pulse output is the OR gate 16
The shutter trigger (is output as a signal SP).On the other hand, an internal trigger signal is generated and outputted from the internal trigger signal generation circuit 11 with a time delay from the external trigger signal P out and applied to the T input terminal of the D flip-flop 14. P
Since the output potential of the D flip-flop 14 is already at a high level, the monostable multipipe rake 15 does not operate, and the shutter trigger signal SP is considered to have responded only to the external trigger signal P out. Become.

The time chart (b) in Fig. 4 shows the internal l/rega signal Pi.
This is a case where n is applied temporally earlier than the external trigger signal P out. In this case, the internal trigger signal Pin given from the internal trigger signal generation circuit ll is
It is applied to the T input terminal of the D flip-flop 14 via the R gate 12. At this time, the D flip-flop 14 is reflagged by the differential signal Sd from the differentiating circuit 13 that differentiates the vertical synchronizing signal VD, and the output potential of its Q output terminal is at a low level. Therefore, the internal trigger signal Pi is temporally earlier than the external trigger signal Pout.
The D flip-flop 14 supplied with n operates in response to its internal trigger signal Pin, and its output potential becomes high level. Therefore, the monostable multi-bi break 15 operates in response to the change in the output potential of the D flip-flop 14 at that time and outputs the pulse output J. As a result, the shutter trigger signal SP synchronized with the internal trigger signal Pin
is applied from the OR gate 16 to the clear pulse generator 20. The clear pulse generator 20 operates in response to the glossy trigger signal SP and generates the clear pulse CP, but the OR gate 16 outputs the shutter trigger signal SP again in response to the external trigger signal Pout applied afterwards. The signal charges accumulated in the imaging section 2 and the storage section 3 based on the shutter trigger signal SP that was previously output in synchronization with the internal trigger signal Pin are cleared again, and in synchronization with the next external trigger signal P out. Based on the output shutter trigger signal SP, the imaging unit 2
Accumulation of signal charges starts (shutter opens).

Even if the external trigger signal Pout is given to the shutter control circuit 10 earlier than the internal trigger signal Pin, as in the case of ``Two Legs,'' either the internal trigger signal Pin or the external trigger signal P out is given to the shutter control circuit 10 earlier than the internal trigger signal Pin. Even when the external trigger signal Pout is applied first, the shutter trigger signal SP for shutter driving is output preferentially in synchronization with the external trigger signal Pout.

The imaging operation when a shutter trigger signal responsive to the external trigger signal P out is given will be described with reference to the time chart of FIG. 5.

The shutter trigger signal SP is given to the clear pulse generator 20. The clear pulse generator 20 outputs the clear pulse CP in the same manner as described above.

This clear pulse CP causes the accumulation signal 7IX of the imaging section 2 to
The load is cleared, and after the load is cleared, accumulation of signal charges starts (the shutter opens). The operations of the imaging section 2 and the storage section 3 that rise to the rear pulse CP in this way are the same as those described above, so a description thereof will be omitted.

Next, this shutter trigger signal SP is also given to the shutter closing signal output circuit 17. The shutter closing signal output circuit 17 outputs a shutter closing signal Stc to the timing generator 6 after a shutter drive time tC has elapsed since the shutter trigger signal SP was applied. The timing generator 6, which is supplied with the shutter closing signal Stc, outputs the first transfer pulse group Pi1 and the second transfer pulse group Ps.

When the transfer pulse groups Pi and Ps are applied, the accumulated signal charges that have been accumulated in the imaging section 2 are transferred to the accumulation section 3. This accumulated signal charge becomes the charge from when the shutter opens until it closes. Note that this transfer pulse group Pi
, Ps, the operations of the imaging section 2 and the storage section 3 are the same as described above, and therefore the explanation thereof will be omitted.

Therefore, in this embodiment, the external trigger signal p
If out is given in synchronization with the movement of a moving object, the moving object can be displayed as a still image at the optimal position on the monitor screen. It is possible to periodically display the image on the monitor.

[Brief explanation of the drawing]

1 to 5 relate to embodiments of the present invention, FIG. 1 is a schematic configuration diagram of a still imaging camera according to an embodiment of the present invention, and FIG. 2 is a circuit diagram of the gloss control circuit of FIG. 1. , FIG. 3 is a time chart for explaining the imaging operation based on the internal I trigger signal Pin. 3 is a time chart illustrating an imaging operation based on p out. 6 to 8 relate to conventional examples, FIG. 6 is a schematic configuration diagram of a general CCD solid-state image sensor, FIG. 7 is a schematic configuration diagram of a still imaging camera, and FIG. 8 is for explanation of operation. This is a time chart. 1. CCD solid-state image sensor, 2. Imaging section, 3. Storage section,
4. Horizontal shift register, 6. Timing generator, 10
- Shutter control circuit (control circuit), 20 - Clear pulse generator, 30... Strobe control circuit.

Claims (1)

[Claims] (1) A CCD solid-state imaging device consisting of a CCD imaging section, a CCD storage section, and a horizontal shift register;
Outputting a first transfer pulse group for transferring a field's worth of accumulated signal charges to the accumulation section, and a second transfer pulse group for transferring one field's worth of accumulated signal charges in the accumulation section to the horizontal shift register. In addition, a timing generation unit that intermittently outputs a third transfer pulse within one field period to transfer one field of image data transferred to the horizontal shift register pixel by pixel, and In response, a group of clear pulses for transferring one field's worth of accumulated signal charges of the imaging section to the storage section and completely clearing the imaging section is outputted one or more times.
In a still imaging camera equipped with a CD clear pulse generator, when an external trigger signal is applied from the outside,
a control circuit that outputs and processes the external trigger signal as the shutter trigger signal, and outputs a shutter close signal to the timing generator after a shutter driving time has elapsed after outputting the shutter trigger signal, the timing generator . A still imaging camera, characterized in that the camera outputs the first transfer pulse group, the second transfer pulse group, and the third transfer pulse in response to the shutter closing signal given from the control circuit.