JPS6330657B2 - - Google Patents

Info

Publication number
JPS6330657B2
JPS6330657B2 JP53094710A JP9471078A JPS6330657B2 JP S6330657 B2 JPS6330657 B2 JP S6330657B2 JP 53094710 A JP53094710 A JP 53094710A JP 9471078 A JP9471078 A JP 9471078A JP S6330657 B2 JPS6330657 B2 JP S6330657B2
Authority
JP
Japan
Prior art keywords
data
logic
output
input
control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP53094710A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5428530A (en
Inventor
Efu Getsutoson Juniaa Edowaado
Etsuchi Kerei Jon
Teii Matsukuroorin Arubaato
Jei Rasuban Donarudo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HANEIUERU INFUOOMEISHON SHISUTEMUSU Inc
Original Assignee
HANEIUERU INFUOOMEISHON SHISUTEMUSU Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by HANEIUERU INFUOOMEISHON SHISUTEMUSU Inc filed Critical HANEIUERU INFUOOMEISHON SHISUTEMUSU Inc
Publication of JPS5428530A publication Critical patent/JPS5428530A/ja
Publication of JPS6330657B2 publication Critical patent/JPS6330657B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
    • G06F5/10—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor having a sequence of storage locations each being individually accessible for both enqueue and dequeue operations, e.g. using random access memory
    • G06F5/12—Means for monitoring the fill level; Means for resolving contention, i.e. conflicts between simultaneous enqueue and dequeue operations
    • G06F5/14—Means for monitoring the fill level; Means for resolving contention, i.e. conflicts between simultaneous enqueue and dequeue operations for overflow or underflow handling, e.g. full or empty flags
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/124—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Bus Control (AREA)
  • Information Transfer Systems (AREA)
JP9471078A 1977-08-04 1978-08-04 Range counting and main memory address counter Granted JPS5428530A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/821,900 US4204250A (en) 1977-08-04 1977-08-04 Range count and main memory address accounting system

Publications (2)

Publication Number Publication Date
JPS5428530A JPS5428530A (en) 1979-03-03
JPS6330657B2 true JPS6330657B2 (US20020095090A1-20020718-M00002.png) 1988-06-20

Family

ID=25234561

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9471078A Granted JPS5428530A (en) 1977-08-04 1978-08-04 Range counting and main memory address counter

Country Status (4)

Country Link
US (1) US4204250A (US20020095090A1-20020718-M00002.png)
JP (1) JPS5428530A (US20020095090A1-20020718-M00002.png)
AU (1) AU519313B2 (US20020095090A1-20020718-M00002.png)
CA (1) CA1115424A (US20020095090A1-20020718-M00002.png)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4780808A (en) * 1981-11-27 1988-10-25 Storage Technology Corporation Control of cache buffer for memory subsystem
US4692859A (en) * 1983-05-16 1987-09-08 Rca Corporation Multiple byte serial data transfer protocol
US4549262A (en) * 1983-06-20 1985-10-22 Western Digital Corporation Chip topography for a MOS disk memory controller circuit
JPS6073868U (ja) * 1983-10-28 1985-05-24 株式会社　土屋製作所 サイクロン型プレクリ−ナ
JPS60201025A (ja) * 1984-03-27 1985-10-11 Mazda Motor Corp 圧力波過給機付エンジンの吸気系構造
JPH0760423B2 (ja) * 1984-12-24 1995-06-28 株式会社日立製作所 データ転送方式
US4821180A (en) * 1985-02-25 1989-04-11 Itt Corporation Device interface controller for intercepting communication between a microcomputer and peripheral devices to control data transfers
US4682283A (en) * 1986-02-06 1987-07-21 Rockwell International Corporation Address range comparison system using multiplexer for detection of range identifier bits stored in dedicated RAM's
US5086388A (en) * 1988-03-18 1992-02-04 Hitachi Maxell, Ltd. Semiconductor serial/parallel-parallel/serial file memory and storage system
JP2923786B2 (ja) * 1988-03-18 1999-07-26 日立マクセル株式会社 半導体ファイルメモリ及びそれを用いる記憶システム
US5206935A (en) * 1991-03-26 1993-04-27 Sinks Rod G Apparatus and method for fast i/o data transfer in an intelligent cell
US5628026A (en) * 1994-12-05 1997-05-06 Motorola, Inc. Multi-dimensional data transfer in a data processing system and method therefor
EP1316891B1 (de) * 2001-12-03 2007-10-10 Infineon Technologies AG Datenübertragungseinrichtung

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3504345A (en) * 1967-05-29 1970-03-31 Gen Electric Input/output control apparatus
US3638195A (en) * 1970-04-13 1972-01-25 Battelle Development Corp Digital communication interface
US3668645A (en) * 1970-05-25 1972-06-06 Gen Datacomm Ind Inc Programable asynchronous data buffer having means to transmit error protected channel control signals
US3665417A (en) * 1971-02-19 1972-05-23 Nasa Flexible computer accessed telemetry
NL7105512A (US20020095090A1-20020718-M00002.png) * 1971-04-23 1972-10-25
US3997878A (en) * 1973-07-27 1976-12-14 Rockwell International Corporation Serial data multiplexing apparatus
US3950735A (en) * 1974-01-04 1976-04-13 Honeywell Information Systems, Inc. Method and apparatus for dynamically controlling read/write operations in a peripheral subsystem
US3993981A (en) * 1975-06-30 1976-11-23 Honeywell Information Systems, Inc. Apparatus for processing data transfer requests in a data processing system

Also Published As

Publication number Publication date
AU519313B2 (en) 1981-11-26
US4204250A (en) 1980-05-20
CA1115424A (en) 1981-12-29
AU3832578A (en) 1980-01-31
JPS5428530A (en) 1979-03-03

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