JPS63305284A - Electronic time piece - Google Patents

Abstract

PURPOSE:To secure stable operation even if a power supply is fluctuated due to a heavy load, by isolating a power supply for a time piece circuit and a power supply for a heavy-load driving control circuit and a heavy-load driving circuit. CONSTITUTION:A time piece circuit 14 controls a heavy load system circuit 15. The heavy-load driving control circuit 15 controls a driving circuit 16 in correspondence with a control signal from the time piece circuit 14. At the time of a heavy load, the power supply of the time piece circuit 14 is protected with a power source isolating resistor 11 and a protecting capacitor 12 for the power supply of the time piece circuit. Thus the time piece circuit 14 is stably operated. Since the heavy-load driving control circuit 15 and the heavy- load driving circuit 16 are connected to the same power supply, an unnecessary current does not flow between the power supplies.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a power supply method for an electronic timepiece.

[Conventional technology]

As shown in FIG. 2, a conventional electronic watch has all the circuits 14.
The power supplies 15 and 16 are directly connected in parallel to the battery 13, which is the system power supply, and are provided on the same power supply. In addition, as shown in FIG. 3, a battery 13 and a heavy load drive circuit 16
The other circuits are separated from the drive circuit and protected by a resistor 31 that connects the other circuits 14, 15, and the protective capacitor 32 in series.

[Problem that the invention seeks to solve]

In the prior art shown in FIG. 2 described above, the drive circuit 16
When the system operates, a large current that does not normally flow flows through the system, and a large load is placed on the battery 13.

For example, the current consumption of a normal watch is several pA, but when an alarm, lamp, etc. are operated, a current of several mA or more flows. Current 13 has an internal resistance of several ohms to several hundred ohms.
Therefore, by flowing such a large current, the voltage applied to the system will be reduced, and the clock circuit will no longer be able to operate normally.

In order to solve such problems, as shown in Fig. 3,
A configuration has been adopted in which the power supplies for the heavy load drive circuit 16 and other circuits 14 and 15 are separated by a capacitor 32 and a resistor 31. However, in such a configuration, there is a problem that unnecessary current constantly flows because a potential difference occurs between the heavy load drive circuit 16 and the heavy load drive control circuit 15.

This will be explained by showing a lamp drive circuit as an example of the heavy load drive circuit 16 in FIG. 954. The lamp drive circuit is composed of a transistor 41 and a lamp 42. When an H level signal is applied from the heavy load drive control circuit 15 to the base of the transistor 41, the transistor 41 is turned on, the lamp 42 is lit, and the L level is turned on. When this signal is applied, the transistor 41 is turned off and the lamp 42 becomes an emergency light. 4 from the load drive control circuit 15 to the i transistor 4
Assume that the base of 1 is given an L level. battery 1
3 is connected to the clock circuit 14 and the heavy load drive control circuit 15 by 114.
and 115, so the resistor 3
1 also has the sum of its supply current l31 (=114 +115)
is flowing, and a potential difference is generated between both ends of the resistor 31. That is, if the voltage value of the battery 13 is E and the resistance value of the resistor 31 is R, there is a potential difference of 115XR between both ends of the resistor 31. Therefore, with respect to the power supply voltage E of the heavy load drive circuit 16, the power supply voltage of the heavy load drive control circuit 15 is E-115Xn.
=3. Assuming OV, the power supply voltage of the heavy load drive circuit 16 is 3.0XIX10X5X10=2.7V.

Therefore, even if the heavy load drive control circuit 15 gives an off signal, that is, an L level, to the transistor 41, the power supply voltage of the heavy load drive circuit 16 and the heavy load drive control circuit 15 (7 ) difference from the power supply voltage,
A potential difference of 3.0-2.7V=0.3V occurs,
There is a problem that the transistor 41 is in a half-on state, and unnecessary current flows, shortening the battery life.Also, depending on the configuration of the heavy load drive circuit 16, when driving a heavy load, the drive control circuit 15 and the heavy load may be connected to each other. A problem arises in that the clock circuit 14 and the heavy load drive control circuit 15 are affected by reducing the 1rtL source voltage via the signal line between the drive circuits 16 and the like.

This problem is caused by heavy load drive control circuit 15 or heavy load drive circuit 1.
6 is an analog signal like audio waveform data, and this becomes an even bigger problem when driving an operational amplifier in the heavy load drive circuit 16. Also, when outputting audio, problems such as deterioration of sound quality may occur. arise.

The present invention is intended to solve these problems.The purpose of the present invention is to perform stable operation even when the power supply fluctuates due to heavy loads such as lamp lighting, alarm sounding, and audio output, and to eliminate unnecessary current. Our goal is to provide an electronic watch that does not consume any energy.

[Means for solving problems]

The electronic timepiece of the present invention includes: a) a heavy-load drive circuit that flows a current of at least 1 mA; b) a timepiece circuit connected in parallel to the power supply terminal of the timepiece circuit; C) A heavy load drive circuit block consisting of the above heavy load drive circuit and a battery connected as a power source for the heavy load drive control circuit that controls the heavy load drive circuit. d) The above clock. The present invention is characterized in that the power supplies of the circuit block and the heavy load driving circuit block are connected via a power supply isolation resistor.

[Effect]

According to the above configuration of the present invention, the power supply of the timepiece circuit is protected by the power supply isolation resistor and the timepiece circuit power supply protection capacitor during heavy loads, so that the timepiece circuit can operate stably. In addition, since the heavy load drive control circuit and the heavy load drive circuit are connected to the same power supply, there is never a potential difference between the respective power supplies, and no unnecessary current flows. No matter what kind of configuration the load drive control circuit has, the power supplies for both sides are exactly the same, so problems can occur via the signal line.Input/output of the interface between the clock circuit and the heavy load drive control circuit. Since the circuit can be complementary, the power supply of the clock circuit is stable even if there is a potential difference between both power supplies. Furthermore, the fact that the single load drive control circuit and the heavy load drive circuit have the same power supply and there is no potential difference between the two Ml power supply voltages means that the signal given from the heavy load drive control circuit to the heavy load drive circuit is an analog signal. Even if the signal is transmitted, the accuracy of the signal is not degraded.

〔Example〕

EMBODIMENT OF THE INVENTION Hereinafter, the electronic timepiece of the present invention will be described in detail based on examples.

FIG. 1 is a basic system configuration diagram of an electronic timepiece according to the present invention. The clock circuit 14 includes an oscillation circuit, a frequency dividing circuit, a needle circuit, a control circuit, an input circuit, etc., and a heavy load system circuit 15.
control. The heavy load drive control circuit 15 includes a heavy load drive circuit system control circuit, input/output circuit, etc. that operates according to the control signal from the clock circuit 14, and the zero heavy load circuit 16 that controls the drive circuit 16 generates an alarm, for example. 0 clock circuit 14, which is a circuit that drives functions that are a heavy load of the clock system, such as a bell drive circuit, a lamp drive circuit, and an audio drive circuit;
The negative side sources of the heavy load drive control circuit 15 and the heavy load drive circuit 16 are separated by a power supply isolation resistor 11, and the battery 13 is connected to the heavy load drive control circuit 15 and the heavy load drive circuit 1.
1 clock circuit power protection capacitor 12 is connected to the clock circuit 14 side. Now, assume that the heavy load function is lamp lighting, and the heavy load drive circuit 16 is a lamp drive circuit as shown in Fig. flS4. When the clock circuit 14 requests the heavy load drive control circuit 15 to turn off the lamp, an L level signal is applied from the heavy load drive control circuit 15 to the base of the transistor 41 of the lamp drive circuit.

Therefore, transistor 41 is off, and transistor 4
No current flows between the collector emitter and the base emitter of 1. Now, if the voltage of the battery 13 is EX, the resistance value of the voltage separation resistor 11 is R1, and the current consumption of the clock circuit 14 is 2, then the clock circuit 14 and An RXI port potential difference occurs between the heavy load drive control circuit 15 and the heavy load drive circuit 15. However, since there is no potential difference between the heavy load drive control circuit 15 and the heavy load drive circuit 16, and the transistor 41 can be completely turned off, no unnecessary current flows. On the other hand, if the clock circuit 14 requests the heavy load drive circuit 15 to turn on the lamp, the heavy load drive circuit 15
An H level signal is applied to the base of the transistor 41 of the lamp drive circuit, the transistor 41 is turned on, a current flows between the collector and emitter, and the lamp is lit. At this time, due to the internal resistance of the battery 13, the heavy load drive control circuit 1
5 and the heavy load drive circuit 16, the power supply voltage of the clock circuit 14 is protected by the power supply isolation resistor 11 and the clock circuit power protection capacitor 12 without being strongly affected by the heavy load, so it remains stable. can perform actions. Moreover, the heavy load drive control circuit 15 and the heavy load drive circuit 1
Regardless of the configuration of the clock circuit 14, the heavy load drive control circuit 15, and the heavy load There is a potential difference between the RXI port and the drive circuit 16, but in the case of a clock system, the input/output circuits of the clock circuit 14 and the heavy load drive control circuit 15 are capacitors, so both sides can correctly receive the other party's signals. Even if it cannot be received, unnecessary current will not continue to flow, and the clock circuit 14 will not be affected and can operate safely.

FIG. 5 shows a system configuration diagram of a clock that outputs audio as an example of an electronic clock. Here, the heavy load drive control circuit is the voice synthesis circuit 5, and the heavy load drive circuit includes the audio driver circuit 56 and the speaker 57. It is. The voice is synthesized by the voice synthesis circuit 55, and the voice driver circuit 56
is given analog audio data, and the speaker 57 is driven. In the audio driver circuit 56, audio data is input to an operational amplifier, etc., and if there is a potential difference between the power supply voltages of the audio synthesis circuit 55 and the audio driver circuit 57, unnecessary current will flow, but according to the configuration of the present invention, By performing the same operation as the configuration shown in FIG. 4, such problems do not occur, and the clock circuit 14 is protected and can operate stably even during voice production. Furthermore, when the structure of Wood's invention is used for a clock that outputs audio in this way, since the signal that the audio synthesis circuit 55 gives to the audio driver circuit 56 is an analog signal,
It does not cause the problem of sound quality deterioration that would occur if the power supply voltages of the voice synthesis circuit 55 and the voice driver circuit 56 are different.Furthermore, it does not cause the problem of sound quality deterioration that occurs when the power supply voltages of the voice synthesis circuit 55 and the voice driver circuit 56 are different.
If the i! is momentarily disconnected, the voice synthesis circuit 55 and the voice driver circuit 56 and the i! ! /A? ! ! The clock circuit 14 can operate safely even if the pressure drops to an extreme level and it becomes completely inoperable. The values of the power supply isolation resistor 11 and the clock circuit power protection capacitor 12 added here are, for example, IKΩ~4Ω, F~5 for l.
# About LF.

〔Effect of the invention〕

As described above, according to the present invention, the power supply for one clock circuit is separated from the power supplies for the heavy load drive control circuit and the heavy load drive circuit, so even when a heavy load is applied and the power supply for the heavy load drive circuit is separated, This has the effect that the clock circuit can operate safely even if the battery is momentarily disconnected. Also, is it unnecessary because there is no potential difference between the heavy load drive circuit and the heavy load drive control circuit when there is no sub-load? This has the effect that the lf flow does not flow.

Furthermore, when the signal given by the heavy load drive control circuit to the heavy load drive circuit is an analog signal, there is an effect that the precision of the signal is not degraded.

[Brief explanation of drawings]

FIG. 1 is a basic configuration diagram of the electronic timepiece of the present invention. Figure 2 is a configuration diagram of a conventional electronic watch. Figure 3 is a configuration diagram of a conventional electronic watch. FIG. 4 is a configuration diagram of a lamp drive circuit as an example of a heavy load circuit. FIG. 5 is a configuration diagram of an electronic clock that outputs audio as an embodiment of the invention. Applicants: Seiko Epson Co., Ltd. Representative Patent Attorney Tsutomu Mogami and 1 other Article l Figure $ 219 No. 3'B Ei l Transmission 7 -

Claims (1)

[Scope of Claims] a) An electronic watch having a heavy load drive circuit that flows a current of at least 1 mA, b) a watch circuit and a watch circuit power protection capacitor connected in parallel to a power terminal of the watch circuit. c) a heavy load drive circuit block consisting of the heavy load drive circuit and a battery connected to a power source of a heavy load drive control circuit that controls the heavy load drive circuit; d) the clock circuit block and the heavy load drive circuit block are connected to each other via a power supply isolation resistor.