JPS63301576A - Manufacture of superconducting circuit - Google Patents

Manufacture of superconducting circuit

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Publication number
JPS63301576A
JPS63301576A JP62137986A JP13798687A JPS63301576A JP S63301576 A JPS63301576 A JP S63301576A JP 62137986 A JP62137986 A JP 62137986A JP 13798687 A JP13798687 A JP 13798687A JP S63301576 A JPS63301576 A JP S63301576A
Authority
JP
Japan
Prior art keywords
super
layers
lattice layers
superlattice
heat treatment
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62137986A
Other languages
Japanese (ja)
Inventor
Takao Shioda
塩田 孝夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujikura Ltd
Original Assignee
Fujikura Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujikura Ltd filed Critical Fujikura Ltd
Priority to JP62137986A priority Critical patent/JPS63301576A/en
Publication of JPS63301576A publication Critical patent/JPS63301576A/en
Pending legal-status Critical Current

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  • Superconductor Devices And Manufacturing Methods Thereof (AREA)

Abstract

PURPOSE:To facilitate obtaining flat electric circuits by a method wherein a plurality of super-lattice layers of oxide superconductor and super-lattice layers of insulator or semiconductor are alternately laminated and the parts of the super-lattice layers which do not constitute electric circuits are subjected to a heat treatment so as to disorder the super-lattice structures of those parts. CONSTITUTION:Oxide superconductor crystals are made to grow on the surface of a substrate 1 to form super-lattice layers 2 and insulator crystals are made to grow on the surfaces of the super-lattice layers 2 to form super-lattice layers 3. If the parts of the super-lattice layers 2 and 3 which do not constitute electric circuits are subjected to a heat treatment, atoms constituting the superconductor of the super-lattice layers 2 and atoms constituting the insulator of the super- lattice layers 3 are diffused and mixed with each other and the super-lattice structures of those parts are disordered. Therefore, the parts subjected to the heat treatment are converted into metal oxide insulators 4. The parts which are not subjected to the heat treatment show excellent superconducting properties by the existence of the super-lattice layers 2 and constitute electric circuits 5. The surface of such electric circuits 5 coincide with the surfaces of the insulators and do not protrudes like the surfaces formed by deposition.

Description

【発明の詳細な説明】 [産業上の利用分野] この発明は、基板の表面に酸化物超電導体の超格子層を
形成することにより、ジョセフソン素子や三端子素子等
から構成される論理回路、記憶回路などを形成する超電
導回路の製造方法に関するものである。
[Detailed Description of the Invention] [Field of Industrial Application] This invention provides a logic circuit composed of Josephson elements, three-terminal elements, etc. by forming a superlattice layer of an oxide superconductor on the surface of a substrate. , relates to a method of manufacturing a superconducting circuit for forming a memory circuit or the like.

[従来の技術] 近時、臨界温度が50に以上のY−Ba−Cu−0系、
Y−Ba−Cu−0系などの一般に化学式A−B−Cu
−0(A : S c、Y、L a−の周期律表第■1
族金属元素、B : B2L、S r、Be−のアルカ
リ土類金属)で表される酸化物系超電導体が続々と見い
出されつつあり、さらに、このような酸化物系超電導体
を基板上に電気回路として形成し、集積回路を製造する
ことが試みられている。
[Prior art] Recently, Y-Ba-Cu-0 systems with a critical temperature of 50 or higher,
Generally chemical formula A-B-Cu such as Y-Ba-Cu-0 system
-0 (A: S c, Y, La- Periodic Table ■1
Oxide-based superconductors represented by group metal elements, B: B2L, Sr, Be- alkaline earth metals) are being discovered one after another, and furthermore, it is possible to fabricate such oxide-based superconductors on a substrate. Attempts have been made to form it as an electrical circuit and manufacture integrated circuits.

このような超電導回路を形成するには、堰板1−に上記
酸化物系の超電導材料からなる超電導原料層をスパッタ
法などにより均一に形成した後、ドライエツチングおよ
びディポジション等の工程を経て所望の超電導体の回路
を得る方法が現在のところ実施されている。
To form such a superconducting circuit, a superconducting raw material layer made of the above-mentioned oxide-based superconducting material is uniformly formed on the weir plate 1- by sputtering or the like, and then a desired layer is formed through processes such as dry etching and deposition. Methods for obtaining superconductor circuits are currently in use.

[発明が解決しようとする問題点] ところが、上記のようにして得られる超電導回路におい
ては、その表面にディボンジョンにより形成される起伏
の激しい凹凸が存在しているため、超電導体と接合性の
悪い絶縁層などが剥離し易くなり、回路を集積化するこ
とが困難であった。このため、平坦な回路を形成するこ
とができ、超電導体と絶縁層などとの接合性を向上させ
ることができる回路の製造方法が必要とされているのが
現状である。
[Problems to be Solved by the Invention] However, in the superconducting circuit obtained as described above, since the surface thereof has severe unevenness formed by debonding, it is difficult to bond with the superconductor. Insulating layers with poor quality are likely to peel off, making it difficult to integrate circuits. Therefore, there is currently a need for a circuit manufacturing method that can form a flat circuit and improve the bonding properties between a superconductor and an insulating layer.

[発明の目的] この発明は上記事情に鑑みてなされたもので、・V坦な
電気回路を得ることができ、したがって回路を高集積化
することができる超電導回路の製造方法を提供すること
を目的としている。
[Object of the Invention] This invention was made in view of the above circumstances, and has the following objects: - To provide a method for manufacturing a superconducting circuit that can obtain a V-flat electric circuit and, therefore, can highly integrate the circuit. The purpose is

[問題点を解決するだめの手段] この発明の超電導回路の製造方法は、基材の表面に、酸
化物超電導体からなる超格子層と絶縁体または半導体の
超格子層とを交互に複数層形成し、これら超格子層のう
ち電流回路を構成する部分以外の箇所に、その箇所に積
層された超格子層の超格子構造を無秩序化する加熱処理
を施すことを特徴としている。
[Means for Solving the Problems] The method for manufacturing a superconducting circuit of the present invention includes alternating multiple layers of superlattice layers made of an oxide superconductor and superlattice layers of an insulator or semiconductor on the surface of a base material. The method is characterized in that the superlattice layers are formed, and heat treatment is applied to portions of these superlattice layers other than the portions constituting the current circuit to disorder the superlattice structure of the superlattice layers laminated at those portions.

[作用] 加熱処理が施された超格子層は、超電導体と絶縁体等の
原子どうしが拡散混合してその構造が無秩序化し、絶縁
体あるいは半導体となる。一方、加熱処理が施されない
部分は、完全な単結晶組織である超電導体の超格子層の
存在により極めて良好な超電導性を発揮し、所定の電流
回路を構成する。
[Operation] In the superlattice layer subjected to the heat treatment, atoms of the superconductor and the insulator diffuse and mix with each other, and the structure becomes disordered, and becomes an insulator or a semiconductor. On the other hand, the portion that is not subjected to heat treatment exhibits extremely good superconductivity due to the presence of a superlattice layer of a superconductor having a perfect single crystal structure, and forms a predetermined current circuit.

[実施例] 以下、本発明の一実施例について第1図および第2図を
参照しながら説明する。まず、基板Iの表面において酸
化物超電導体の結晶を成長させて超格子層2を形成する
。ここで、基板1の材料としては、S i、Al2O3
,Ti5rOa、LiNbo3.GaAs等を使用する
。また、超格子層2は、A−B−Cu−0系(ただし、
Aは、Y、La、Ce、Sc、Yb、Pr、Nd、Pm
、Sm。
[Example] Hereinafter, an example of the present invention will be described with reference to FIGS. 1 and 2. First, a superlattice layer 2 is formed by growing crystals of an oxide superconductor on the surface of the substrate I. Here, the material of the substrate 1 is Si, Al2O3
, Ti5rOa, LiNbo3. GaAs or the like is used. Moreover, the superlattice layer 2 is based on AB-Cu-0 (however,
A is Y, La, Ce, Sc, Yb, Pr, Nd, Pm
, Sm.

Eu、Gd、Tb、Dy、Ha、Er、Tm、LU等の
[[a族金属元素、BはBa、Sr、Ca。
[[A group metal elements such as Eu, Gd, Tb, Dy, Ha, Er, Tm, LU, B is Ba, Sr, Ca.

Be、Ra、Mg等のアルカリ土類金属元素)の酸化物
超電導体とする。
An oxide superconductor of alkaline earth metal elements such as Be, Ra, Mg, etc.

超格子層2の形成に際しては、MBE法、MOCVD法
、M OM B E法、L P E法(液相成長法)、
スパッタ法などを用いるが、MOCVD法とMOM B
 E法とを組み合わせて使用すれば良好な超格子構造を
得ることができる。また、この場合に使用する原料とし
ては、上記酸化物超電導体を構成する金属元素の有機化
合物(例えば、アルコキッド化合物、アセデルアセトン
化合物、ンクロペ/タノエニル化合物など)を用いれば
原料の蒸発量の制御を容易にすることができる。
When forming the superlattice layer 2, MBE method, MOCVD method, MOMBE method, LPE method (liquid phase epitaxy),
Although sputtering method etc. are used, MOCVD method and MOMB
If used in combination with the E method, a good superlattice structure can be obtained. In addition, if the raw material used in this case is an organic compound of the metal element constituting the oxide superconductor (e.g., alkokid compound, acedelacetone compound, ncrope/tanoenyl compound, etc.), the amount of evaporation of the raw material can be reduced. Control can be facilitated.

次に、上記超格子層2の表面において、MB E法など
により絶縁体の結晶を成長させ、超格子層3を形成する
。超格子層3の材料としては、例えば金属酸化物を使用
するが、超格子層2の組成に含まれる金属元素の酸化物
を使用すれば、加熱処理による超格子層2との拡散混合
を良好に行うことができる。また、B2O3,P2O5
等の拡散し易い材料を用いても良い。そして、このよう
にして超格子層2,3を交互に複数層形成する(第2図
参照)。ここて、超格子層2.3の亨さは20〜200
人とする。また、超格子層2,3は5〜100層程度形
成する。
Next, an insulator crystal is grown on the surface of the superlattice layer 2 by MBE method or the like to form a superlattice layer 3. For example, a metal oxide is used as the material for the superlattice layer 3, but if an oxide of a metal element included in the composition of the superlattice layer 2 is used, diffusion mixing with the superlattice layer 2 by heat treatment can be improved. can be done. Also, B2O3, P2O5
You may use the material which spreads easily, such as. In this way, a plurality of superlattice layers 2 and 3 are alternately formed (see FIG. 2). Here, the thickness of the superlattice layer 2.3 is 20 to 200
Be with people. Further, about 5 to 100 superlattice layers 2 and 3 are formed.

次に、上記のように構成した超格子層2,3のうち、電
気回路を構成しない箇所に加熱処理を施す。加熱処理は
、超格子層2.3の該当部分に電子ヒーム、イオンビー
ム、レーザービーム等を照射して行う。すると、超格子
層2の超電導体を構成する原子と、超格子層3の絶縁体
を構成する原子とが互いに拡散混合され、超格子構造が
無秩序化する。このため、加熱処理が施された箇所は金
属酸化物の絶縁体4となる。一方、加熱処理が施されな
い箇所は、完全な単結晶組織である超電導体の超格子層
2の存在により極めて良好な超電導性を発揮し、所定の
電流回路5を構成する(第1図参照)。そして、このよ
うな電気回路5の表面は絶縁体4の表面と一致しており
、ディボジンヨンにより形成されるもののように凸状と
なることがない。なお、上記実施例では電気回路5以外
の箇所に絶縁体4を形成しているが、超格子層3の材料
を適宜選定することにより半導体を形成しても良い。
Next, of the superlattice layers 2 and 3 configured as described above, portions that do not constitute an electric circuit are subjected to heat treatment. The heat treatment is performed by irradiating the corresponding portion of the superlattice layer 2.3 with an electron beam, an ion beam, a laser beam, or the like. Then, the atoms constituting the superconductor of the superlattice layer 2 and the atoms constituting the insulator of the superlattice layer 3 are diffused and mixed with each other, and the superlattice structure becomes disordered. Therefore, the portion subjected to the heat treatment becomes an insulator 4 of metal oxide. On the other hand, the areas that are not subjected to heat treatment exhibit extremely good superconductivity due to the presence of the superlattice layer 2 of the superconductor, which is a perfect single crystal structure, and form a predetermined current circuit 5 (see Figure 1). . The surface of such an electric circuit 5 is coincident with the surface of the insulator 4, and does not have a convex shape unlike that formed by divination. In the above embodiment, the insulator 4 is formed at a location other than the electric circuit 5, but a semiconductor may be formed by appropriately selecting the material of the superlattice layer 3.

このような超電導回路の製造方法によれば、凹凸の存在
しない平坦な電気回路5を得ることができるので、それ
らの表面に形成される絶縁層などとの接合性が大幅に改
善される。したがって、極めて微小な部分に絶縁層を形
成してもこれが剥離するようなことがなく、回路を高集
積化することが可能である。また、このようにして形成
される電気回路5の表面に絶縁層を介してさらに電気回
路を形成することができ、超電導回路の三次元化を容易
に行うことができる。さらに、超格子層3を半導体によ
って構成することにより、ノヨセフソン素子等のスイッ
チング素子を形成することも可能であり、実用上極めて
有望である。
According to such a method of manufacturing a superconducting circuit, it is possible to obtain a flat electric circuit 5 without any unevenness, and thus the bondability with an insulating layer formed on the surface thereof is greatly improved. Therefore, even if an insulating layer is formed in an extremely small portion, the insulating layer will not peel off, making it possible to highly integrate the circuit. Further, an electric circuit can be further formed on the surface of the electric circuit 5 formed in this way via an insulating layer, and a superconducting circuit can be easily made three-dimensional. Furthermore, by forming the superlattice layer 3 from a semiconductor, it is also possible to form a switching element such as a Noyosefson element, which is extremely promising in practice.

[製造例] Si等からなる基板を約800℃に加熱した状態でその
表面にガスソースMBE装置により超格子層を形成した
。ここで、原料ガスとしては、アセチルアセトンバリウ
ム(B a (CtH70*)t)、ンクロヘンタジエ
ニエルイットリウム(Y (C5H、)3) 、ンクロ
ペンタジェニル銅トリエチルリン(Cu (CsHs)
) ・P (CtHs)3を使用した。これら原料ガス
は150°Cに保ち、10−’Torrの微酸素性雰囲
気において分子線エビタキンーを行った。これによって
、基板の表面に、厚さ100人のB2Lo8Yo4Cu
O4の超格子層と、厚さ60人のY、03の超格子層を
交互に20層形成した。
[Manufacturing Example] A superlattice layer was formed on the surface of a substrate made of Si or the like heated to about 800° C. using a gas source MBE apparatus. Here, the raw material gases include barium acetylacetonate (B a (CtH70*)t), ncropentadienyl yttrium (Y (C5H,)3), and ncropentadienyl copper triethylphosphorus (Cu (CsHs)).
) ·P (CtHs)3 was used. These raw material gases were maintained at 150° C., and molecular beam electrolysis was performed in a slightly oxygen atmosphere of 10-' Torr. As a result, a thickness of 100 mm of B2Lo8Yo4Cu is applied to the surface of the substrate.
20 O4 superlattice layers and 60 Y, 03 superlattice layers were alternately formed.

次に、NdYAGレーザーを用いて超格子層の所定箇所
に加熱処理を施した。NdYAGレーザーの出力は10
0Wとし、レーザービーム径は3μm、走査速度は10
Cm/minとした。加熱処理した超格子層の温度は推
定1100°Cであった。このようにして得られた超電
導回路は極めて平坦であり、その臨界温度を四端子法に
より測定したところ93にであった。また、臨界電流は
500 A / Cm ”であった。
Next, a predetermined portion of the superlattice layer was subjected to heat treatment using an NdYAG laser. The output of the NdYAG laser is 10
The power was 0W, the laser beam diameter was 3μm, and the scanning speed was 10
Cm/min. The temperature of the heat-treated superlattice layer was estimated to be 1100°C. The superconducting circuit thus obtained was extremely flat, and its critical temperature was 93 when measured by the four-terminal method. Moreover, the critical current was 500 A/Cm''.

[発明の効果] 以上説明したようにこの発明の超電導回路の製造方法に
よれば、基材の表面に、酸化物超電導体からなる超格子
層と絶縁体または半導体の超格子層とを交互に複数層形
成し、これら超格子層のうち電流回路を構成する部分以
外の箇所に、その箇所に積層された超格子層の超格子構
造を無秩序化する加熱処理を施すから、平坦な電気回路
を得ることができ、したがって回路を高集積化すること
かでき、超電導回路の製造方法として実用上極めて有望
である。
[Effects of the Invention] As explained above, according to the method for manufacturing a superconducting circuit of the present invention, a superlattice layer made of an oxide superconductor and a superlattice layer made of an insulator or semiconductor are alternately formed on the surface of a base material. Multiple layers are formed, and heat treatment is applied to parts of these superlattice layers other than the parts that constitute the current circuit to disorder the superlattice structure of the superlattice layers stacked at that part, so a flat electric circuit can be created. Therefore, the circuit can be highly integrated, and it is extremely promising in practice as a method for manufacturing superconducting circuits.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図および第2図は本発明の一実施例を示す図であっ
て、第1図は超電導体回路を示す側断面図、第2図は加
熱処理を施す前の状態を示す側断面図である。 ■・・・・・基板、2・・・・・・超格子層、3・・・
・・超格子層。
1 and 2 are diagrams showing one embodiment of the present invention, in which FIG. 1 is a side sectional view showing a superconductor circuit, and FIG. 2 is a side sectional view showing a state before heat treatment. It is. ■...Substrate, 2...Superlattice layer, 3...
...Superlattice layer.

Claims (2)

【特許請求の範囲】[Claims] (1)基材の表面に、酸化物超電導体からなる超格子層
と絶縁体または半導体の超格子層とを交互に複数層形成
し、これら超格子層のうち電流回路を構成する部分以外
の箇所に、その箇所に積層された超格子層の超格子構造
を無秩序化する加熱処理を施すことを特徴とする超電導
回路の製造方法。
(1) Multiple layers of superlattice layers made of oxide superconductors and superlattice layers of insulators or semiconductors are alternately formed on the surface of the base material, and the portions of these superlattice layers other than those constituting the current circuit are 1. A method for manufacturing a superconducting circuit, comprising subjecting a portion to heat treatment to disorder the superlattice structure of a superlattice layer laminated at that portion.
(2)上記超格子層の材料として有機金属化合物を使用
することを特徴とする特許請求の範囲第1項記載の超電
導回路の製造方法。
(2) The method for manufacturing a superconducting circuit according to claim 1, characterized in that an organometallic compound is used as a material for the superlattice layer.
JP62137986A 1987-06-01 1987-06-01 Manufacture of superconducting circuit Pending JPS63301576A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62137986A JPS63301576A (en) 1987-06-01 1987-06-01 Manufacture of superconducting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62137986A JPS63301576A (en) 1987-06-01 1987-06-01 Manufacture of superconducting circuit

Publications (1)

Publication Number Publication Date
JPS63301576A true JPS63301576A (en) 1988-12-08

Family

ID=15211386

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62137986A Pending JPS63301576A (en) 1987-06-01 1987-06-01 Manufacture of superconducting circuit

Country Status (1)

Country Link
JP (1) JPS63301576A (en)

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