JPS63299163A - Photosemiconductor integrated circuit - Google Patents
Photosemiconductor integrated circuitInfo
- Publication number
- JPS63299163A JPS63299163A JP62134650A JP13465087A JPS63299163A JP S63299163 A JPS63299163 A JP S63299163A JP 62134650 A JP62134650 A JP 62134650A JP 13465087 A JP13465087 A JP 13465087A JP S63299163 A JPS63299163 A JP S63299163A
- Authority
- JP
- Japan
- Prior art keywords
- type
- layer
- photodiode
- transistor
- diffused
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims abstract description 14
- 238000006243 chemical reaction Methods 0.000 claims abstract description 6
- 230000003287 optical effect Effects 0.000 claims description 7
- 239000004065 semiconductor Substances 0.000 claims description 7
- 230000035945 sensitivity Effects 0.000 abstract description 3
- 238000002955 isolation Methods 0.000 abstract 2
- 238000000926 separation method Methods 0.000 description 4
- 238000009792 diffusion process Methods 0.000 description 3
- 230000032798 delamination Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 230000007423 decrease Effects 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
Landscapes
- Light Receiving Elements (AREA)
- Solid State Image Pick-Up Elements (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はホトダイオードとその他の回路素子をひとつの
半導体基板上に集積させた光半導体集積回路に関し、特
にコンパクトディスクの受光部に用いる光半導体集積回
路Ｃ以下０ＦＴＯＩＣという）に関する。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to an optical semiconductor integrated circuit in which a photodiode and other circuit elements are integrated on a single semiconductor substrate, and particularly to an optical semiconductor integrated circuit used in a light receiving section of a compact disc. Regarding circuit C (hereinafter referred to as 0FTOIC).
従来、この種の０ＦＴＯＩＣは、第３図の断面図に示す
様に、Ｐｆｆｉ基板１１ＫｍＮＷＩＬ埋込層１２を拡散
し、Ｎ戯エピタキシャル層１３を形成し、公知の拡散技
術を使用して、ホトダイオードのアノード層６．トラン
ジスタのペース層７及びエミ。Conventionally, this type of 0FTOIC is manufactured by diffusing a Pffi substrate 11KmNWIL buried layer 12 to form an NWIL epitaxial layer 13, and using a known diffusion technique to form a photodiode. Anode layer 6. Transistor paste layer 7 and emitter.
り層８を拡散して−る。なお、９はホトダイオード部の
周囲を囲むＮ十分離層、１０はトランジスタ部の周囲を
囲むＰ十分離層である。The layer 8 is diffused. Note that 9 is an N sufficient separation layer surrounding the photodiode section, and 10 is a P sufficient separation layer surrounding the transistor section.
コンパクトディスクの受光部は、光ディスクで反射した
レーザ光をホトダイオードで受けて光信号を光電流とし
て電気信号に変換し、その後Ｉ／Ｖ変換する構成になっ
ているが、ホトダイオードの光電流が微小なので周辺の
ノイズの影響を受けやすい、そのため、この光電流を電
圧に変換するＩ／Ｖ変換までを集積化することによシ耐
ノイズ性を向上させている。しかしながら、上述した従
来構造では、次の様な欠点がある。すなわち、ホトダイ
オードを除く回路部の高速化の為にエピタキシアル層１
３の厚さを薄くしなければならず、シタがって、エピタ
キシアル層１３の厚さに比例するホトダイオードの感度
が低下し％また、ホトダイオードに入射した光が埋込層
１２まで到達し、そこで発生する光拡散電流の為にホト
ダイオードの応答速度が遅くなるという短所がある。The light receiving section of a compact disc is configured such that a photodiode receives the laser light reflected by the optical disc, converts the optical signal into an electrical signal as a photocurrent, and then performs I/V conversion, but since the photocurrent of the photodiode is minute, It is easily affected by surrounding noise, so noise resistance is improved by integrating up to the I/V conversion that converts this photocurrent into voltage. However, the conventional structure described above has the following drawbacks. In other words, in order to increase the speed of the circuit section excluding the photodiode, the epitaxial layer 1
The thickness of the epitaxial layer 13 has to be made thinner, and as a result, the sensitivity of the photodiode, which is proportional to the thickness of the epitaxial layer 13, decreases. There is a disadvantage that the response speed of the photodiode is slow due to the light diffusion current generated therein.
上記問題点に対し本発明では、Ｎ型基板上の一部の領域
にＰ型埋込層を形成し、その領域にホトダイオードを除
く電流電圧変換回路を形成し、他の領域にホトダイオー
ドを′形成している。In order to solve the above problems, in the present invention, a P-type buried layer is formed in a part of the N-type substrate, a current-voltage conversion circuit excluding the photodiode is formed in that region, and a photodiode is formed in the other region. are doing.
次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第１図は本発明の一実施例の断面図である。Ｎ＋−１−
のＮ型基板１のホトダイオード部以外の領域にＰ型埋込
層２を拡散し、つぎに、Ｎｌｌの第１エピタキシアル層
３を成長し、トランジスタ部のコレクタ領域にＮ型埋込
層４を拡散し、さらに、Ｎ型の第２エピタキシアル層５
を成長し、ホトダイオード部にＰ型アノード層６、トラ
ンジスタ部にＰ型代−ス層７を拡散し、さらにベース層
７にＮ型エミ、り層８を拡散する。こうして、Ｎ基板上
にホトダイオードを含んだ集積回路装置を製造する。FIG. 1 is a sectional view of an embodiment of the present invention. N+-1-
A P-type buried layer 2 is diffused in a region other than the photodiode portion of the N-type substrate 1, and then a first epitaxial layer 3 of Nll is grown, and an N-type buried layer 4 is grown in the collector region of the transistor portion. The N-type second epitaxial layer 5 is diffused.
A P-type anode layer 6 is grown in the photodiode section, a P-type substitute layer 7 is diffused in the transistor section, and an N-type emitter layer 8 is further diffused in the base layer 7. In this way, an integrated circuit device including a photodiode on the N substrate is manufactured.
なお、ホトダイオード部の周囲はＮ十分離層９で、トラ
ンジスタ部の周囲はＰ十分離層１０により囲んでいる。Note that the photodiode section is surrounded by an N-sufficient separation layer 9, and the transistor section is surrounded by a P-sufficient separation layer 10.
第２図は本発明の実施例２の断面図である。鰍のＮ型基
板１にＰ型埋込層２を拡散した後、ホトダイオードの要
求特性を満たす厚さにＮ型エピタキシアル層３を成長し
、つぎにＰ型アノード層６とドレイン・ソース層１５を
拡散することによシホトダイオードとＭＯＳＦＥＴを同
時に作）込む。FIG. 2 is a sectional view of Example 2 of the present invention. After diffusing a P-type buried layer 2 into an N-type substrate 1, an N-type epitaxial layer 3 is grown to a thickness that satisfies the required characteristics of the photodiode, and then a P-type anode layer 6 and a drain/source layer 15 are grown. By diffusing , a photodiode and a MOSFET are simultaneously fabricated.
なお、１６はＭＯＳＦＥＴのケート電極である。本実施
例はエピタキシアル成長が１回で済むので工程の簡略化
が出来る。Note that 16 is a gate electrode of the MOSFET. In this embodiment, epitaxial growth can be performed only once, so the process can be simplified.
以上説明したように本発明は、Ｎ＋十のＮ型基板を使用
することによプ、基板に入射した光による光拡散電流は
基板濃度が高い為にすぐに再結合してしまい、ホトダイ
オードの高速性をそこなうことがない。また、ホトダイ
オード部のエピタキシアル層厚さとトランジスタ部のエ
ピタキシアル層厚さの各々最適値を選択出来るので、ホ
トダイオードの感度をそこなわず、かつトランジスタも
高速設計出来るという効果がある。As explained above, the present invention uses an N type substrate (N+10), and the light diffusion current caused by the light incident on the substrate is quickly recombined due to the high concentration of the substrate. It won't damage your sexuality. Further, since the optimum values of the epitaxial layer thickness of the photodiode section and the epitaxial layer thickness of the transistor section can be selected, there is an effect that the sensitivity of the photodiode is not impaired and the transistor can be designed at high speed.
第１図は本発明の一実施例の断面図、第２図は本発明の
実施例２の断面図、第３図は従来の光半導体集積回路の
断面図である。
１・・・・・・Ｎ←基板、２，１２・・・・・・Ｐ十埋
込層％３・・・・・・第１エピタキシャル層、４・・・
・・・Ｎ十埋込層、５・・・・・・Ｋ２エピタキシャル
層、６・・・・・・Ｐｆｉアノード、７・・・・・・Ｐ
ベース層、８・・・・・・Ｎｌｌ、り層、９・・・・・
・Ｎ十分離層、１０・・・・・・Ｐ十分離層、１１・・
・・・・Ｐ型基板、１３・・・・・・エピタキシャル層
、１５・・・・・・ソース・ドレイン％ １６・・・・
・・ゲート電極。FIG. 1 is a cross-sectional view of one embodiment of the present invention, FIG. 2 is a cross-sectional view of a second embodiment of the present invention, and FIG. 3 is a cross-sectional view of a conventional optical semiconductor integrated circuit. 1...N←substrate, 2,12...P10 buried layer%3...first epitaxial layer, 4...
...N0 buried layer, 5...K2 epitaxial layer, 6...Pfi anode, 7...P
Base layer, 8...Nll, layer, 9...
・N Sufficient delamination, 10... P Sufficient delamination, 11...
...P-type substrate, 13...Epitaxial layer, 15...Source/drain% 16...
...Gate electrode.
Claims (1)
電圧に変換する電流−電圧変換回路とを含む光半導体集
積回路において、一部の領域にＰ型埋込層を有するＮ型
半導体基板上の前記領域に前記電流電圧変換回路を形成
し、他の領域に前記ホトダイオードを形成したことを特
徴とする光半導体集積回路。In an optical semiconductor integrated circuit that includes a photodiode and a current-voltage conversion circuit that converts a photocurrent generated by the photodiode into a voltage, the area on the N-type semiconductor substrate that has a P-type buried layer in a part of the area. 1. An optical semiconductor integrated circuit comprising a current-voltage conversion circuit and the photodiode formed in another region.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62134650A JPS63299163A (en) | 1987-05-28 | 1987-05-28 | Photosemiconductor integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62134650A JPS63299163A (en) | 1987-05-28 | 1987-05-28 | Photosemiconductor integrated circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63299163A true JPS63299163A (en) | 1988-12-06 |
Family
ID=15133330
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62134650A Pending JPS63299163A (en) | 1987-05-28 | 1987-05-28 | Photosemiconductor integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63299163A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03183169A (en) * | 1989-12-12 | 1991-08-09 | Hikari Keisoku Gijutsu Kaihatsu Kk | Photodetector and manufacture thereof |
| JPH04240780A (en) * | 1991-01-24 | 1992-08-28 | Sanyo Electric Co Ltd | Optical semiconductor device |
| JPH0818093A (en) * | 1994-06-30 | 1996-01-19 | Sony Corp | Semiconductor photoreceiver and semiconductor device and manufacture thereof |
| JP2003023142A (en) * | 2001-07-05 | 2003-01-24 | Sony Corp | Semiconductor device and manufacturing method therefor |
-
1987
- 1987-05-28 JP JP62134650A patent/JPS63299163A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03183169A (en) * | 1989-12-12 | 1991-08-09 | Hikari Keisoku Gijutsu Kaihatsu Kk | Photodetector and manufacture thereof |
| JPH04240780A (en) * | 1991-01-24 | 1992-08-28 | Sanyo Electric Co Ltd | Optical semiconductor device |
| JPH0818093A (en) * | 1994-06-30 | 1996-01-19 | Sony Corp | Semiconductor photoreceiver and semiconductor device and manufacture thereof |
| JP2003023142A (en) * | 2001-07-05 | 2003-01-24 | Sony Corp | Semiconductor device and manufacturing method therefor |
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