JPS63293475A - Measurement system for duty ratio - Google Patents

Measurement system for duty ratio

Info

Publication number
JPS63293475A
JPS63293475A JP12827387A JP12827387A JPS63293475A JP S63293475 A JPS63293475 A JP S63293475A JP 12827387 A JP12827387 A JP 12827387A JP 12827387 A JP12827387 A JP 12827387A JP S63293475 A JPS63293475 A JP S63293475A
Authority
JP
Japan
Prior art keywords
signal
duty ratio
phi0
signals
measurement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12827387A
Other languages
Japanese (ja)
Inventor
Katsumi Osaki
大崎 勝美
Kazuo Kato
和男 加藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP12827387A priority Critical patent/JPS63293475A/en
Publication of JPS63293475A publication Critical patent/JPS63293475A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To realize simple circuit constitution and to take an accurate measurement by converting a signal to be measured into an in-phase signal and an opposite-phase signal, converting them into DC signals individually, and measuring their duty ratio from their potential difference. CONSTITUTION:A coupling circuit 1 which is supplied with the signal f0 to be measured divides a voltage VBB to the same level by resistances R1 and R2, and the AC component of a signal f0 is superposed upon a bias voltage obtained through the resistance R1 to supply a signal phi1 to a differential amplifier 2. Further, a reference voltage Vref is obtained through the resistance R2. The amplifier 2 obtain the in-phase signal phi0 and opposite-phase signal phi0' from the input signal phii and supplies them to a trailing-stage smoothing and differential measuring circuit 3. The circuit 3 generates a measurement voltage V0 corresponding to the duty ratio of the signals phi0 and phi0'. Thus, the signals f0 is converted into the signals phi0 and phi0' having their center at the reference voltage Vref and both signals are converted into the DC signals individually to measure the duty ratio from their potential difference, so the measurement is performed by the simple circuit constitution. Further, the signals phi0 and phi0' are converted into DC signals to reduce an error at the time of high-frequency signal measurement.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はパルス信号のデユーティ比を測定する測定回路
に関し、特に高周波数のパルス信号のデユーティ比を測
定する際に用いて有効な測定方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a measurement circuit for measuring the duty ratio of a pulse signal, and particularly to a measurement method that is effective when measuring the duty ratio of a high frequency pulse signal. .

〔従来の技術〕[Conventional technology]

C0DEC−LSIやディジタル符号伝送時においては
、伝送波形のパルス幅変動に対してIlo (Inpu
t/ 0utput)ボートが識別能力を保持できるよ
うに、マージンを持たせた設計が必要である。このため
元の波形のデユーティ比を管理し℃、一定のデユーティ
比を維持しなければならずデユーティ比測定が必要にな
る。
During C0DEC-LSI or digital code transmission, Ilo (Input
t/0output) A design with a margin is required so that the boat retains its identification ability. For this reason, the duty ratio of the original waveform must be managed to maintain a constant duty ratio at °C, and duty ratio measurement is required.

デユーティ比の測定については、「電気計測便覧」 (
昭和52年8月発行1発行所オーム社、第3章)に記載
されている。その概要は、被測定信号のIff期Tとパ
ルス幅TH(パルスがハイレベルにある時間)とを測定
し、TH/T演算を行うものであり、演算は周波数カウ
ンタによるパルス幅比率測定による、とのことである。
Regarding the measurement of duty ratio, please refer to the "Electrical Measurement Handbook" (
Published in August 1978, published by Ohmsha, Chapter 3). The outline of this method is to measure the If period T and pulse width TH (time when the pulse is at high level) of the signal under test, and perform TH/T calculation.The calculation is performed by measuring the pulse width ratio using a frequency counter. That is.

本発明者等は、上記デユーティ比測定を高効率、かつ正
確に行うべく検討を行った。
The present inventors conducted studies to perform the above duty ratio measurement with high efficiency and accuracy.

以下は公知とされた技術ではないが、本発明者等によっ
て検討された技術であり、その概要は下記のとおりであ
る。
Although the following is not a publicly known technique, it is a technique studied by the present inventors, and its outline is as follows.

すなわち、上記周波数カウンタの分解能が±Insのと
き、1%以下の精度で測定可能な周波数はIOMH2で
ある。また1時間測定を2度行う必要もあった。
That is, when the resolution of the frequency counter is ±Ins, the frequency that can be measured with an accuracy of 1% or less is IOMH2. It was also necessary to perform two 1-hour measurements.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上記の如く、周波数カウンタによるデューティ比測定で
は、測定精度が測定器のタイムメジャーの精度、換言す
れば計数クロックの分解能、或いはヘテロダイン変換し
たクロックの分解能により決定されてしまう。通常利用
可能なりロックの分解能は±ins程度であり、高周波
のデユーティ比測定に限界があった。
As described above, in duty ratio measurement using a frequency counter, the measurement accuracy is determined by the accuracy of the time measure of the measuring instrument, in other words, the resolution of the counting clock or the resolution of the heterodyne-converted clock. The normally available locking resolution is on the order of ±ins, and there is a limit to high frequency duty ratio measurements.

そこで本発明者等は、測定が簡単であるうえに高周波の
パルス信号についても容易かつ正確にデユーティ比を測
定すべく検討を重ねた。その結果、被測定信号を直流化
すれば、周波数に関わりたべ測定できるのではないか、
と考え、本発明を提案するに至った。
Therefore, the inventors of the present invention have conducted repeated studies in order to easily and accurately measure the duty ratio even for high-frequency pulse signals in addition to being easy to measure. As a result, I found that if the signal under test was converted to DC, it would be possible to measure everything related to frequency.
With this in mind, we have come to propose the present invention.

本発明の目的は、周波数の高低に関わりなく、しかも簡
単にデユーティ比を測定し得るデューティ比測定方法を
提供することにある。
An object of the present invention is to provide a duty ratio measuring method that can easily measure the duty ratio regardless of whether the frequency is high or low.

本発明の上記ならびにその他の目的と新規な特徴は1本
明細書の記述および添付図面から明らかになるであろう
The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

〔問題点を解決するための手段〕[Means for solving problems]

本願において開示される発明のうち、代表的なものの概
要を簡単に説明すれば、下記のとおりである。
A brief overview of typical inventions disclosed in this application is as follows.

すなわち、被測定信号であるパルス信号を差動増幅器に
供給し、互いに逆位相の正相信号と逆相信号とを得る。
That is, a pulse signal, which is a signal to be measured, is supplied to a differential amplifier to obtain a normal phase signal and a negative phase signal that are opposite in phase to each other.

上記差動増幅器の次段には、本発明でいう平滑回路が設
けられ、上記正相信号と逆相信号とを個別に平滑(直流
化)し、両者の電圧差によりデユーティ比を測定するも
のである。
A smoothing circuit according to the present invention is provided at the next stage of the differential amplifier, and smoothes (converts) the normal phase signal and the negative phase signal individually, and measures the duty ratio based on the voltage difference between the two. It is.

〔作用〕[Effect]

上記した手段によれば、正相信号と逆相信号の基準レベ
ルが一致している場合、平滑された電圧レベルはデユー
ティ比に対志したものになり、両者の電圧差によってデ
ユーティ比を測定することができる。正相信号と逆相信
号とを直流化するのであるから、周波数の高低に関わり
なくデユーティ比を測定する、という本発明の目的を達
成することができる。
According to the above-mentioned means, when the reference levels of the positive-phase signal and the negative-phase signal match, the smoothed voltage level becomes a value relative to the duty ratio, and the duty ratio is measured by the voltage difference between the two. be able to. Since the normal phase signal and the negative phase signal are converted to direct current, the object of the present invention, which is to measure the duty ratio regardless of the frequency, can be achieved.

〔実施例−1〕 以下、第1図〜第3図を参照して本発明を適用したデス
−ティ比測定方法の第1実施例を説明する。なお、第1
図は測定回路全体の回路構成を示すブロックダイアグラ
ム、第2図は回路動作を説明するための波形図、第3図
は具体例を示す回路図である。
[Example 1] Hereinafter, a first example of a method for measuring a duty ratio to which the present invention is applied will be described with reference to FIGS. 1 to 3. In addition, the first
The figure is a block diagram showing the circuit configuration of the entire measuring circuit, FIG. 2 is a waveform diagram for explaining the circuit operation, and FIG. 3 is a circuit diagram showing a specific example.

結合回路1には、第2図囚に示す如き被測定信号f0が
供給される。結合回路1は、第3図に示す如く直流カッ
トを行うコンデ/すC%、電圧VflBを分圧してバイ
アス電圧及び基準電圧を得るための抵抗R1,R,によ
って構成されている。
The coupling circuit 1 is supplied with a signal under test f0 as shown in FIG. As shown in FIG. 3, the coupling circuit 1 is composed of a capacitor C% for cutting DC, and resistors R1 and R for dividing the voltage VflB to obtain a bias voltage and a reference voltage.

抵抗R,,R,は電圧VBBを同一レベルに分圧し、抵
抗RLを介して得られるバイアス電圧に被測定信号f、
の交流成分が重畳され、入力信号φiとして差動増幅器
2に供給される。
The resistors R, ,R, divide the voltage VBB to the same level, and apply the measured signal f, to the bias voltage obtained via the resistor RL.
The alternating current components of are superimposed and supplied to the differential amplifier 2 as the input signal φi.

また、抵抗R2を介し℃基準電圧Vrefが得られるが
、基準電圧Vrefと入力信号φiとは第2図(5)に
示すように設定される。
Further, the °C reference voltage Vref is obtained via the resistor R2, and the reference voltage Vref and the input signal φi are set as shown in FIG. 2 (5).

差動増幅器2は、上記入力信号φiから第2図(Qに示
す如き互いに逆位相となる正相信号φ0゜逆相信号φ。
The differential amplifier 2 converts the input signal φi into a normal-phase signal φ0° and a negative-phase signal φ, which have opposite phases to each other as shown in FIG. 2 (Q).

を得るものである。この測定回路の精度は、上記正相信
号φ。、逆相信号φ0間の遅延時間、更にハイレベルと
ローレベルのときの電圧レベル差等を考慮して決定され
る。このため差動増幅器2については、対称性を重視し
た回路構成がとられ、正相信号φ0.逆相信号φ。の校
正を行い得るようになされている。また、被測定信号f
0が高周波信号である場合は、E CL t GAA8
素子等の高速応答可能な回路素子によって構成され、測
定範囲を拡大し得るようになされる。
This is what you get. The accuracy of this measurement circuit is based on the above positive phase signal φ. , the delay time between the negative phase signal φ0, and the voltage level difference between high level and low level, etc. are determined. For this reason, the differential amplifier 2 has a circuit configuration that emphasizes symmetry, and the positive-phase signal φ0. Reverse phase signal φ. It is designed so that it can be calibrated. Also, the signal under test f
If 0 is a high frequency signal, E CL t GAA8
It is constructed of circuit elements capable of high-speed response, such as elements, and is designed to expand the measurement range.

次段の平滑差動測定回路3は、基本的には第3図に示す
ように抵抗R,,R4,コンデンサC8+04からなる
平滑回路(積分回路)になされている。
The next stage smoothing differential measuring circuit 3 is basically a smoothing circuit (integrating circuit) consisting of resistors R, , R4 and capacitor C8+04 as shown in FIG.

平滑差動測定回路3は、第3図に示すように抵抗R,,
R4、コンデンサC8,C4なる時定数回路になされ、
正相信号φ。、逆相信号φ0のデー−ティ比に対応した
測定電圧voを得るものである。
The smooth differential measurement circuit 3 includes resistors R, , as shown in FIG.
It is made into a time constant circuit consisting of R4, capacitors C8 and C4,
Positive phase signal φ. , a measurement voltage vo corresponding to the duty ratio of the negative phase signal φ0 is obtained.

ここで正相信号φ0.逆相信号φ。が対称であるとする
と、抵抗R3,コンデンサC1によって平滑された電圧
Vφは、 V1=Vt、+(Tu/T) (Vl(−VI、)  
++t+m (1)で決定される電圧レベルになり、抵
抗R4,コンデンサC4で平滑された電圧Vφは、 Vφ=VL+C(T−TH)/T ) (VH−VL 
)−(2)で決定される電圧になる。なお上記(1)(
2)式において、VH、vLは正相信号φ1.逆相信号
φ、がノ1イレペル及ヒローレベルテアルト?! f)
’FL圧L/し#、THはハイレベルであるときの時間
、Tは一周期の時間である。
Here, the positive phase signal φ0. Reverse phase signal φ. Assuming that is symmetrical, the voltage Vφ smoothed by resistor R3 and capacitor C1 is V1=Vt, +(Tu/T) (Vl(-VI,)
++t+m (1) The voltage Vφ that has been smoothed by resistor R4 and capacitor C4 is as follows: Vφ=VL+C(T-TH)/T) (VH-VL
)-(2). Note that (1) above (
In equation 2), VH and vL are positive phase signals φ1. Is the reverse phase signal φ, Ga No 1 Repel and Hero Level Tearto? ! f)
'FL pressure L/S#, TH is the time when it is at high level, and T is the time of one cycle.

測定電圧v0は、上記電圧Vφ、Vφの電圧差によって
得られるので、 Vo=Vφ−V1=2 (TH/T  I/2) (V
H−VL)、’、 TH/’r=v、/2 (VHVL
)+ 1/2 −−− (31で決定されろ。因みに、
測定電圧V、=Oでデユーティ比が50%になり、この
電圧レベルを基準にして士(VH−Vr、)の範囲でデ
ユーティ比の測定が行われる。
The measurement voltage v0 is obtained from the voltage difference between the voltages Vφ and Vφ, so Vo=Vφ−V1=2 (TH/T I/2) (V
H-VL),', TH/'r=v,/2 (VHVL
) + 1/2 --- (Determined by 31. By the way,
The duty ratio becomes 50% when the measurement voltage V,=O, and the duty ratio is measured in the range of VH-Vr, based on this voltage level.

なお、本実施例において、電圧■φ、Vφを得るための
時定数は、1/ f o < Rs = Cs 、1/
f 。
In this example, the time constants for obtaining the voltages ■φ and Vφ are 1/f o < Rs = Cs, 1/
f.

< R4、’ C4に設定した。< R4,' Set to C4.

本実施例に示した測定回路は、下記の如き効果を奏する
ものである。
The measurement circuit shown in this embodiment has the following effects.

(1)被測定信号f0を所定の基準電圧Vrefを中心
にして互いに逆位相の正相信号φ。と逆相信号φ。K変
換し、上記正相信号φ。と逆相信号φ。
(1) The signal under test f0 is a normal phase signal φ having opposite phases to each other with a predetermined reference voltage Vref as the center. and the reverse phase signal φ. K conversion and the above positive phase signal φ. and the reverse phase signal φ.

とを個別に直流化して両者の電圧差によりデユーティ比
を測定し得るように構成したので、簡単な回路構成でデ
ユーティ比を測定し得る、という効果が得られる。
Since the structure is configured such that the duty ratio can be measured by converting the voltages into direct currents and the voltage difference between the two, it is possible to measure the duty ratio with a simple circuit configuration.

(2)正相信号φ0.逆相信号φ。を直流化するので、
高周波信号測定時の誤差を低減し得る、という効果が得
られる。
(2) Positive phase signal φ0. Reverse phase signal φ. Since it converts to DC,
This has the effect of reducing errors when measuring high frequency signals.

(3)上記(1)(2)により、低コストかつ正確なデ
ユーティ比測定を行うことができる。
(3) According to (1) and (2) above, low-cost and accurate duty ratio measurement can be performed.

〔実施例−2〕 次に、第4図を参照して本発明の第2実施例を説明する
[Embodiment 2] Next, a second embodiment of the present invention will be described with reference to FIG.

なお、上記第1実施例と同様の回路動作をなす部分には
同一の符号を付し、説明の重複を避けるものとする。
Note that the same reference numerals are given to parts that perform the same circuit operations as in the first embodiment to avoid duplication of explanation.

本実施例と上記第1実施例との相違点は、差動増幅器2
に供給されるバイアス電圧を可変し得るように構成する
とともに、正相信号φ4.逆相信号φ1をに倍に増幅す
るように構成したことにある。
The difference between this embodiment and the first embodiment is that the differential amplifier 2
The configuration is such that the bias voltage supplied to the positive phase signal φ4. This is because the configuration is such that the reverse phase signal φ1 is amplified twice.

すなわち、差動増幅器2の一方の入力端子には、可変抵
抗器VRを介してバイアス電圧が供給される。この結果
、差動増幅器2の非対称性が補正されるようになる。
That is, a bias voltage is supplied to one input terminal of the differential amplifier 2 via the variable resistor VR. As a result, the asymmetry of the differential amplifier 2 is corrected.

また、平滑した電圧■φ、■φは、抵抗R,〜R1,増
幅器4によって増幅されるようになされている。電圧V
、、vφの差電圧は、増幅器4によって増幅されるので
あるが、測定電圧v0の電圧レヘルハ、V 、) = 
2 K (TH/T−1/2) (VH−ML)で求め
られる。
Further, the smoothed voltages ■φ and ■φ are amplified by resistors R, to R1 and an amplifier 4. Voltage V
, , vφ is amplified by the amplifier 4, and the voltage difference of the measurement voltage v0, V , ) =
2 K (TH/T-1/2) (VH-ML).

従って本実施例に示した測定回路は、上記(1)〜(3
)の効果を奏する上に、更に下記の効果を奏するように
なる。
Therefore, the measurement circuit shown in this example has the above-mentioned (1) to (3)
), the following effects are also achieved.

(4)差動増幅器のバイアス電圧を可変することにより
、差動増幅器2の非対称性が補正され、測定精度が向上
する、という効果が得られる。
(4) By varying the bias voltage of the differential amplifier, the asymmetry of the differential amplifier 2 is corrected and measurement accuracy is improved.

(5)平滑された電圧差を増幅することにより、デユー
ティ比の測定が容易になる、という効果が得られる。
(5) By amplifying the smoothed voltage difference, it is possible to obtain the effect that the duty ratio can be easily measured.

〔実施例−3〕 次に、第4図を参照して本発明の第3実施例を説明する
[Embodiment 3] Next, a third embodiment of the present invention will be described with reference to FIG.

本実施例は、被測定信号f0.f0の対称性が確認され
ている場合の回路構成を示すものである。
In this embodiment, the signal under test f0. This shows a circuit configuration when the symmetry of f0 has been confirmed.

この場合、対称性を得るための上記結合回路1゜差動増
幅器2等は削除し得る。
In this case, the above coupling circuit 1° differential amplifier 2, etc. for obtaining symmetry can be omitted.

すなわち、被測定信号f0.f、は平滑差動測定回路3
に直に供給される。この場合の平滑差動測定回路3の動
作は、上記第1実施例と同様に行われ、測定電圧voを
得る。
That is, the signal under test f0. f, smooth differential measurement circuit 3
supplied directly to The operation of the smooth differential measurement circuit 3 in this case is performed in the same manner as in the first embodiment, and a measurement voltage vo is obtained.

本実施例に示した測定回路は、上記第1.第2実施例に
示した測定回路に比較し、回路構成が極めて簡単である
The measurement circuit shown in this embodiment is based on the above-mentioned No. 1. The circuit configuration is extremely simple compared to the measurement circuit shown in the second embodiment.

以上に、本発明者等によってなされた発明を各実施例に
もとづき具体的に説明したが、本発明は上記実施例に限
定されるものではなく、その要旨を逸脱しない範囲で種
々変更可能であることはいうまでもない。
Above, the invention made by the present inventors has been specifically explained based on each example, but the present invention is not limited to the above-mentioned examples, and can be modified in various ways without departing from the gist thereof. Needless to say.

例えば、第2実施例で述べた増幅器4を第3実施例で述
べた平滑差動測定回路3に適用してもよい。
For example, the amplifier 4 described in the second embodiment may be applied to the smooth differential measurement circuit 3 described in the third embodiment.

また、測定電圧■。の測定器が所定の容量値を有してい
ることが確認される場合は、コンデンサC8,C,の低
減を行うことも可能である。
Also, the measurement voltage ■. If it is confirmed that the measuring device has a predetermined capacitance value, it is also possible to reduce the capacitor C8,C.

以上の説明では、主として本発明者等によってなされた
発明をその背景となった利用分野であるパルス信号のデ
ューティ比測定回路に適用した場合について説明したが
、それに限定されるものではなくデユーティ比に対応し
た制御信号を得る場合についても利用できる。
In the above explanation, the invention made by the present inventors and others was mainly applied to a pulse signal duty ratio measuring circuit, which is the field of application that formed the background of the invention, but the invention is not limited to this and is not limited to this. It can also be used to obtain a corresponding control signal.

〔発明の効果〕〔Effect of the invention〕

本願において開示される発明のうち代表的なものによっ
て得られる効果を簡単に説明すれば、下記のとおりであ
る。
A brief explanation of the effects obtained by typical inventions disclosed in this application is as follows.

すなわち、デユーティ比が測定される被測定信号を互い
に逆位相の正相信号、逆相信号に変換し、それらを個別
に直流化して電圧差によりデユーティ比を測定するよう
に構成したので、回路構成が簡単である上に周波数の高
低に左右されず正確な測定を行い得る、という効果が得
られる。
In other words, the signal under test for which the duty ratio is to be measured is converted into a normal phase signal and a negative phase signal that are opposite in phase to each other, and these are individually converted to direct current to measure the duty ratio based on the voltage difference. In addition to being simple, accurate measurements can be made regardless of the frequency.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図〜第3図は本発明の第1実施例を示すものであっ
て、 第1図は測定回路全体の回路構成を示すブロックダイア
グラム、 第2図は回路動作を説明するだめの波形図、第3図は測
定回路の具体例を示す回路図、第4図は本発明の第2実
施例を示す測定回路の回路図、 第5図は本発明の第3実施例を示す測定回路の回路図で
ある。 1・・・結合回路、2・・・差動増幅器、3・・・平滑
差動測定回路、4・・・増幅器、RI””’ R?・・
・抵抗、C1゜C2・・・コンデンサ、fo・・・被測
定信号、φ。、φ0・・・正相および逆相信号、Vφ、
Vφ・・・直流化された電圧、vo・・・測定電圧。 °ノ 第  1  図 第  2  図 0(v〕
1 to 3 show a first embodiment of the present invention. FIG. 1 is a block diagram showing the circuit configuration of the entire measurement circuit, and FIG. 2 is a waveform diagram illustrating the circuit operation. , FIG. 3 is a circuit diagram showing a specific example of a measuring circuit, FIG. 4 is a circuit diagram of a measuring circuit showing a second embodiment of the present invention, and FIG. 5 is a circuit diagram of a measuring circuit showing a third embodiment of the present invention. It is a circuit diagram. 1... Coupling circuit, 2... Differential amplifier, 3... Smoothing differential measurement circuit, 4... Amplifier, RI""' R?・・・
・Resistance, C1゜C2... Capacitor, fo... Signal under test, φ. , φ0... Positive phase and negative phase signal, Vφ,
Vφ...DC voltage, vo...Measurement voltage. °No Figure 1 Figure 2 Figure 0 (v)

Claims (1)

【特許請求の範囲】[Claims] 1、互いに逆位相でパルス状に変化する複数の被測定信
号を個別に平滑し、平滑成分の電圧差にもとづき被測定
信号のデューティ比を測定することを特徴とするデュー
ティ比測定方式。
1. A duty ratio measurement method characterized by individually smoothing a plurality of signals under test that change in a pulse-like manner with mutually opposite phases, and measuring the duty ratio of the signals under test based on the voltage difference between the smoothed components.
JP12827387A 1987-05-27 1987-05-27 Measurement system for duty ratio Pending JPS63293475A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12827387A JPS63293475A (en) 1987-05-27 1987-05-27 Measurement system for duty ratio

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12827387A JPS63293475A (en) 1987-05-27 1987-05-27 Measurement system for duty ratio

Publications (1)

Publication Number Publication Date
JPS63293475A true JPS63293475A (en) 1988-11-30

Family

ID=14980752

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12827387A Pending JPS63293475A (en) 1987-05-27 1987-05-27 Measurement system for duty ratio

Country Status (1)

Country Link
JP (1) JPS63293475A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103529307A (en) * 2012-07-06 2014-01-22 致茂电子(苏州)有限公司 Signal measurement device
KR101962400B1 (en) * 2018-10-19 2019-03-26 엘아이지넥스원 주식회사 Duty ratio sensing apparatus used for traveling-wave tube amplifier

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103529307A (en) * 2012-07-06 2014-01-22 致茂电子(苏州)有限公司 Signal measurement device
KR101962400B1 (en) * 2018-10-19 2019-03-26 엘아이지넥스원 주식회사 Duty ratio sensing apparatus used for traveling-wave tube amplifier

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