JPS63292651A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To form a highly reliable wiring layer without wire breakdown at a step part when the wiring layer of a semiconductor device is formed, by forming recess parts at connecting hole parts, which are provided in a ground insulating film in a state the recess parts are filled with a first conductor layer, flattening the surface, and forming a second conductor layer thereon. CONSTITUTION:An aluminum layer 3 as a first conductor layer is deposited on the entire surface of a semiconductor substrate 1 including connecting holes by a sputtering method. A dry etching resisting material 4 is injected into recess parts, which are yielded in the first aluminum layer 3. The material is heated and hardened, and a mask is formed. Then, the first aluminum layer is etched in the vertical direction. Thereafter, the resist, which is the dry-etching resisting material 4, is removed by light ashing using oxygen plasma. An aluminum layer as a second conductor layer is formed on the semiconductor substrate by a method such as ordinary sputtering. The layer 5 is patterned. In this way, steps become remarkably small, and the reliability of a wiring layer is improved.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for forming a wiring layer in a semiconductor device,
In particular, the present invention relates to a reliable method of forming a wiring layer without the risk of disconnection even at stepped portions such as connection holes.

[Conventional technology]

In the manufacture of semiconductor devices, after forming a circuit element region in a semiconductor substrate, an insulating film is deposited on the entire surface of the substrate, and a wiring layer is provided on the insulating film. A structure as shown in FIG. 3 in which the wiring layer and the wiring layer are electrically connected is common.

In this process, a base insulating film 32 is deposited on a semiconductor substrate 31 on which a circuit element region is formed, connection holes are formed in the parts of this insulating film that require electrical connection, and then the entire surface of the substrate including the connection holes is covered. This forms a conductive layer 33. Thereafter, the conductive layer 33 is patterned as necessary to form a desired wiring pattern.

[Problem that the invention seeks to solve]

However, when a connection hole is formed in the base insulating film 32, a step is always generated on the substrate surface, and the conductive layer 3 is formed on the entire surface including this step.
3, step coverage becomes a problem. In this case, for example, the thickness of the conductive layer becomes thinner at the stepped portion to the dotted line portion in FIG. 3, causing wire breakage, which significantly reduces the reliability of the device.

Therefore, even if the conductive layer is formed by sputtering, which is said to have good step coverage, there are limitations, and if the step difference is large, there is a risk of wire breakage.

Furthermore, in order to prevent this, there is a taper processing technique that improves step coverage by forming a taper at the upper end of the connection hole, but taper processing essentially increases the dimensions of the connection hole opening, making it difficult to integrate semiconductors. This goes against the trend of increasing the degree of integration in circuit devices.

SUMMARY OF THE INVENTION Therefore, in order to solve the above-mentioned problems, an object of the present invention is to provide a method of forming a highly reliable wiring layer without disconnection at the step portion when forming the wiring layer of a semiconductor device.

[Means and effects for solving the problem] The present invention forms connection holes at necessary locations in a base insulating film deposited on a semiconductor substrate having a circuit element, and deposits a first conductive layer on the entire surface of the substrate. do. As a result, four portions are formed in the connection hole portion of the conductive layer, and after injecting a dry etching resistant substance into these four portions,
Using this as a mask, anisotropic etching is performed to etch the I-th conductive layer until the underlying insulating film is exposed.

Next, after removing the dry etching resistant material used as a mask, a second conductive layer is deposited and patterned to obtain a desired wiring layer.

According to the method of the present invention, the concave portion of the connection hole formed in the base insulating film is filled with the first conductive layer, and the surface is flattened without adding any complicated process. By forming a conductive layer, it is possible to form a good wiring layer with almost no constrictions.

〔Example〕

An embodiment of the present invention will be described with reference to FIG.

A base insulating film 2 is deposited on a semiconductor substrate 1 on which circuit elements are formed, as shown in FIG. 1(a), by a conventional method, and connection holes are formed in necessary locations.

An aluminum layer 3 is coated as a first conductive layer on the entire surface of the semiconductor substrate 1 including the contact holes, for example, under a pressure of 2.5 mm in an argon gas atmosphere. OX 10-3 Torr, substrate preheating temperature 250°
C3 is deposited by sputtering at a deposition rate of 5000 persons/min. Here, the thickness h3 of the first aluminum layer 3 to be deposited is set so that the bottom of the recess formed in the aluminum layer is the same level as the surface of the base insulating film 2, that is, the thickness h2 of the base insulating film 2. (see Figure 1(a)).

Next, as shown in FIG. 1(b), a resist, for example, is injected as a dry etching-resistant material 4 into the recesses formed in the first aluminum layer 3 and hardened by heating to form a mask. In this method, a resist is spin-coated onto a semiconductor substrate, injected into all four parts, and cured by heating at, for example, about 120 DEG C. to 130 DEG C. (see FIG. 1(b)).

Next, using this dry etching resistant material 4 as a mask, the first aluminum layer is subjected to reactive ion etching (RIE), which is anisotropic etching that shows directionality in the vertical direction.
Then, as shown in FIG. 1C, etchback is performed until the surface of the underlying insulating film 2 is exposed. At this time, etching by the RIE method is performed using, for example, Cn2:
30sccm, 02:3sccm, BC7+3:2
It is carried out under the conditions of pressure cuff Pascal and high frequency cuff 00W using gases of four elements: 50 sec, CF4: 18 sec (see FIG. 1(C)).

Next, the resist, which is the dry etching resistant material 4, is removed by light ashing using oxygen plasma.

Then, the recesses, that is, the contact holes formed in the base insulating film 2 are filled with the first aluminum N3, and the surface of the semiconductor substrate 1 becomes almost flat (FIG. 1(d)).
reference).

An aluminum layer 5, which is a second conductive layer, is formed on this semiconductor substrate by a conventional method such as sputtering, and is patterned to obtain a desired wiring layer. At this time, a good wiring layer with almost no constriction is obtained in the second aluminum layer 5 even in the connection hole portion of the base insulating film 2, and there is no fear of disconnection in this portion.

Although this embodiment describes an example in which aluminum is used as the first and second conductive layers, the present invention is not limited to this, and for example, Aj! -3i, Aj! 5i-Cu,
Metal compounds such as silicide of silicon (St) and tungsten (W) can also be used as long as they are effective for the conductive layer.

Further, as shown in this embodiment, the thickness h3 of the recessed portion of the first conductive layer 3 is
However, it is obvious that a better wiring layer can be obtained if the height h2 of the step of the underlying insulating film 2 is the same as that of the first conductive layer 3. It can be applied even when the thickness h3' of the recessed part of ' is smaller than the height h2' of the step of the base insulating film 2'(h3'<h2'), and by using the method of the present invention, the step can be reduced. It becomes significantly smaller and the reliability of the wiring layer improves.

Furthermore, in this embodiment, an example was explained in which a resist was used as a dry etching resistant material that served as a mask when etching back the first conductive layer 3, but other materials such as S, O, etc.
G etc. can also be used.

In the case of S, O, and G, a mask is formed by injecting into the recessed portion by spin coating and then heating and baking, and in the removal step after etchback, S, O, and G can be removed by dilute hydrofluoric acid treatment.

〔Effect of the invention〕

By forming the wiring layer by the method of the present invention,
There is no fear of disconnection at the step portion that is likely to occur in the connection hole portion of the base insulating film, and a highly reliable wiring layer can be formed without adding complicated steps. Furthermore, since the method of the present invention does not require changing the opening size or density of the connection holes, a highly reliable semiconductor device can be obtained without sacrificing the degree of integration of the semiconductor device elements.

[Brief explanation of drawings]

FIG. 1 is an explanatory diagram of the formation process of a wiring layer of the present invention, FIG. 2 is an explanatory diagram of another wiring layer of the present invention, and FIG. 3 is an explanatory diagram of a conventional wiring layer. 1-Semiconductor substrate 2-Underlying insulating film 3-First conductive layer 4-Dry etching resistant material 5-Second conductive layer

Claims (3)

[Claims] (1) A step of forming a first conductive layer on the entire surface of a semiconductor substrate having an insulating film with contact holes formed therein, and a step of attaching a dry etching resistant material to the recesses created by the formation of the conductive layer and using this as a mask. The second conductive layer is selectively etched away, the etching-resistant material is removed, and the second conductive layer is deposited on the entire surface of the substrate and patterned to form a wiring layer. A method for manufacturing a semiconductor device, characterized in that: (2) The method of manufacturing a semiconductor device according to claim 1, wherein the first conductive layer is etched by reactive ion etching, which is anisotropic etching. (3) The method of manufacturing a semiconductor device according to claim 1, wherein the thickness of the first conductive layer is made to be approximately the same as the height of a stepped portion formed in the underlying insulating film.