JPS63287829A - Electrooptical device - Google Patents

Electrooptical device

Info

Publication number
JPS63287829A
JPS63287829A JP12352587A JP12352587A JPS63287829A JP S63287829 A JPS63287829 A JP S63287829A JP 12352587 A JP12352587 A JP 12352587A JP 12352587 A JP12352587 A JP 12352587A JP S63287829 A JPS63287829 A JP S63287829A
Authority
JP
Japan
Prior art keywords
selection
pulses
electric potential
supplied
thin film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12352587A
Other languages
Japanese (ja)
Inventor
Satoshi Arai
聡 荒井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Instruments Inc
Original Assignee
Seiko Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Instruments Inc filed Critical Seiko Instruments Inc
Priority to JP12352587A priority Critical patent/JPS63287829A/en
Publication of JPS63287829A publication Critical patent/JPS63287829A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To attain display of a picture high in definition by using plural pulses in one frame of period as selection signals supplied to respective gate lines. CONSTITUTION:In a time chart of the selection signals G and G', a picture signal 6 supplied to a drain line 6 connected to the drain of a thin film transistor 3, a picture element electric potential 7 equal to the potential of the lease of the thin film transistor 3 and a common electrode electric potential 8, the picture signal 6 is driven in terms of AC in the frame period T nearly setting the common electrode electric potential as a center. While the selection pulses G and G' are supplied to the gate of the thin film transistor 3, the picture element electric potential 7 gradually closes to the picture signal 6 and while the selection pulses G and G' are not supplied to the gate, it holds a certain electric potential. Since the selection pulses G and G' are short, the picture element electric potential 7 can not gradually close to the picture signal 6 with one pulse, so that it does with two pulses. If two pulses are insufficient, one more pulse is added. Thus, the display quality can be improved.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 薄膜トランジスタ(以下TPTと称す)等を用いたアク
ティブ・マトリクス電気光学装置において、画像表示の
ための画像信号を忠実に再現する表示品質の良い電気光
学装置を提供することを可能とするための駆動方式に関
する。
[Detailed Description of the Invention] [Industrial Application Field] In an active matrix electro-optical device using thin film transistors (hereinafter referred to as TPT), etc., electricity with good display quality that faithfully reproduces image signals for image display is used. The present invention relates to a driving method for making it possible to provide an optical device.

〔発明の概要〕[Summary of the invention]

この発明は、アクティブ・マj・リクス装置において、
液晶等の電気光学素子の寿命確保のためコモン電極に対
して、画素電極に印加する電位を一定の周期(フレーム
周期)で極性を反転させているため、コモン電極の電位
と画素電極の電位の差の絶対値が正転と反転で等しくな
い場合、画面表示が一定の周期で明暗を繰り返すリンカ
現象が生じるという問題を解決することを目的としてい
る。
The present invention provides an active matrix device including:
In order to ensure the lifespan of electro-optical elements such as liquid crystals, the polarity of the potential applied to the pixel electrode is reversed at a fixed cycle (frame cycle) with respect to the common electrode, so the potential of the common electrode and the potential of the pixel electrode are The purpose of this invention is to solve the problem that when the absolute value of the difference is not equal between normal rotation and reverse rotation, a linker phenomenon occurs in which the screen display repeats brightness and darkness at a constant cycle.

これを解決するためゲート線に供給する選択パルスを同
一ゲート線に複数回印加することにより、コモン電極と
画素電極の電位の差の絶対値が正転と反転で等しくなる
ようにし、フリッカ現象のない良質な表示品質の液晶表
示装置、プリンター用シャッター等の電気光学装置を実
現できるようにしたものである。
To solve this problem, the selection pulse supplied to the gate line is applied multiple times to the same gate line, so that the absolute value of the difference in potential between the common electrode and the pixel electrode is the same for normal rotation and reverse rotation, thereby eliminating the flicker phenomenon. This makes it possible to realize electro-optical devices such as liquid crystal display devices and printer shutters with high display quality.

〔実施例〕〔Example〕

ビデオ表示用およびランプトップ・パソコン用等に応用
される液晶表示装置は、大画面、高精細でかつ高品位な
画質が要求される。これらの条件を満たすものとして各
画素に画素選択のための薄膜トランジスタを設けたアク
ティブ・マトリクス液晶表示装置が注目されている。
Liquid crystal display devices used for video displays, lamp tops, personal computers, etc. are required to have large screens, high definition, and high quality images. An active matrix liquid crystal display device in which each pixel is provided with a thin film transistor for pixel selection is attracting attention as a device that satisfies these conditions.

第2図は、アクティブ・マトリクス表示装置の回路図で
ある。行方向に並んだ薄膜トランジスタ3を選択するた
めのゲート線(行線)1と画像信号を供給するためのド
レイン線(列線)2がマトリクス配置され、ゲート線1
とドレイン線2の各々の交差部に薄膜トランジスタ3と
画像信号成分容N4および液晶5からなる画素が設けら
れている。記4.a容量4は、薄膜トランジスタ3のソ
ースとグランド間に、液晶5は、薄膜トランジスタ3の
ソースと液晶を介して対向しているコモン電極間に接続
されている。
FIG. 2 is a circuit diagram of an active matrix display device. Gate lines (row lines) 1 for selecting thin film transistors 3 arranged in the row direction and drain lines (column lines) 2 for supplying image signals are arranged in a matrix.
A pixel consisting of a thin film transistor 3, an image signal component capacitor N4, and a liquid crystal 5 is provided at each intersection of the drain line 2 and the drain line 2. Note 4. The a capacitor 4 is connected between the source of the thin film transistor 3 and the ground, and the liquid crystal 5 is connected between the source of the thin film transistor 3 and common electrodes facing each other via the liquid crystal.

画像の表、示は、画面上部のゲート線1より順次画面下
部のゲート線1へ薄膜トランジスタ3の選択信号を供給
するとともに各々のゲート線1のタイミングに合った画
像信号をドレイン線2へ供給することによって画素内の
記憶容量4と液晶5に画像信号に応じた電位を印加する
ことにより行われる。
To display the image, a selection signal for the thin film transistor 3 is sequentially supplied from the gate line 1 at the top of the screen to the gate line 1 at the bottom of the screen, and an image signal matching the timing of each gate line 1 is supplied to the drain line 2. This is done by applying a potential according to the image signal to the storage capacitor 4 and liquid crystal 5 within the pixel.

第3図は、前記ゲート線1へ供給される選択信号Gのタ
イムチャートである。n番目のゲート線1の選択信号は
、−水平走査時間より短いパルス幅tejfである。ま
た、n+1番目のゲート線1の選択信号とは、時間的に
重ならないように設定されている。さらに、n番目のゲ
ート線1の選択信号は、1フレ一ム周期内に1パルスの
み存在する。
FIG. 3 is a time chart of the selection signal G supplied to the gate line 1. The selection signal for the n-th gate line 1 has a pulse width tejf shorter than -horizontal scanning time. Further, the selection signal of the n+1th gate line 1 is set so as not to overlap in time. Further, the selection signal for the n-th gate line 1 has only one pulse within one frame period.

ところで、画像信号は、フレーム周期Tでコモン電極に
対し交流駆動する成分(液晶のスレシホールド電圧に相
当)と前記交流駆動する成分より小さな振幅である真の
画像信号成分からなる。
By the way, the image signal consists of a component (corresponding to the threshold voltage of the liquid crystal) that is AC-driven with respect to the common electrode with a frame period T, and a true image signal component that has a smaller amplitude than the AC-driven component.

したがって、記憶容量4と液晶5に画像信号を供給する
ためには、薄膜トランジスタ3のソース電位が各フレー
ム周期Tごとに交流駆動する成分と約2倍の階調表示す
るための画像信号成分の和だけ変動しなければならない
Therefore, in order to supply an image signal to the storage capacitor 4 and the liquid crystal 5, the source potential of the thin film transistor 3 must be the sum of a component that is AC driven at each frame period T and an image signal component for displaying approximately twice the gradation. only has to change.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

前記のごとく液晶等、電気光学素子の高寿命化の点から
コモン電極に対してフレーム周期ごとに極性を反転させ
て画像信号を加えられる電気光学装置は、大画面化およ
び高精細度化した画面になるほど、ケート線とドレイン
線の配線抵抗及び寄生容量が増大かつ、−水平走査時間
が減少することにより、−水平走査時間選択された薄膜
トランジスタを介して液晶に正確な電位を供給すること
力(困難となる。その結果、表示品質の低下すなわち階
調表示能力の低下やフリッカ現象等が生じる。
As mentioned above, in order to extend the lifespan of electro-optical elements such as liquid crystals, electro-optical devices that apply image signals to a common electrode by reversing the polarity every frame period are suitable for larger screens and higher definition screens. As the wiring resistance and parasitic capacitance of the gate line and the drain line increase, and - the horizontal scanning time decreases, - the ability to supply an accurate potential to the liquid crystal via the selected thin film transistor during the horizontal scanning time ( As a result, the display quality deteriorates, that is, the gradation display ability decreases, and flicker phenomena occur.

〔問題点を解決するための手段〕[Means for solving problems]

本発明は、前述の問題点を解決するために、各々のゲー
ト線に供給される選択信号を1フレ一ム周期内に複数パ
ルスとすることにより、薄膜トランジスタを介して液晶
等の電気光学素子に十分正確な画像信号を印加できるよ
うにした。
In order to solve the above-mentioned problems, the present invention makes the selection signal supplied to each gate line a plurality of pulses within one frame period, so that the selection signal is applied to an electro-optical element such as a liquid crystal via a thin film transistor. It is now possible to apply sufficiently accurate image signals.

〔作用〕[Effect]

液晶等の素子に十分正確な画像信号が印加されるため、
信号歪による階調表示能力の低下やフリッカ現象等が解
消され、その結果、大画面高精細の液晶表示装置で、プ
リンター用シャッター等の電気光学装置において、高品
位の画像表示が実現できる。
Since sufficiently accurate image signals are applied to elements such as liquid crystals,
Decrease in gradation display ability and flicker phenomena caused by signal distortion are eliminated, and as a result, high-quality image display can be realized in large-screen, high-definition liquid crystal display devices and in electro-optical devices such as printer shutters.

〔実施例〕〔Example〕

以下にこの発明の実施例を図面に基づいて説明する。第
1図は、本発明におけるゲート線2へ供給される選択信
号G、G’のタイム・チャートである。選択信号Gは、
従来と同様の信号である。
Embodiments of the present invention will be described below based on the drawings. FIG. 1 is a time chart of selection signals G and G' supplied to the gate line 2 in the present invention. The selection signal G is
This is the same signal as before.

が、選択信号G1は、本発明で追加された信号である。However, the selection signal G1 is a signal added in the present invention.

第4図は、選択信号G、G’と薄膜トランジスタ3のド
レインに接続されたドレイン線6へ供給される画像信号
6と前記薄膜トランジスタ3のリースの電位と等しい画
素電位7およびコモン電極電位8のタイム・チャートで
ある。画像信号6は、コモン電極電位をほぼ中心にして
フレーム周期Tで交流駆動されている。画素電位7は、
選択パルスG、G″が薄膜トンジスタ3のゲートへ供給
されている期間、画像信号6へ漸近し、選択パルスG、
G’が前記ゲートへ供給されていない期間、一定電位を
保持している。選択パルスG。
FIG. 4 shows the timing of the selection signals G, G', the image signal 6 supplied to the drain line 6 connected to the drain of the thin film transistor 3, the pixel potential 7 equal to the lease potential of the thin film transistor 3, and the common electrode potential 8.・It is a chart. The image signal 6 is AC driven with a frame period T approximately centered on the common electrode potential. The pixel potential 7 is
During the period when the selection pulses G, G'' are supplied to the gate of the thin film transistor 3, they asymptotically approach the image signal 6, and the selection pulses G,
A constant potential is maintained during a period when G' is not supplied to the gate. Selection pulse G.

Goは、パルス幅が一水平走査時間以下と短いため、1
パルスで画素電位7が画像信号6へ漸近することができ
ないため、第4図の例では、2パルスとしている。2パ
ルスで不足の場合は、さらに追加すればよい。ところで
、選択パルスGと選択パルスG°のタイミングは、水平
走査時間の3倍だけずれている。これは、液晶表示装置
が3色(R,G、B)のカラー・フィルタを斜めに配置
したモザイクの場合、水平走査時間の3倍の時間ごとに
画像信号6の電位の相関の高い同一色が来ることを利用
し、より画像信号6の電位の画素電位7へ書き込み効率
を増加させるためである。したがって、カラー・フィル
タが縦の線である場合は、選択パルスGと選択パルスG
1の間に間隔を必要としない。
Go has a short pulse width of less than one horizontal scanning time, so 1
Since the pixel potential 7 cannot asymptotically approach the image signal 6 with a pulse, two pulses are used in the example of FIG. 4. If two pulses are insufficient, just add more. By the way, the timings of the selection pulse G and the selection pulse G° are shifted by three times the horizontal scanning time. If the liquid crystal display device is a mosaic in which color filters of three colors (R, G, B) are arranged diagonally, the same color with a high correlation of the potential of the image signal 6 is displayed every three times the horizontal scanning time. This is to increase the writing efficiency of the potential of the image signal 6 to the pixel potential 7 by taking advantage of the fact that the potential of the image signal 6 is generated. Therefore, if the color filter is a vertical line, the selection pulse G and the selection pulse G
No interval is required between 1.

〔発明の効果〕〔Effect of the invention〕

この発明は、以上説明したように、画像信号の画素への
書き込み不足によって生しる階調表示能力の低下やフリ
ッカ現象を、ゲート線に供給される選択パルスの数を増
し、かつ、適切な時間間隔とすることにより、表示品質
を向上させることのできる駆動回路を提供するものであ
る。
As explained above, this invention increases the number of selection pulses supplied to the gate line and appropriately controls the deterioration of gradation display ability and flicker phenomenon caused by insufficient writing of image signals to pixels. The present invention provides a drive circuit that can improve display quality by setting time intervals.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明における選択パルスのタイム・チャート
、第2図は液晶表示装置の回路図、第3図は従来の選択
パルスのタイム・チャート、第4図は画素の動作を示す
タイム・チャートである。 1・・・ゲート線      2・・・ドレイン線3・
・・薄膜トランジスタ 4・・・記憶容量5・・・液晶
       6・・・画像信号7・・・画素電位 8・・・コモン電極電位 G、G“・・・選択信号 以上
Figure 1 is a time chart of selection pulses in the present invention, Figure 2 is a circuit diagram of a liquid crystal display device, Figure 3 is a time chart of conventional selection pulses, and Figure 4 is a time chart showing pixel operation. It is. 1... Gate line 2... Drain line 3.
...Thin film transistor 4...Storage capacity 5...Liquid crystal 6...Image signal 7...Pixel potential 8...Common electrode potential G, G"...More than selection signal

Claims (1)

【特許請求の範囲】[Claims] (1)ゲート線とドレイン線をマトリクス状に配列し、
その各々の交差部に画素選択用トランジスタを有する画
素を設けた基板と前記基板に対向したコモン電極を有す
る対向基板の間に電気光学素子を封止した電気光学装置
において、 前記ドレイン線へアナログ・ビデオ信号を供給する一方
、前記ゲート線へ、各画素を選択するため、水平走査期
間ごとに順次画面上部より選択パルスを供給するととも
に、 前記選択パルスに先駆けて前記ゲート線へ前記選択パル
スと同様のパルス幅の信号を供給するようにしたことを
特徴とする電気光学装置。
(1) Arrange gate lines and drain lines in a matrix,
In an electro-optical device in which an electro-optical element is sealed between a substrate provided with a pixel having a pixel selection transistor at each intersection thereof and a counter substrate having a common electrode facing the substrate, an analog signal is connected to the drain line. While supplying the video signal, in order to select each pixel, a selection pulse is sequentially supplied to the gate line from the top of the screen every horizontal scanning period, and prior to the selection pulse, a selection pulse similar to the selection pulse is applied to the gate line. An electro-optical device characterized in that it supplies a signal with a pulse width of .
JP12352587A 1987-05-20 1987-05-20 Electrooptical device Pending JPS63287829A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12352587A JPS63287829A (en) 1987-05-20 1987-05-20 Electrooptical device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12352587A JPS63287829A (en) 1987-05-20 1987-05-20 Electrooptical device

Publications (1)

Publication Number Publication Date
JPS63287829A true JPS63287829A (en) 1988-11-24

Family

ID=14862766

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12352587A Pending JPS63287829A (en) 1987-05-20 1987-05-20 Electrooptical device

Country Status (1)

Country Link
JP (1) JPS63287829A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05100636A (en) * 1991-10-09 1993-04-23 Matsushita Electric Ind Co Ltd Method for driving display device
JP2002258817A (en) * 2001-02-15 2002-09-11 Samsung Electronics Co Ltd Liquid crystal display and its drive device and drive method
JP2006106745A (en) * 2004-10-01 2006-04-20 Samsung Electronics Co Ltd Liquid crystal display device and driving method thereof
JP2006171742A (en) * 2004-12-13 2006-06-29 Samsung Electronics Co Ltd Display device and drive method therefor
JP2006234895A (en) * 2005-02-22 2006-09-07 Hitachi Displays Ltd Display device
JP2008033193A (en) * 2006-08-01 2008-02-14 Sony Corp Display apparatus and its driving method

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5737981A (en) * 1980-08-13 1982-03-02 Matsushita Electric Ind Co Ltd Method for driving picture displaying equipment
JPS60134293A (en) * 1983-12-22 1985-07-17 シャープ株式会社 Driving of liquid crystal display unit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5737981A (en) * 1980-08-13 1982-03-02 Matsushita Electric Ind Co Ltd Method for driving picture displaying equipment
JPS60134293A (en) * 1983-12-22 1985-07-17 シャープ株式会社 Driving of liquid crystal display unit

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05100636A (en) * 1991-10-09 1993-04-23 Matsushita Electric Ind Co Ltd Method for driving display device
JP2002258817A (en) * 2001-02-15 2002-09-11 Samsung Electronics Co Ltd Liquid crystal display and its drive device and drive method
JP2006106745A (en) * 2004-10-01 2006-04-20 Samsung Electronics Co Ltd Liquid crystal display device and driving method thereof
JP2006171742A (en) * 2004-12-13 2006-06-29 Samsung Electronics Co Ltd Display device and drive method therefor
JP2006234895A (en) * 2005-02-22 2006-09-07 Hitachi Displays Ltd Display device
JP4667904B2 (en) * 2005-02-22 2011-04-13 株式会社 日立ディスプレイズ Display device
JP2008033193A (en) * 2006-08-01 2008-02-14 Sony Corp Display apparatus and its driving method
US8072399B2 (en) 2006-08-01 2011-12-06 Sony Corporation Display device, method of driving same, and electonic device
KR101360308B1 (en) * 2006-08-01 2014-02-10 소니 가부시끼가이샤 Display device, method of driving same, and electronic device
US8659515B2 (en) 2006-08-01 2014-02-25 Sony Corporation Display device, method of driving same, and electronic device

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