JPS63285976A - Semiconductor photodetector - Google Patents

Semiconductor photodetector

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Publication number
JPS63285976A
JPS63285976A JP62121510A JP12151087A JPS63285976A JP S63285976 A JPS63285976 A JP S63285976A JP 62121510 A JP62121510 A JP 62121510A JP 12151087 A JP12151087 A JP 12151087A JP S63285976 A JPS63285976 A JP S63285976A
Authority
JP
Japan
Prior art keywords
layer
superlattice
type
guard ring
inp
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62121510A
Other languages
Japanese (ja)
Inventor
Takashi Mikawa
孝 三川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP62121510A priority Critical patent/JPS63285976A/en
Publication of JPS63285976A publication Critical patent/JPS63285976A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To extremely reduce noise and to remarkably accelerate a semiconductor photodetector by using a superlattice for an APD magnifying layer, employing a substance having larger band gap than that of a well layer for a window and guard ring layer around the magnifying layer to rigidly provide a guard ring effect. CONSTITUTION:An n-type Ga0.047In0.53As layer 2 as an optical absorption layer, an n-type superlattice (n-type InP/n-type Ga0.47In0.53As) layer as a magnifying layer, and an n-type InP layer 4 having larger band gap than that of the GaInAs of a barrier layer as a window layer are sequentially grown on an n<+> type InP substrate 1, and mesa etched except a photodetecting region. Then, an n-type InP layer 5 having larger band gap than that of the GaInAs of the barrier layer is grown as a window and guard ring layer as buried at the periphery of a mesa. Then, Zn or Cd is diffused as a p-type impurity from the surfaces of the layers 4, 5 to form a p<+> type region 6. Thus, an APD having rigid guard ring effect using the superlattice magnifying layer is obtained, and low noise and superhigh speed due to the use of the superlattice are provided.

Description

【発明の詳細な説明】 〔概要〕 APD (Avalanche Photodiode
)の増倍層に超格子を用い、増倍層周囲のウィンド層兼
ガードリング層にウェル層よりバンドギャップの大きい
物質を用いて、ガードリング効果を強固にした超格子A
PDを提起し、超低雑音化、超高速化を可能とする。
[Detailed description of the invention] [Summary] APD (Avalanche Photodiode)
), a superlattice is used for the multiplication layer, and a material with a larger band gap than the well layer is used for the wind layer and guard ring layer around the multiplication layer to strengthen the guard ring effect.
It introduces PD and enables ultra-low noise and ultra-high speed.

〔産業上の利用分野〕[Industrial application field]

本発明は増倍層に超格子を用いた超高速、超低雑音AP
Dの構造に関する。
The present invention is an ultra-high speed, ultra-low noise AP using a superlattice in the multiplication layer.
Regarding the structure of D.

長距離、大容量光通信システムの進展に伴い。With the development of long-distance, high-capacity optical communication systems.

電界分布の平坦な超高速、低雑音のAPDが要求されて
いる。
There is a demand for ultra-high-speed, low-noise APDs with flat electric field distribution.

〔従来の技術〕[Conventional technology]

近年、 APDO増倍層に超格子を用いようとする試み
がなされるようになってきた。
In recent years, attempts have been made to use superlattices in APDO multiplication layers.

その理由は以下のようである。The reason is as follows.

すなわち、 APDの増倍層に超格子2例えばA11n
As/Ga1nAs超格子を用い、ここに電子を注入す
ると、超格子のAlInAsバリア層とGaInAsウ
ェル層の界面の障壁高さが伝導帯の方が価電子帯より極
めて大きいため電子のイオン化率αが正孔のそれβより
極めて大きくなり、すなわち電子と正孔のイオン化率比
α/βが大きくなり、マツキンタイア(Mclntyr
e)効果によりAPDの雑音は減り、また増倍された電
子のピルドアフプ時間が小さくなり、 APDの超高速
化が可能となる。
In other words, the superlattice 2, for example A11n, is added to the multiplication layer of the APD.
When an As/Ga1nAs superlattice is used and electrons are injected into it, the barrier height at the interface between the AlInAs barrier layer and the GaInAs well layer of the superlattice is extremely larger in the conduction band than in the valence band, so the electron ionization rate α increases. The ionization rate ratio α/β of electrons and holes becomes much larger than that of holes, i.e., the ionization rate ratio α/β of electrons and holes becomes large.
e) As a result of this effect, the noise of the APD is reduced and the pill-up time of the multiplied electrons is shortened, making it possible to make the APD extremely high-speed.

また、 APDの増倍層にInP/Ga InAs超格
子を用いると1反対に正孔と電子のイオン化率比β/α
が大きくなり、この場合は、超格子には正孔を注入する
ように光吸収層を配置すればよい。
In addition, when an InP/Ga InAs superlattice is used as the multiplication layer of APD, the ionization rate ratio of holes and electrons is β/α.
becomes large, and in this case, a light absorption layer may be arranged to inject holes into the superlattice.

従来は、超格子使用のAPDに対する具体的な構造は提
起されていない。
Conventionally, no specific structure for APD using a superlattice has been proposed.

従って、従来例としてInP系1μm帯のAPDの構造
をつぎに説明する。
Therefore, as a conventional example, the structure of an InP-based 1 μm band APD will be described below.

第3図゛は従来例を説明する1μm帯のInP系APD
の断面図である。
Figure 3 shows a 1 μm band InP-based APD explaining a conventional example.
FIG.

つぎに、工程順に構造を説明する。Next, the structure will be explained in order of steps.

図において+  n”−InP基板31上に。In the figure, on +n''-InP substrate 31.

光吸収層としてn−GalnAs層32゜増倍層として
n−InP層33゜ を成長し、受光領域の周囲を残してメサエッチングし、
メサの周囲にnJnP層34全34込む。
A 32° n-GalnAs layer was grown as a light absorption layer, and a 33° n-InP layer was grown as a multiplication layer, and mesa etching was performed leaving the periphery of the light receiving area.
A total of 34 nJnP layers 34 are placed around the mesa.

n−InP層34.33の受光領域表面よりp型不純物
としてZn、またはCdを拡散してp゛型領領域35形
成する。
Zn or Cd is diffused as a p-type impurity from the surface of the light-receiving region of the n-InP layer 34, 33 to form a p-type region 35.

つぎに、p゛型領領域35上p側電極36゜n”−In
P基板31の裏面にn側電極37を形成してAPDの主
要部の形成を終わる。
Next, the p-side electrode 36°n”-In
An n-side electrode 37 is formed on the back surface of the P substrate 31 to complete the formation of the main part of the APD.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

従来のAPDにおいては、増倍領域とガードリング領域
が同じバンドギャップの半導体で構成されており、受光
領域とガードリング領域との耐圧差が小さかった。
In conventional APDs, the multiplication region and the guard ring region are made of semiconductors with the same bandgap, and the difference in breakdown voltage between the light receiving region and the guard ring region is small.

〔問題点を解決するための手段〕[Means for solving problems]

上記問題点の解決は、基板上の受光領域に突出して形成
された。バンドギャップの大きいバリア層とバンドギャ
ップの小さいウェル層を交互に積層した超格子よりなる
増倍層と、該増倍層の周囲に該超格子のウェル層よりバ
ンドギャップの太きい一導電型の半導体よりなるウィン
ド層兼ガードリング層とを有し、受光領域を含んだ領域
の該ウィンド層兼ガードリング層を他導電型化してなる
半導体受光装置により達成される。
The above problem was solved by forming a protruding light receiving area on the substrate. A multiplier layer consisting of a superlattice in which a barrier layer with a large bandgap and a well layer with a small bandgap are alternately laminated; This is achieved by a semiconductor light-receiving device having a window layer/guard ring layer made of a semiconductor, and in which the window layer/guard ring layer in a region including the light receiving region is of a different conductivity type.

〔作用〕[Effect]

本発明は、超格子APDの受光領域の低ブレークダウン
電圧と、バンドギャップの大きいガードリング層の高耐
圧とを利用して強固なガードリング効果を得るものであ
る。
The present invention utilizes the low breakdown voltage of the light-receiving region of the superlattice APD and the high breakdown voltage of the guard ring layer with a large band gap to obtain a strong guard ring effect.

〔実施例〕〔Example〕

第1図(11,(21は本発明の一実施例としてInP
/Ga InAs超格子増倍層を使用したAPDの断面
図である。
FIG. 1 (11, (21 is InP as an embodiment of the present invention)
FIG. 2 is a cross-sectional view of an APD using a /Ga InAs superlattice multiplication layer.

つぎに、工程順に構造を説明する。Next, the structure will be explained in order of steps.

図において、  n”−InP基板1上に。In the figure, on an n''-InP substrate 1.

光吸収層としてn−Gao、 4tIno、 sJs層
2゜増倍層としてn型の超格子 (n−InP/n−Gao、 4?rn0.53AS)
 3 +ウィンド層としてバリア層のGaInAsより
バンドギャップの大きいn−InP層4 を順次成長し、受光領域を残して図示のようにメサエッ
チングする。
n-Gao, 4tIno, sJs layer as light absorption layer; n-type superlattice as 2° multiplication layer (n-InP/n-Gao, 4?rn0.53AS)
3+ An n-InP layer 4 having a larger band gap than the GaInAs barrier layer is successively grown as a window layer, and mesa etched as shown in the figure, leaving a light-receiving region.

つぎに、メサの周囲を埋め込んでウィンド層兼ガードリ
ング層としてバリア層のGa1nAsよりバンドギャッ
プの大きいn−InP層5を成長する。
Next, an n-InP layer 5 having a larger band gap than Ga1nAs of the barrier layer is grown to fill the periphery of the mesa and serve as a window layer and a guard ring layer.

第1図(11はメサの周囲のみに成長した場合、第1図
(2)はメサの周囲を埋め込んで上部にも成長した場合
に対応する。
Figure 1 (11) corresponds to the case where the growth occurs only around the mesa, and Figure 1 (2) corresponds to the case where the area around the mesa is buried and the growth also grows on the top.

第1図(1)の場合はn−InP層4およびn−1nP
層5の表面より、あるいは第1図(2)の場合はnJn
P層5の表面よりp型不純物としてZn、またはCdを
拡散してp゛型領領域5形成する。
In the case of FIG. 1 (1), the n-InP layer 4 and the n-1nP
From the surface of layer 5, or in the case of FIG. 1 (2), nJn
Zn or Cd is diffused as a p-type impurity from the surface of the P layer 5 to form a p'-type region 5.

各層の諸元はつぎの通りである。The specifications of each layer are as follows.

図番 物質名  F−バント   濃度   厚さくc
m−’)   (μm) 6  p+−領域 Zn   lXl0′91.05 
 n−InP    Cd   5X10”   4.
04  n−InP    Sn   lXl0I61
.53  n−超格子 アンドープ      −−2
n−GaInAs   アンドープ   5X10′5
    2.01   n’−1nP     Sn 
     lX10”    150.0n−超格子の
層構成は。
Drawing number Substance name F-Band Concentration Thickness c
m-') (μm) 6 p+- region Zn lXl0'91.05
n-InP Cd 5X10” 4.
04 n-InP Sn lXl0I61
.. 53 n-superlattice undoped --2
n-GaInAs undoped 5X10'5
2.01 n'-1nP Sn
The layer structure of the lX10'' 150.0n-superlattice is:

厚さ150人、不純物濃度≦I X 10”cm−’の
n−1nP層を20〜30層と。
20 to 30 n-1nP layers with a thickness of 150 mm and an impurity concentration ≦I x 10"cm-'.

厚さ150人、不純物濃度≦1×10IS10l5のn
−GaInAs層を20〜30層 を交互に積層したものである。
Thickness: 150, impurity concentration ≦1×10 IS10l5 n
-20 to 30 GaInAs layers are alternately laminated.

つぎに、p゛型領領域6上p側電極7゜n”−1nP基
板lの裏面にnil電極8を形成してAPDの主要部の
形成を終わる。
Next, a nil electrode 8 is formed on the back surface of the p-side electrode 7'n''-1nP substrate l on the p'-type region 6, completing the formation of the main part of the APD.

第2図は本発明のAPDの深さ方向の距離Xに対する電
界Eの分布を示す図である。
FIG. 2 is a diagram showing the distribution of the electric field E with respect to the distance X in the depth direction of the APD of the present invention.

電界Eの距離Xに対する傾斜は各層の不純物濃度に依存
する。
The slope of the electric field E with respect to the distance X depends on the impurity concentration of each layer.

深さ方向の距離Xはpnj1合面をOとして基板方向に
はかり、電界E (V cm−’)はウィンド層4では
距離Xとともに漸減するが、超格子増倍N3.光吸収層
2では略一定となり、基板1内では急減する様子を示し
ている。
The distance X in the depth direction is measured in the direction of the substrate with the pnj1 interface as O, and the electric field E (V cm-') gradually decreases with the distance X in the wind layer 4, but due to the superlattice multiplication N3. It is shown that it is approximately constant in the light absorption layer 2 and rapidly decreases in the substrate 1.

従来のInP系のAPDでは α/β=2.5.  過剰雑音指数F=5であったが、
実施例の超格子APDの場合はβ/α=10.過剰雑音
指数F= 2〜3と向上した。
In the conventional InP-based APD, α/β=2.5. Although the excess noise figure was F=5,
In the case of the superlattice APD of the example, β/α=10. The excess noise figure improved to F=2-3.

さらに、バンドギャップは ガードリングのInPは1.35 eV。Furthermore, the bandgap is InP of the guard ring is 1.35 eV.

バリア層のInPは  1.35 eV。InP of the barrier layer is 1.35 eV.

ウェル層のGaInAsは 0.75 eV。GaInAs in the well layer has a voltage of 0.75 eV.

(または光吸収層) であるため、実施例の耐圧はInPガードリングで80
〜100 V、超格子の増倍層で30〜40 Vであり
、十分な耐圧差がとれ9強固なガードリング効果が得ら
れる。
(or light absorption layer), the breakdown voltage of the example is 80% with an InP guard ring.
~100 V, and 30 to 40 V in the superlattice multiplication layer, which provides a sufficient breakdown voltage difference9 and a strong guard ring effect.

実施例では、ガードリングにInPを用いたが。In the example, InP was used for the guard ring.

これの代わりにさらにバンドギャップの大きいAlIn
Asを用いてもよいが、3元結晶であるためInPに比
べて成長が複雑となる。
Instead of this, AlIn with an even larger bandgap
As may be used, but since it is a ternary crystal, growth is more complicated than InP.

さらに、実施例では、超格子にInP/Ga InAs
を用いたが、これの代わりにAlSb/GaSb。
Furthermore, in the example, InP/Ga InAs is used in the superlattice.
was used, but AlSb/GaSb was used instead.

AlInAs/Ga1nAs、 AlGaSb/GaS
bを用いても同様の効果が得られた。
AlInAs/Ga1nAs, AlGaSb/GaS
Similar effects were obtained using b.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明によれば、超格子増倍層を用
いた強固なガードリング効果を有するAPDが得られ、
かつ超格子使用による低雑音、超高速化が達成される。
As explained above, according to the present invention, an APD having a strong guard ring effect using a superlattice multiplication layer can be obtained,
In addition, low noise and ultra-high speed can be achieved by using a superlattice.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例として InP/Ga1nAs超格子の増倍層を使用したAPD
の断面図。 第2図は本発明のAPDの深さ方向の距離Xに対する電
界Eの分布を示す図。 第3図は従来例を説明する1μm帯のInP系APDの
断面図である。 図において。 1はnゝ−1nP基板。 2は光吸収層でn−GaInAs層。 3は増倍層でn−超格子(n−InP/GaInAs)
 。 4はウィンド層でn−InP層。 5はウィンド層兼ガードリング層でn−InP層。 6はp゛型領領域 7はp側電極。 8はn側電極 木窓明f)断釦酊 第 1 ロ 42  園 第3 叫
Figure 1 shows an APD using an InP/Ga1nAs superlattice multiplication layer as an embodiment of the present invention.
Cross-sectional view. FIG. 2 is a diagram showing the distribution of electric field E with respect to distance X in the depth direction of the APD of the present invention. FIG. 3 is a cross-sectional view of a 1 μm band InP-based APD explaining a conventional example. In fig. 1 is an n-1nP substrate. 2 is a light absorption layer, which is an n-GaInAs layer. 3 is a multiplication layer made of n-superlattice (n-InP/GaInAs)
. 4 is a wind layer and is an n-InP layer. 5 is an n-InP layer which serves as a wind layer and a guard ring layer. 6 is a p-type region 7 is a p-side electrode. 8 is the n-side electrode Komado Akira

Claims (1)

【特許請求の範囲】[Claims] 基板上の受光領域に突出して形成された、バンドギャッ
プの大きいバリア層とバンドギャップの小さいウェル層
を交互に積層した超格子よりなる増倍層と、該増倍層の
周囲に該超格子のウェル層よりバンドギャップの大きい
一導電型の半導体よりなるウインド層兼ガードリング層
とを有し、受光領域を含んだ領域の該ウインド層兼ガー
ドリング層を他導電型化してなることを特徴とする半導
体受光装置。
A multiplication layer made of a superlattice in which a barrier layer with a large bandgap and a well layer with a small bandgap are alternately laminated is formed to protrude into the light-receiving region of the substrate, and a multiplication layer of the superlattice is formed around the multiplication layer. It has a window layer/guard ring layer made of a semiconductor of one conductivity type with a larger band gap than the well layer, and the window layer/guard ring layer in the region including the light receiving region is made of a different conductivity type. Semiconductor photodetector.
JP62121510A 1987-05-19 1987-05-19 Semiconductor photodetector Pending JPS63285976A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62121510A JPS63285976A (en) 1987-05-19 1987-05-19 Semiconductor photodetector

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62121510A JPS63285976A (en) 1987-05-19 1987-05-19 Semiconductor photodetector

Publications (1)

Publication Number Publication Date
JPS63285976A true JPS63285976A (en) 1988-11-22

Family

ID=14812985

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62121510A Pending JPS63285976A (en) 1987-05-19 1987-05-19 Semiconductor photodetector

Country Status (1)

Country Link
JP (1) JPS63285976A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04255274A (en) * 1991-02-06 1992-09-10 Fujitsu Ltd Semiconductor photodetective device and manufacture thereof
JP2006295216A (en) * 1995-02-02 2006-10-26 Sumitomo Electric Ind Ltd Pin type light-receiving device, and method of manufacturing same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04255274A (en) * 1991-02-06 1992-09-10 Fujitsu Ltd Semiconductor photodetective device and manufacture thereof
JP2006295216A (en) * 1995-02-02 2006-10-26 Sumitomo Electric Ind Ltd Pin type light-receiving device, and method of manufacturing same

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