JPS6328505B2 - - Google Patents
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- Publication number
- JPS6328505B2 JPS6328505B2 JP57171280A JP17128082A JPS6328505B2 JP S6328505 B2 JPS6328505 B2 JP S6328505B2 JP 57171280 A JP57171280 A JP 57171280A JP 17128082 A JP17128082 A JP 17128082A JP S6328505 B2 JPS6328505 B2 JP S6328505B2
- Authority
- JP
- Japan
- Prior art keywords
- type
- region
- aluminum
- electrode
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Links
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 27
- 229910052782 aluminium Inorganic materials 0.000 claims description 27
- 238000000034 method Methods 0.000 claims description 23
- 239000000758 substrate Substances 0.000 claims description 20
- 238000009792 diffusion process Methods 0.000 claims description 16
- 229910052732 germanium Inorganic materials 0.000 claims description 16
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 16
- 238000004519 manufacturing process Methods 0.000 claims description 12
- 239000004065 semiconductor Substances 0.000 claims description 10
- 238000000137 annealing Methods 0.000 description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- 239000000463 material Substances 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 4
- 239000012535 impurity Substances 0.000 description 4
- 229910000927 Ge alloy Inorganic materials 0.000 description 3
- 229910004298 SiO 2 Inorganic materials 0.000 description 3
- BYDQGSVXQDOSJJ-UHFFFAOYSA-N [Ge].[Au] Chemical compound [Ge].[Au] BYDQGSVXQDOSJJ-UHFFFAOYSA-N 0.000 description 3
- 230000006378 damage Effects 0.000 description 3
- 238000005468 ion implantation Methods 0.000 description 3
- 235000012239 silicon dioxide Nutrition 0.000 description 3
- 239000000377 silicon dioxide Substances 0.000 description 3
- 238000001771 vacuum deposition Methods 0.000 description 3
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 229910052796 boron Inorganic materials 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000000155 melt Substances 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 125000003118 aryl group Chemical group 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000008034 disappearance Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
- H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
- H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
- H01L31/102—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier
- H01L31/103—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier the potential barrier being of the PN homojunction type
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Light Receiving Elements (AREA)
Description
【発明の詳細な説明】
(1) 発明の技術分野
本発明は半導体装置の製造方法に関する。特
に、量子効率の良好なPN型、PIN型の受光素子
の改良に関する。DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to a method for manufacturing a semiconductor device. In particular, it relates to improvements in PN-type and PIN-type photodetectors with good quantum efficiency.
(2) 技術の背景
受光素子の一つにフオトダイオードがある。こ
れはゲルマニウム（Ge）、シリコン（Si）等を基
材として使用し、PN接合に逆バイアス電圧を印
加すると、キヤリヤが動いてその境界面付近が空
乏層化するという現象を利用したものである。(2) Technical background One of the light-receiving elements is a photodiode. This uses germanium (Ge), silicon (Si), etc. as the base material, and takes advantage of the phenomenon that when a reverse bias voltage is applied to the PN junction, the carrier moves and the area near the interface becomes a depletion layer. .
第１図はPN型フオトダイオードの基本構造の
一例を示す基板断面図であり、図において、１は
例えばＰ型ゲルマニウム（Ｐ―Ge）よりなる基
板であり、２はＮ型ゲルマニウム（Ｎ―Ge）よ
りなる層であり、３は二酸化シリコン（SiO2）
よりなる絶縁層であり、４はアルミニウム（Al）
よりなる正電極、５は金・ゲルマニウム合金
（AuGe）よりなる負電極である。 FIG. 1 is a cross-sectional view of a substrate showing an example of the basic structure of a PN-type photodiode. ), and 3 is silicon dioxide (SiO 2 ).
4 is aluminum (Al)
5 is a positive electrode made of a gold-germanium alloy (AuGe).
この様な受光素子にあつては、光は結晶表面で
吸収されるためPN接合はできるだけ浅い位置に
形成する必要がある。量子効率が良好になるから
である。したがつて、浅いPN接合を形成するた
めの開発の努力がなされている。 In such a light receiving element, since light is absorbed at the crystal surface, the PN junction must be formed as shallowly as possible. This is because quantum efficiency becomes better. Therefore, development efforts are being made to form shallow PN junctions.
(3) 従来技術と問題点
従来、第１図に示せる如く、Ｐ型ゲルマニウム
基板にＮ型拡散層を形成し、アルミニウム（Al）
をもつて電極を形成していた。その製造方法にお
いて、アルミニウム（Al）電極をＮ型拡散層上
に形成し、オーミツクコンタクトを形成するため
のアニール工程が含まれるが、このようにして製
造されたPNフオトダイオードを動作させると暗
電流が増加し、その程度によつてはフオトダイオ
ードとして動作しないという現象が認められた。
これは、アニール工程におけるアルミニウム
（Al）の挙動に起因するものと考えられる。(3) Conventional technology and problems Conventionally, as shown in Figure 1, an N-type diffusion layer is formed on a P-type germanium substrate, and an aluminum (Al)
The electrode was formed using The manufacturing method involves forming an aluminum (Al) electrode on the N-type diffusion layer and an annealing process to form an ohmic contact. A phenomenon was observed in which the current increased and, depending on the degree of increase, the photodiode did not function.
This is considered to be due to the behavior of aluminum (Al) during the annealing process.
そこで、量子効率を良好に保ちながらも、この
様な暗電流の増加を防止するために第２図に示す
如き構造となす手法が用いられてきた。すなわ
ち、Ｎ型拡散層以外の構造は第１図と全く同様で
あるが、Ｎ型領域を形成するためのＮ型不純物拡
散工程を２回の工程となし、図において、１２を
もつて示される受光領域を１回目の拡散工程によ
つて、又、１２′をもつて示される電極接続領域
を２回目の拡散工程によつて夫々形成する。この
とき、受光領域１２は浅く形成されているため量
子効率が良好に保たれ、かつ、電極接続１２′は
受光領域１２よりも深く形成され、PN接合の破
壊が防止されると共に耐圧も向上される。 Therefore, in order to prevent such an increase in dark current while maintaining good quantum efficiency, a method of creating a structure as shown in FIG. 2 has been used. That is, the structure other than the N-type diffusion layer is exactly the same as that in FIG. 1, but the N-type impurity diffusion step for forming the N-type region is performed twice, and is indicated by 12 in the figure. The light-receiving area is formed by the first diffusion process, and the electrode connection area indicated by 12' is formed by the second diffusion process. At this time, since the light-receiving region 12 is formed shallowly, quantum efficiency is maintained well, and the electrode connection 12' is formed deeper than the light-receiving region 12, which prevents destruction of the PN junction and improves breakdown voltage. Ru.
かゝる半導体装置の製造方法の例として、特開
昭50−134394号公報に開示された発明や特開昭50
−114187号公報に開示された発明が知られている
が、いづれも、電極の下部に深いＰ型領域を、そ
の目的のみのための、いわば専用の工程をもつて
形成している。 Examples of such semiconductor device manufacturing methods include the invention disclosed in Japanese Patent Application Laid-open No. 134394/1983 and the invention disclosed in Japanese Patent Application Laid-Open No.
The invention disclosed in Japanese Patent No. 114187 is known, but in all of them, a deep P-type region is formed under the electrode using a special process solely for that purpose.
しかしながら、このような２回の拡散工程は煩
雑であるため、もし、１回の拡散工程で上記と同
様の構造を実現しうれば、工業的にはなはだ有利
である。 However, since such two diffusion steps are complicated, it would be industrially advantageous if a structure similar to that described above could be realized in one diffusion step.
(4) 発明の目的
本発明の目的は、この要請に応えることにあ
り、PN接合を有し、このPN接合領域の一部に
アルミニウム（Al）よりなる電極を有する半導
体装置の製造方法において、PN接合の破壊が有
効に防止される構造が１回の工程をもつて実現さ
れる半導体装置の製造方法を提供することにあ
る。(4) Purpose of the Invention The purpose of the present invention is to meet this demand, and to provide a method for manufacturing a semiconductor device having a PN junction and having an electrode made of aluminum (Al) in a part of the PN junction region. It is an object of the present invention to provide a method for manufacturing a semiconductor device in which a structure in which destruction of a PN junction is effectively prevented can be realized in one process.
(5) 発明の構成
このような本発明の目的は、Ｎ型ゲルマニウム
基板にＰ型領域を選択的に形成する工程と、
該Ｐ型領域上の所定領域にアルミニウムよりな
る電極を形成する工程と、
該電極中のアルミニウムを該ゲルマニウム基板
中に拡散することで、該電極接触部に該Ｐ型領域
よりも深いＰ型拡散領域を形成する工程と
が含まれてなる
ことを特徴とする半導体装置の製造方法によつ
て達成される。(5) Structure of the Invention The object of the present invention is to provide a step of selectively forming a P-type region on an N-type germanium substrate, and a step of forming an electrode made of aluminum in a predetermined region on the P-type region. , forming a P-type diffusion region deeper than the P-type region in the electrode contact portion by diffusing aluminum in the electrode into the germanium substrate. This is achieved by the manufacturing method.
要するに、本発明の要旨は、アルミニウム電極
中のアルミニウムを基板中（前記アルミニウム電
極接触部）に拡散させて、電極接触部にＰ型領域
よりも深いＰ型拡散領域を形成することを特徴と
する。 In short, the gist of the present invention is characterized in that aluminum in the aluminum electrode is diffused into the substrate (the aluminum electrode contact portion) to form a P-type diffusion region deeper than the P-type region in the electrode contact portion. .
前記従来技術において、暗電流が増加する等の
現象は、Ｐ型不純物となるアルミニウム（Al）
がアニールにより浅いPN接合を突き抜けて融け
出し、Ｎ型層の一部領域の導電型を反転させると
ともに、Ｐ型基板中まで進入し、その結果、電極
下部領域は全てＰ型層となつてしまい、この領域
においてNP接合が消滅してしまうことにあると
考えられる。 In the conventional technology described above, phenomena such as an increase in dark current are caused by aluminum (Al), which is a P-type impurity.
As a result of annealing, it penetrates through the shallow PN junction and melts, inverting the conductivity type of some regions of the N-type layer and penetrating into the P-type substrate, resulting in the entire lower electrode region becoming a P-type layer. This is thought to be due to the disappearance of the NP junction in this region.
一方、Ｎ型シリコン（Ｎ―Si）層上にアルミニ
ウム（Al）よりなる薄膜を形成し、550〔℃〕程
度の温度をもつてアニールすると、この層中のド
ナー濃度が５×1018〔cm-3〕程度以下であるとき、
アルミニウム（Al）が融け込んでPN接合が形成
されることが知られている。 On the other hand, if a thin film made of aluminum (Al) is formed on an N-type silicon (N-Si) layer and annealed at a temperature of about 550 [°C], the donor concentration in this layer will be 5 × 10 18 [cm -3 ] or less,
It is known that aluminum (Al) melts and forms a PN junction.
本発明の発明者らは、Ｎ型ゲルマニウム（Ｎ―
Ge）基板上に真空蒸着法等を使用してアルミニ
ウム（Al）層を形成したのちアニールを行なう
と、基板のドナー濃度が１×1018〔cm-3〕程度以
下、かつ、アニール温度が300〜420〔℃〕の範囲
のとき、PN接合が形成されることが確認した。 The inventors of the present invention have discovered that N-type germanium (N-
Ge) If an aluminum (Al) layer is formed on a substrate using a vacuum evaporation method or the like and then annealed, the donor concentration of the substrate is about 1×10 18 [cm -3 ] or less and the annealing temperature is 300 It was confirmed that a PN junction was formed when the temperature was in the range of ~420 [°C].
例えばドナー濃度が１×1015〔cm-3〕程度のＮ
型ゲルマニウム（Ｎ―Ge）基板に、イオン注入
法等を使用して浅いＰ型領域を形成したのち、こ
のPN接合上の所望の領域にアルミニウム（Al）
電極を真空蒸着法等を使用して形成し、約340
〔℃〕で10分間程度アニールを行つた結果、所望
のPN接合が形成された。 For example, N with a donor concentration of about 1×10 15 [cm -3 ]
After forming a shallow P-type region on a germanium (N-Ge) substrate using an ion implantation method, aluminum (Al) is deposited on the desired region on this PN junction.
The electrodes are formed using a vacuum evaporation method, etc., and the electrodes are approximately 340
As a result of annealing at [°C] for about 10 minutes, the desired PN junction was formed.
(6) 発明の実施例
以下図面を参照しつつ、本発明の一実施例に係
る半導体装置の製造方法について説明し、本発明
の構成と特有の効果とを明らかにする。(6) Embodiments of the Invention A method for manufacturing a semiconductor device according to an embodiment of the present invention will be described below with reference to the drawings, and the structure and unique effects of the present invention will be clarified.
一例として、ゲルマニウム（Ge）を基材とし、
受光部径が５〔mm〕程度であるPNフオトダイオ
ードの製造方法について述べる。 As an example, germanium (Ge) is used as the base material,
A method for manufacturing a PN photodiode with a light receiving portion diameter of about 5 mm will be described.
第３図参照
ドナー濃度が１×1015〔cm-3〕程度のＮ型ゲル
マニウム（Ｎ―Ge）基板２１の一部領域に選択
的にＰ型不純物として硼素(B)を導入し、深さ2000
〔Å〕程度Ｐ型受光領域２２を形成する。かかる
硼素の注入エネルギーを40〔KeV〕程度、ドーズ
量を３×1013〔cm-2〕程度となし、かかるイオン
注入後温度550〔℃〕、時間１時間の熱処理（アリ
ール）を行つて所望のＰ型受光領域２２が得られ
る。See Figure 3. Boron (B) is selectively introduced as a P-type impurity into a partial region of an N-type germanium (N-Ge) substrate 21 with a donor concentration of about 1×10 15 [cm -3 ], and 2000
A P-type light-receiving region 22 of approximately [Å] is formed. The boron implantation energy was set to about 40 [KeV] and the dose was set to about 3×10 13 [cm -2 ], and after the ion implantation, heat treatment (aryl) was performed at a temperature of 550 [°C] for 1 hour to form the desired material. A P-type light-receiving region 22 is obtained.
第４図参照
Ｎ型基板２１の全面に化学気相成長法（CVD
法）を使用して二酸化シリコン（SiO2）よりな
る絶縁層２３を2200〔Å〕程度の厚さに形成した
のち、公知の方法を用いてPN接合上の所望の領
域に、負電極コンタクト用の、無終端の帯状の開
口を形成する。続いて、真空蒸着法とフオトエツ
チング法とを使用してアルミニウム（Al）より
なる負電極２４を形成する。Refer to Figure 4. Chemical vapor deposition (CVD) is applied to the entire surface of the N-type substrate 21.
After forming an insulating layer 23 made of silicon dioxide (SiO 2 ) to a thickness of approximately 2200 Å using a method (method), a layer 23 for a negative electrode contact is formed in a desired region on the PN junction using a known method. , forming an endless strip-shaped opening. Subsequently, a negative electrode 24 made of aluminum (Al) is formed using a vacuum evaporation method and a photoetching method.
第５図参照
上記の工程終了後、340〔℃〕程度の温度をもつ
て５分間程度以下のアニールをなすと、電極２４
とＰ型受光領域２２との界面には良好なオーミツ
クコンタクトが形成されるとともにアルミニウム
電極２４よりアルミニウム（Al）が下方へ拡散
し、Ｐ型受光領域２２を突き抜けて、図示せる如
くＮ型基板２１の一部領域にＰ型領域２２よりも
深いＰ型領域２２′が形成される。See Figure 5 After completing the above steps, annealing is performed at a temperature of about 340 [°C] for about 5 minutes or less, and the electrode 2
A good ohmic contact is formed at the interface between the P-type light-receiving region 22 and the aluminum electrode 24, and aluminum (Al) diffuses downward from the aluminum electrode 24, penetrates the P-type light-receiving region 22, and forms an N-type substrate as shown in the figure. A P-type region 22' deeper than the P-type region 22 is formed in a part of the region 21.
しかるのち、公知の方法を使用して金・ゲルマ
ニウム合金（AuGe）よりなる正電極２５を形成
し、本実施例に係るPNフオトダイオードを完成
する。 Thereafter, a positive electrode 25 made of gold-germanium alloy (AuGe) is formed using a known method to complete the PN photodiode of this example.
すなわち、本発明にあつては、ゲルマニウム基
板２１中への不純物導入工程（イオン注入）は１
回のみであり、アルミニウム電極２４下へのアル
ミニウムの拡散はオーミツクコンタクト形成用ア
ニール工程になされるものであつて、工程数の増
加はない。 That is, in the present invention, the step of introducing impurities (ion implantation) into the germanium substrate 21 is performed in one step.
The diffusion of aluminum below the aluminum electrode 24 is performed in an annealing process for forming an ohmic contact, and there is no increase in the number of processes.
第６図は、上記により完成されたゲルマニウム
（Ge）を基材とし、受光部径が５〔mm〕程度のPN
フオトダイオードと、従来技術により製造され上
記と同様ゲルマニウム（Ge）を基材とし、受光
部径が５〔mm〕程度のPNフオトダイオードとの
逆バイアス電圧に対する暗電流特性を比較した線
図である。 Figure 6 shows a PN with a germanium (Ge) base material and a light-receiving part diameter of about 5 mm.
This is a diagram comparing dark current characteristics with respect to reverse bias voltage between a photodiode and a PN photodiode manufactured using conventional technology, made of germanium (Ge) as the base material as above, and having a light receiving area diameter of about 5 mm. .
図において、横軸は逆バイアス電圧〔Ｖ〕であ
り、縦軸は暗電流〔μA〕であり、実線Ａは本発
明の実施例において得られたPNフオトダイオー
ドの特性であり、実線Ｂは従来技術において得ら
れたPNフオトダイオードの特性である。かかる
特性より明らかな如く、本実施例により得られた
PNフオトダイオードの暗電流は30〜35〔μA〕で
あり、従来技術における値、80〜90〔μA〕に比し
てはるかに低減されている。 In the figure, the horizontal axis is the reverse bias voltage [V], the vertical axis is the dark current [μA], the solid line A is the characteristic of the PN photodiode obtained in the example of the present invention, and the solid line B is the characteristic of the conventional PN photodiode. These are the characteristics of the PN photodiode obtained in this technology. As is clear from these characteristics, the
The dark current of a PN photodiode is 30 to 35 [μA], which is much lower than the value in the prior art, which is 80 to 90 [μA].
以上の構造となすことにより、ゲルマニウム
（Ge）を基材とするPNフオトダイオードにて、
受光部のPN接合を非常に浅く形成しながら、暗
電流の増加が有効に防止されうる構造を、より少
い工程により実現することができる。 With the above structure, in a PN photodiode based on germanium (Ge),
A structure in which an increase in dark current can be effectively prevented while forming a very shallow PN junction in the light receiving part can be realized with fewer steps.
なお、第５図に示される構造において、電極２
４下部のＰ型領域２２′をＰ型受光領域２２の縁
部に沿つて形成すれば耐圧を更に向上することが
できる。 Note that in the structure shown in FIG.
If the P-type region 22' at the bottom of 4 is formed along the edge of the P-type light-receiving region 22, the breakdown voltage can be further improved.
また、前記実施例にあつては、PNフオトダイ
オードを掲げて説明したが、本発明はこれに限定
されるものではなくPIN型フオトダイオードにも
適用し得るものである。 Furthermore, although the above embodiments have been described using a PN photodiode, the present invention is not limited thereto and can also be applied to a PIN photodiode.
(7) 発明の効果
以上説明せるとおり、本発明によれば、PN接
合を有し、このPN接合領域の一部にアルミニウ
ム（Al）よりなる電極を有する半導体装置の製
造方法において、PN接合の破壊が有効に防止さ
れる構造が１回の工程をもつて実現されてなる、
半導体装置の製造方法を提供することができる。(7) Effects of the Invention As explained above, according to the present invention, in a method for manufacturing a semiconductor device having a PN junction and having an electrode made of aluminum (Al) in a part of the PN junction region, A structure that effectively prevents destruction is realized in a single process.
A method for manufacturing a semiconductor device can be provided.
第１図及び第２図は従来技術におけるPNフオ
トダイオードの基本構造を示す基板断面図であ
り、第３図乃至第５図は本発明の一実施例に係る
PNフオトダイオードの製造方法における主要工
程完了後の基板断面図である。第６図は本発明に
よる半導体装置と従来の半導体装置の電圧―暗電
流特性を示す曲線図である。
１，１１……Ｐ型ゲルマニウム（Ｐ―Ge）基
板、２１……Ｎ型ゲルマニウム（Ｎ―Ge）基板、
２，１２……Ｎ型拡散層（Ge）、１２′……２回
目の拡散工程によつて形成されたＮ型拡散層
（Ge）、２２……Ｐ型拡散層（Ge）、２２′……本
発明の一実施例に係り、アルミニウム（Al）電
極より融け出したアルミニウム（Al）によつて
形成されたＰ型領域、３，１３，２３……二酸化
シリコン（SiO2）絶縁層、４，１４，２４……
アルミニウム（Al）電極、５，１５，２５……
金・ゲルマニウム合金（AuGe）電極。
1 and 2 are cross-sectional views of a substrate showing the basic structure of a PN photodiode according to the prior art, and FIGS. 3 to 5 are cross-sectional views of a substrate according to an embodiment of the present invention.
FIG. 3 is a cross-sectional view of the substrate after completion of the main steps in the method for manufacturing a PN photodiode. FIG. 6 is a curve diagram showing voltage-dark current characteristics of a semiconductor device according to the present invention and a conventional semiconductor device. 1, 11... P-type germanium (P-Ge) substrate, 21... N-type germanium (N-Ge) substrate,
2, 12...N-type diffusion layer (Ge), 12'...N-type diffusion layer (Ge) formed by the second diffusion step, 22...P-type diffusion layer (Ge), 22'... ... P-type region formed of aluminum (Al) melted from an aluminum (Al) electrode according to an embodiment of the present invention, 3, 13, 23 ... Silicon dioxide (SiO 2 ) insulating layer, 4 ,14,24...
Aluminum (Al) electrode, 5, 15, 25...
Gold-germanium alloy (AuGe) electrode.
Claims (1)
形成する工程と、 該Ｐ型領域上の所定領域にアルミニウムよりな
る電極を形成する工程と、 該電極中のアルミニウムを該ゲルマニウム基板
中に拡散することで、該電極接触部に該Ｐ型領域
よりも深いＰ型拡散領域を形成する工程と が含まれてなる ことを特徴とする半導体装置の製造方法。[Claims] 1. A step of selectively forming a P-type region on an N-type germanium substrate, a step of forming an electrode made of aluminum in a predetermined region on the P-type region, and a step of forming an electrode made of aluminum in the electrode. A method for manufacturing a semiconductor device, comprising the step of: forming a P-type diffusion region deeper than the P-type region in the electrode contact portion by diffusing germanium into the substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57171280A JPS5961191A (en) | 1982-09-30 | 1982-09-30 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57171280A JPS5961191A (en) | 1982-09-30 | 1982-09-30 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5961191A JPS5961191A (en) | 1984-04-07 |
| JPS6328505B2 true JPS6328505B2 (en) | 1988-06-08 |
Family
ID=15920394
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57171280A Granted JPS5961191A (en) | 1982-09-30 | 1982-09-30 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5961191A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0328901U (en) * | 1989-08-01 | 1991-03-22 | ||
| US10814803B2 (en) | 2015-06-03 | 2020-10-27 | Weidplas Gmbh | Component |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6066877A (en) * | 1983-09-22 | 1985-04-17 | Shimadzu Corp | Photo diode |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS50114187A (en) * | 1974-02-15 | 1975-09-06 | ||
| JPS50134394A (en) * | 1974-04-10 | 1975-10-24 |
-
1982
- 1982-09-30 JP JP57171280A patent/JPS5961191A/en active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS50114187A (en) * | 1974-02-15 | 1975-09-06 | ||
| JPS50134394A (en) * | 1974-04-10 | 1975-10-24 |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0328901U (en) * | 1989-08-01 | 1991-03-22 | ||
| US10814803B2 (en) | 2015-06-03 | 2020-10-27 | Weidplas Gmbh | Component |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5961191A (en) | 1984-04-07 |
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