JPS63279657A - Phase locked loop device - Google Patents

Abstract

PURPOSE:To reduce the fluctuation of an output frequency, and to prevent an influence due to a temperature change, in a phase locked loop device to control the oscillation frequency of a voltage controlled oscillator by providing a false pulse generating means, which outputs a false pulse to a phase detector during the disconnection state of a reference pulse signal. CONSTITUTION:In a scanning area, where the reference pulse signal Pr is generated, a gate signal T comes to be a low level and a gate 22 closes, and in a non-scanning area, the reference pulse signal Pr comes to the disconnection state, and a counter 26 frequency-divides a clock CK and makes it into the pulse P3 of the same frequency as the reference pulse signal Pr. The pulse P3 comes to be the pulse, the phase of which coincides with approximately with that of the reference pulse signal Pr, and outputted as the false pulse Prd through the gate 22. The false pulse Prd is inputted to the phase detector 18 through an OR gate 25, and the voltage controlled oscillator 19 oscillates as synchronizing with the false pulse Prd. Thus, the false pulse Prd like an abovementioned one is always supplied to the phase detector 18. Thus, the ripple of the input voltage of a voltage controlled oscillator VCO can be suppressed small, and the moire of a picture or the like can be prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to a phase synchronization device in an optical writing device such as a laser printer.

(Prior Art) A phase synchronization device is used in an optical writing device such as a laser printer, and oscillates in synchronization with an input signal.

For example, in a laser printer, an image is written by scanning a photoreceptor with a laser beam using a rotating polygon mirror, etc., but the laser beam from the rotating polygon mirror is detected by a photodetector outside the scanning area, and the reference from this photodetector is detected. PLL the pulse signal (Phas
It is input to a phase synchronization device consisting of a Locked Loop) oscillator. The output signal of this phase synchronization device is used as a video clock signal, a video signal is generated by a character generator using this video clock signal, and the laser beam is modulated by a modulation means using this video signal.

However, since this phase synchronization device synchronizes with the reference pulse signal from the photodetector only at the beginning of one line scan, the dot position fluctuates due to the fluctuation of the video clock signal at the end of one line scan.

Therefore, by detecting laser light from a rotating polygon mirror or the like with a photodetector through a grating to generate a large number of reference pulse signals within the scanning area, and inputting these reference pulse signals to a phase synchronization device, multiple reference pulse signals within the scanning area can be detected. It is possible to suppress the fluctuation of the dot position by performing phase synchronization at the dots. Here, the grating has a pattern in which the transparency changes regularly in a direction parallel to the scanning direction of the laser beam.For example, transparent parts and opaque parts are formed alternately in the direction parallel to the scanning direction of the laser beam, resulting in a striped pattern. is formed. However, if you do this, the reference pulse signal from the photodetector is disconnected (non-scanning area).
In this case, the output frequency of the phase synchronization device consisting of a PLL oscillator fluctuates significantly, causing moiré and the like to occur in the image. Japanese Patent Publication No. 5
Publication No. 4-97050 further discloses a method that detects a blanking period of a reference pulse signal and applies a constant voltage to a voltage controlled oscillator in a PLL oscillator during this period to control the oscillation frequency of the voltage controlled oscillator to near the target frequency. Are listed. However, in this type of device, a constant voltage is applied to the voltage controlled oscillator during the blanking period of the reference pulse signal, so that the frequency of the video clock signal fluctuates due to temperature changes due to the influence of the temperature characteristics of the voltage controlled oscillator.

(Objective) It is an object of the present invention to provide a phase synchronization device that eliminates the above-mentioned drawbacks, can reduce fluctuations in output frequency, and is not affected by temperature source changes.

(Structure) The present invention detects the phase difference between a reference pulse signal obtained from a photodetector and a pulse signal from a voltage controlled oscillator using a phase detector, and uses the output signal of this phase detector to oscillate the voltage controlled oscillator. A phase synchronization device for controlling frequency is provided with a pseudo pulse generating means, and the pseudo pulse generating means outputs a pseudo pulse to the phase detector when the reference pulse signal is off.

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 5 shows an example of an optical writing device such as a laser printer. A semiconductor laser 11 emits a recording laser beam A and a reference pulse signal generation laser beam B.
B is a recording laser beam A from a 0-rotation polygon mirror 12 which is simultaneously deflected by a rotating polygon 1it 12 and a photoconductor drum 13.
A line is repeatedly scanned in the direction of the arrow shown in the figure, and the photosensitive drum 13 is rotationally driven by a motor. By modulating the semiconductor laser 11 with the video signal from the character generator by a modulation circuit (not shown), the recording laser beam A is modulated with the video signal and becomes the reference pulse signal generating laser beam B.
is not modulated, and the photosensitive drum 13 is uniformly charged with a corona discharger (not shown) and then scanned with a recording laser beam A to write an image. On the other hand, the reference pulse signal generation laser beam B from the rotating polygon mirror 12 is reflected by the mirror 14 and scans the grating 15. guided by.

For example, the grating 15 has a large number of transparent parts that emit laser light B.
are arranged at regular intervals in the scanning direction, and a reference pulse signal Pr is obtained from the photodetector 17 at regular intervals in the scanning area as shown in FIG.

FIG. 3 shows an example of a PLL oscillator, and FIG. 4 is its time chart. 0 phase detector (PD) 18 is the reference pulse signal Pr from the photodetector 17 and the output of the voltage controlled oscillator (VCO) 19 The phase difference between Po and the pulse signal pt obtained by dividing the frequency of Po by N by the frequency divider 20 is detected. The output PL of this phase detector 18 is applied to the VCO 19 via a low pass filter (LPF) 21 to control the oscillation frequency of the VCO 19, and the character generator receives the output of the VCO 19 as a video clock signal and generates a video signal. occurs.

In this PLL oscillator, when the reference pulse signal Pr is disconnected, that is, in a non-scanning area, the ripple of the output Vc of the LPF 21 increases, and the oscillation frequency of the VC019 fluctuates significantly, causing problems such as loss of synchronization.

Therefore, one embodiment of the present invention provides a pseudo pulse signal having the same frequency as the reference pulse signal to the phase detector 18 when the reference pulse signal is off, thereby forcing the oscillation frequency of the VCO 19 to be near the target oscillation frequency. This reduces the oscillation frequency fluctuation of VC019.

FIG. 1 shows an embodiment thereof, and the same parts as in FIG. 3 are given the same reference numerals. FIG. 2 shows a time chart of this embodiment. A gate signal T from a gate signal generating means (not shown) is a signal indicating a scanning area and a non-scanning area.
2 and is added to the gate 2 via the delay circuit 23.
Added to 4. In the scanning region where the reference pulse signal Pr is generated, the gate signal T becomes low level and the gate 22 is closed, and the reference pulse signal Pr from the photodetector 17 is inputted to the phase detector 18 via the OR gate 25 and the PLL l is inputted. @
The shaker operates as described above. Further, the gate 24 performs an AND operation between the output signal Td of the delay circuit 23 and the reference pulse signal Pr from the photodetector 17, and the counter 26 is reset to zero based on the output signal. In the non-scanning area, the reference pulse signal Pr is turned off, and the counter 26 divides the clock CK to generate a pulse P having the same frequency as the reference pulse signal Pr. This pulse P5 becomes a pulse substantially in phase with the reference pulse signal Pr by resetting the counter 26 at time To by the output signal of the gate 24, and is outputted as a pseudo pulse Prd via the gate 22. This pseudo pulse Prd is input to the phase detector 18 via the OR gate 25, and the voltage controlled oscillator 19 oscillates in synchronization with the pseudo pulse Prd. In this way, the phase detector 18 is always supplied with the reference pulse signal Pr or the pseudo pulse Prd having the same frequency and almost the same phase as the reference pulse signal Pr, so that the ripple of the input voltage Vc of VC019 is reduced, and the fluctuation of the oscillation frequency of VC019 is reduced. is reduced.

(Effects) As described above, according to the present invention, the pseudo pulse is input to the phase detector when the reference pulse signal is off.

Ripples in the input voltage of the vCO can be suppressed to a small level, and fluctuations in the oscillation frequency of the VCO can be reduced, making it possible to prevent moiré and the like in images.

Furthermore, since a pseudo pulse is input to the phase detector.

It is no longer affected by the temperature characteristics of vCO, and it is also possible to suppress fluctuations in dot position.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a time chart of the same embodiment, FIG. 3 is a block diagram showing an example of a PLL oscillator, and FIG. 4 is a time chart of the PLL oscillator. FIG. 5 is a perspective view showing an example of an optical writing device. 18... Phase detector, 19... VCo, 21
...LPF, 22-24.26... pseudo pulse generation means. Uδ diagram 弗几

Claims (1)

[Claims] A phase synchronization device that detects a phase difference between a reference pulse signal obtained from a photodetector and a pulse signal from a voltage-controlled oscillator using a phase detector, and controls the oscillation frequency of the voltage-controlled oscillator using the output signal of this phase detector. 2. A phase synchronization device according to claim 1, further comprising pseudo-pulse generating means for outputting a pseudo-pulse to the phase detector when the reference pulse signal is turned off.