JPS6327936B2 - - Google Patents

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Publication number
JPS6327936B2
JPS6327936B2 JP54025135A JP2513579A JPS6327936B2 JP S6327936 B2 JPS6327936 B2 JP S6327936B2 JP 54025135 A JP54025135 A JP 54025135A JP 2513579 A JP2513579 A JP 2513579A JP S6327936 B2 JPS6327936 B2 JP S6327936B2
Authority
JP
Japan
Prior art keywords
reactive power
sample
circuit
detector
receiving
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54025135A
Other languages
Japanese (ja)
Other versions
JPS55120339A (en
Inventor
Shinichi Imaizumi
Shinichiro Inoe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP2513579A priority Critical patent/JPS55120339A/en
Publication of JPS55120339A publication Critical patent/JPS55120339A/en
Publication of JPS6327936B2 publication Critical patent/JPS6327936B2/ja
Granted legal-status Critical Current

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  • Control Of Electrical Variables (AREA)

Description

【発明の詳細な説明】 この発明は、自家用変電所等の受電端における
受電力率を改善する無効電力制御装置に関するも
のである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a reactive power control device that improves the power reception rate at a power receiving end of a private substation or the like.

一般に、自家用変電所においては、電力会社の
送電系より電力供給を受ける場合、受電点におけ
る力率の改善すなわち受電力率pfをpf=1.0に近
づけることにより、電力料金の低減を図つてい
る。
Generally, when a private substation receives power from the power company's power transmission system, it aims to reduce power charges by improving the power factor at the power receiving point, that is, by bringing the received power factor pf closer to pf = 1.0.

従来、受電端における力率を改善する目的をも
つて、第1図に示すような無効電力制御装置が提
案され実施されている。すなわち、第1図は、受
電変圧器RTの2次側に負荷Lと並列に同期電動
機SMを接続し、この同期電動機SMの界磁電流
を制御して受電力率を改善する制御系を示し、受
電変圧器RTの1次側送電系に電圧変成器PT1
電流変成器CT1とを接続してなる受電無効電力検
出器RPD1を設け、この受電無効電力検出器
RPD1の検出値に基づいて制御設定値を定める設
定器Sを設け、一方受電変圧器RTの2次側配電
系にサイリスタSCRを使用した励励磁制御方式
の同期機SMの無効電力出力を検出するための電
圧変成器PT2と電流変成器CT2とを接続してなる
同期電動機SMの無効電力検出器RPD2を設け、
前記無効電力検出器RPD2で検出される無効電力
出力と設定器Sにより設定された制御設定値とを
無効電力調節器RPRに供給し、得られた信号を
前記同期電動機SMの励磁電流制御を行うサイリ
スタSCRのゲート端子に供給して前記同期電動
機SMを運転し、受電変圧器RTの2次側配電系
における受電点力率を常に1に近づけるように制
御して力率の改善も行うように構成したものであ
る。
Conventionally, a reactive power control device as shown in FIG. 1 has been proposed and implemented for the purpose of improving the power factor at the power receiving end. That is, Fig. 1 shows a control system in which a synchronous motor SM is connected in parallel with a load L to the secondary side of the power receiving transformer RT, and the field current of this synchronous motor SM is controlled to improve the power receiving ratio. , a received reactive power detector RPD 1 formed by connecting a voltage transformer PT 1 and a current transformer CT 1 is provided in the primary power transmission system of the receiving transformer RT, and this received reactive power detector RPD 1 is provided.
A setting device S is provided to determine the control setting value based on the detected value of RPD 1 , and on the other hand, the reactive power output of the synchronous machine SM using the excitation control method using the thyristor SCR in the secondary power distribution system of the power receiving transformer RT is detected. A reactive power detector RPD 2 of the synchronous motor SM is provided by connecting a voltage transformer PT 2 and a current transformer CT 2 to
The reactive power output detected by the reactive power detector RPD 2 and the control setting value set by the setting device S are supplied to the reactive power regulator RPR, and the obtained signal is used to control the excitation current of the synchronous motor SM. The power is supplied to the gate terminal of the thyristor SCR to operate the synchronous motor SM, and the power factor is controlled so that the power factor at the receiving point in the secondary power distribution system of the receiving transformer RT is always close to 1, thereby improving the power factor. It is composed of

しかしながら、このような構成からなる無効電
力制御装置において、例えば製鉄所の圧延設備な
どを接続した短時間に負荷変動の激しい系統に応
用した場合、設定器Sが頻繁に動作して設定器の
機械的寿命を短縮するばかりでなく、無効電力制
御系の応答遅れにより頻繁な無効電力変動に制御
動作が追従できず、ハンチング現象を生じる欠点
があつた。
However, when a reactive power control device with such a configuration is applied to a system where the load fluctuates rapidly over a short period of time, such as connecting rolling equipment at a steel mill, the setter S operates frequently and the machine of the setter is This not only shortens the life of the reactive power control system, but also causes the control operation to be unable to follow frequent fluctuations in reactive power due to the delayed response of the reactive power control system, resulting in a hunting phenomenon.

本発明の目的は、負荷変動の激しい系統におい
てハンチングや機器の損傷等を全く生ずることな
く安定した制御を達成できる受電無効電力制御装
置を提供するにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide a received reactive power control device that can achieve stable control without causing any hunting or equipment damage in a system with severe load fluctuations.

前記の目的を達成するため、本発明において
は、配電系に接続された同期機の無効電力を制御
することにより、受電点力率を高く保つようにし
た受電無効電力制御装置において、 受電点の無効電力を検出する第1の無効電力検
出器と、同期機の無効電力を検出する第2の無効
電力検出器と、第1の無効電力検出器の検出値を
積分する積分回路と、該積分回路の積分値および
第2の無効電力検出器の検出値をそれぞれ所定周
期にて繰り返しサンプルホールドする第1および
第2のサンプルホールド回路と、両サンプルホー
ルド回路における所定周期のサンプル動作のタイ
ミングを指定するパルスと共にサンプル動作完了
後に行うべき前記積分回路のリセツトのタイミン
グを指定するパルスを発生する制御手段と、両サ
ンプルホールド回路の出力値の和を求める加算手
段と、この加算手段の出力値を設定値としてこれ
に第2の無効電力検出器の検出値が一致するよう
に同期機の励磁制御を行う無効電力調節器とを備
えていることを特徴とする。
In order to achieve the above object, the present invention provides a receiving reactive power control device that maintains a high receiving point power factor by controlling the reactive power of a synchronous machine connected to a power distribution system. a first reactive power detector for detecting reactive power; a second reactive power detector for detecting reactive power of a synchronous machine; an integrating circuit for integrating a detection value of the first reactive power detector; Specify the first and second sample-hold circuits that repeatedly sample and hold the integrated value of the circuit and the detected value of the second reactive power detector at a predetermined cycle, and the timing of the sample operation at a predetermined cycle in both sample-hold circuits. control means for generating a pulse that specifies the timing for resetting the integrating circuit to be performed after the completion of the sampling operation together with a pulse for resetting the sample, an adding means for calculating the sum of the output values of both sample and hold circuits, and setting an output value of the adding means. The present invention is characterized in that it is equipped with a reactive power regulator that performs excitation control of the synchronous machine so that the detected value of the second reactive power detector matches this value.

次に、本発明に係る受電無効電力制御装置につ
き、制御対象として同期電動機を例示して以下添
付図面を参照しながら詳細に説明する。
Next, the received reactive power control device according to the present invention will be described in detail with reference to the accompanying drawings, using a synchronous motor as an example to be controlled.

第2図において、参照符号10は受電変圧器を
示し、この受電変圧器10の1次側送電系には電
圧変成器12および電流変成器14を介して受電
無効電力検出器16が接続されている。また、受
電変圧器10の2次側電系には、同期電動機18
およびその他の負荷20が接続されると共に同期
電動機18の出力導線には電圧変成器22および
電流変成器24を介して同期電動機出力の無効電
力検出器26が接続されている。さらに、前記同
期電動機18の励磁電源系には、励磁電流制御用
サイリスタ28を介して励磁コイルル30が接続
されている。
In FIG. 2, reference numeral 10 indicates a receiving transformer, and a receiving reactive power detector 16 is connected to the primary power transmission system of the receiving transformer 10 via a voltage transformer 12 and a current transformer 14. There is. In addition, a synchronous motor 18 is included in the secondary electrical system of the power receiving transformer 10.
and other loads 20 are connected, and a reactive power detector 26 for the output of the synchronous motor is connected to the output conductor of the synchronous motor 18 via a voltage transformer 22 and a current transformer 24. Further, an excitation coil 30 is connected to the excitation power supply system of the synchronous motor 18 via an excitation current control thyristor 28 .

本発明においては、前記受電無効電力検出器1
6と無効電力検出器26との検出値に基づいて受
電点の力率を改善するために、設定値演算器32
を設けて所定時間間隔で受電無効電力を積分して
この積分値をサンプルホールドしながら制御設定
値を算出し、この設定値に基づいて同期電動機の
無効電力フイードバツク制御を行うよう構成した
ことを特徴とするものである。
In the present invention, the received reactive power detector 1
6 and the reactive power detector 26 to improve the power factor at the power receiving point.
is provided to integrate the received reactive power at predetermined time intervals, calculate a control set value while sampling and holding this integrated value, and perform reactive power feedback control of the synchronous motor based on this set value. That is.

すなわち、前記設定値演算器32は、第3図に
示すように、受電無効電力検出器16の出力を入
力してこれを積分する積分回路34と、この積分
回路34の出力を入力してこれを記憶するサンプ
ルホールド回路36と、無効電力検出器26の出
力をフイルタ38を介して入力してこれを記憶す
るサンプルホールド回路40と、前記両サンプル
ホールド回路36,40の記憶内容に基づいて制
御設定値を形成する加算遅れ回路42と、さらに
前記各回路34,36,40,42の操作を指令
する論理回路44とから構成されている。
That is, as shown in FIG. 3, the set value calculator 32 includes an integrating circuit 34 that inputs the output of the received reactive power detector 16 and integrates it, and an integral circuit 34 that inputs the output of this integrating circuit 34 and integrates the output. a sample-and-hold circuit 36 that stores the output of the reactive power detector 26, a sample-and-hold circuit 40 that inputs the output of the reactive power detector 26 via the filter 38 and stores it, and controls based on the stored contents of both the sample-and-hold circuits 36 and 40. It is comprised of an addition delay circuit 42 that forms a set value, and a logic circuit 44 that instructs the operation of each of the circuits 34, 36, 40, and 42.

なお、論理回路44は、AND素子AD1,AD2
と、単安定素子MS1,MS2と、NOR素子NR1〜5
と、限時素子TD1,TD2から構成し、前記限時素
子TD1,TD2によつて受電無効電力検出器14で
検出された無効電力を積分する時間t1と前記積分
値をサンプルホールドしかつこのサンプルホール
ドされた積分値より無効電力フイードバツク制御
系へ供給する制御設定値を演算する時間t2とを
夫々設定し、さらに前記各時間間隔でAND素子、
NOR素子、単安定素子等を作動して論理パルス
を発生し、前記積分回路34、サンプルホールド
回路36,40の動作を指令するよう構成する。
このようにして、加算遅れ回路42で算出された
制御設定値は、同期電動機出力の無効電力検出値
と共に無効電力調節器46に供給して負荷の力率
を常に1に近く保ち得る信号を発生し、さらにこ
の信号を前記同期電動機18の励磁電源系に接続
したサイリスタ28のゲート端子に供給して励磁
電流の加減調整を行い負荷の力率改善を達成する
ことができる。
Note that the logic circuit 44 includes AND elements AD 1 and AD 2
, monostable elements MS 1 , MS 2 , and NOR elements NR 1 to 5
and time-limiting elements TD 1 and TD 2 , which sample and hold the time t 1 for integrating the reactive power detected by the received reactive power detector 14 and the integral value. and a time t2 for calculating a control setting value to be supplied to the reactive power feedback control system from this sampled and held integral value, and furthermore, at each time interval, an AND element,
It is configured to operate a NOR element, a monostable element, etc. to generate a logic pulse, and instruct the operation of the integration circuit 34 and sample-and-hold circuits 36 and 40.
In this way, the control setting value calculated by the addition delay circuit 42 is supplied to the reactive power regulator 46 together with the reactive power detection value of the synchronous motor output to generate a signal that can keep the power factor of the load close to 1 at all times. Furthermore, by supplying this signal to the gate terminal of the thyristor 28 connected to the excitation power supply system of the synchronous motor 18, the excitation current can be adjusted to improve the power factor of the load.

次に、上述した構成からなる本発明の制御装置
につき、その要部である設定値演算器32の作用
を第4図に示すタイムチヤート図を参照しながら
以下説明する。
Next, with respect to the control device of the present invention having the above-described configuration, the operation of the set value calculator 32, which is a main part thereof, will be explained below with reference to the time chart shown in FIG.

まず、制御操作を開始するに際し、論理回路4
4の入力端pに論理信号“1”を供給する〔第4
図1〕。この論理信号“1”の入力により、AND
素子AD1が動作して論理信号“1”を出力し〔第
4図2〕、この出力信号はNOR素子NR1,NR4
よび単安定素子MS1に夫々入力され、NOR素子
NR2およびAND素子AD2が夫々論理信号“1”
を出力して限時素子TD2を所定時間t2付勢すると
共に単安定素子MS1が動作する。この結果、単安
定素子MS1は論理パルス“1”を出力し、これに
よりサンプルホールド回路36,40を動作状態
にする〔第4図3〕。次いで、単安定素子MS1
論理パルス“0”を出力するとNOR素子NR5
論理信号“1”を出力して単安定素子MS2を動作
させる〔第4図4〕。この結果、単安定素子MS2
が論理パルス“1”を出力することにより、積分
回路34がリセツトされる〔第4図6〕。
First, when starting a control operation, the logic circuit 4
A logic signal “1” is supplied to the input terminal p of the fourth
Figure 1]. By inputting this logic signal “1”, AND
The element AD 1 operates and outputs a logic signal "1" [Fig. 4 2], and this output signal is input to the NOR elements NR 1 and NR 4 and the monostable element MS 1 , respectively.
NR 2 and AND element AD 2 each have a logic signal “1”
is output to energize the time limit element TD 2 for a predetermined time t 2 and at the same time, the monostable element MS 1 operates. As a result, the monostable element MS 1 outputs a logic pulse "1", thereby activating the sample and hold circuits 36 and 40 (FIG. 4, 3). Next, when the monostable element MS 1 outputs a logic pulse "0", the NOR element NR 5 outputs a logic signal "1" to operate the monostable element MS 2 (FIG. 4). As a result, the monostable element MS 2
The integrating circuit 34 is reset by outputting a logic pulse "1" (FIG. 4, 6).

その後、所定時間t2経過すると、NOR素子
NR3の出力信号“0”によりAND素子AD1が不
動作となり論理信号“0”を出力し〔第4図2〕、
この出力信号は前述と同様にNOR素子NR1
NR4および単安定素子MS1に夫々入力され、
NOR素子NR1、NR4が夫々論理信号“1”を出
力して限時素子TD1を所定時間t1付勢すると共に
積分回路34を動作状態にする。なお、この場合
単安定素子MS1は不動作となる。このようにし
て、積分回路34が所定時間t1動作状態にあると
き、受電無効電力検出器26の検出値ΔQ〔第4
図5〕が積分回路34に入力されて積分が行われ
る〔第4図6〕。
Then, after a predetermined time t 2 has elapsed, the NOR element
Due to the output signal "0" of NR3 , the AND element AD1 becomes inactive and outputs a logic signal "0" [Fig. 4 2],
This output signal is generated by the NOR element NR 1 ,
input into NR 4 and monostable element MS 1 , respectively,
The NOR elements NR 1 and NR 4 each output a logic signal "1" to energize the time limit element TD 1 for a predetermined time t 1 and to put the integrating circuit 34 into operation. Note that in this case, the monostable element MS 1 becomes inactive. In this way, when the integrating circuit 34 is in the operating state for the predetermined time t1 , the detected value ΔQ of the received reactive power detector 26 [the fourth
FIG. 5] is input to the integrating circuit 34 and integrated [FIG. 4, 6].

積分回路34の積分が所定時間t1行われると、
再び限時素子TD2が所定時間付勢され、この間に
サンンプルホールド回路36,40が動作し、サ
ンプルホールド回路36では積分回路34で得ら
れた受電無効電力検出値ΔQの積分値1/t1∫ΔQdt
をサンプルホールドし、またサンプルホールド回
路40では同期電動機18の無効電力検出値Qを
サンプルホールドする。次いで、前記サンプルホ
ールド回路36,40に夫夫サンプルホールドさ
れた積分値1/t1∫ΔQおよび検出値Qが加算遅れ
回路42に入力されて制御設定値Q+1/t1∫ΔQ
が演算される〔第4図7〕。
When the integration of the integration circuit 34 is performed for a predetermined time t1 ,
The time-limiting element TD 2 is activated again for a predetermined time, and during this time the sample and hold circuits 36 and 40 operate, and the sample and hold circuit 36 calculates the integral value 1/t 1 of the received reactive power detection value ΔQ obtained by the integration circuit 34. ∫ΔQ dt
The sample and hold circuit 40 samples and holds the reactive power detection value Q of the synchronous motor 18. Next, the integral value 1/t 1 ∫ΔQ sampled and held in the sample and hold circuits 36 and 40 and the detected value Q are input to the addition delay circuit 42 to obtain the control set value Q+1/t 1 ∫ΔQ.
is calculated [Fig. 4, 7].

上述したことから明らかなように、受電無効電
力が激しい負荷変動により著しく変化する場合に
おいても、それらを所定時間間隔で周期的に積分
してサンプルホールドし、このサンプルホールド
した積分値に基づいて制御設定値を算出するもの
であるから、制御系の応答遅れ等に関係なく、安
定した制御が達成できる。なお、前記の実施例に
おいて、論理回路44を構成する限時素子TD1
TD2の各整定時間t1,t2は、積分回路34の動作
時間t1をサンプルホールド回路36,40の動作
時間t2より長く設定することが好ましい。
As is clear from the above, even when the received reactive power changes significantly due to severe load fluctuations, it can be periodically integrated and sampled and held at predetermined time intervals, and control is performed based on the sampled and held integrated values. Since the set value is calculated, stable control can be achieved regardless of response delays of the control system. In addition, in the above embodiment, the time-limiting elements TD 1 , which constitute the logic circuit 44
Regarding the settling times t 1 and t 2 of TD 2 , it is preferable to set the operating time t 1 of the integrating circuit 34 to be longer than the operating time t 2 of the sample and hold circuits 36 and 40.

従つて、本発明に係る受電無効電力制御装置
は、積分回路において所定の時間間隔t1,t2をも
つた周期で受電無効電力の検出値ΔQo(nは周期
を表わす)を積分して積分値(1/t1∫ΔQo)を
求め、次いで、積分演算回路において、前記積分
値と同期電動機の無効電力出力とにより制御設定
値Qo=Qo-1+1/t1∫ΔQoを求めるものであるか
ら、同期電動機は受電無効電力の検出値に基づく
積分操作が行われている間一周期前の制御設定値
に基づいて負荷の力率を改善する励磁制御が負荷
変動に影響されることなく円滑に行われることに
なる。
Therefore, the received reactive power control device according to the present invention integrates the detected value ΔQ o (n represents the period) of the received reactive power at a period with a predetermined time interval t 1 , t 2 in the integrating circuit. The integral value (1/t 1 ∫ΔQ o ) is determined, and then, in the integral calculation circuit, the control set value Q o =Q o-1 +1/t 1 ∫ΔQ o is determined based on the integral value and the reactive power output of the synchronous motor. Therefore, in a synchronous motor, while the integral operation based on the detected value of the received reactive power is performed, the excitation control that improves the load power factor based on the control setting value one cycle before affects the load fluctuation. This means that the process will be carried out smoothly without any problems.

以上、本発明の好適な実施例について説明した
が、本発明の精神を逸脱しない範囲内において
種々の設計変更をなし得ることは勿論である。
Although the preferred embodiments of the present invention have been described above, it goes without saying that various design changes can be made without departing from the spirit of the present invention.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の受電無効電力制御装置の系統
図、第2図は本発明に係る受電無効電力制御装置
の基本構成を示す系統図、第3図は本発明装置の
要部構成を示すブロツク結線図、第4図1〜7は
第3図に示す回路の各構成要素の動作を示し、1
は受電無効電力制御指令信号、2は論理回路の
AND素子AD1の出力、3は論理回路の単安定素
子MS1の出力、4は論理回路の単安定素子MS2
出力、5は受電無効電力検出器26の検出値、6
は積分回路34の出力および7は積分演算回路4
2の出力の夫々波形図である。 10……受電変圧器、12……電圧変成器、1
4……電流変成器、16……受電無効電力検出
器、18……同期電動機、20……負荷、22…
…電圧編成器、24……電流変成器、26………
無効電力検出器、28……サイリスタ、30……
励磁コイル、32……設定値演算器、34……積
分回路、36……サンプルホールド回路、38…
…フイルタ、40……サンプルホールド回路、4
2……加算遅れ回路、44……論理回路、46…
…無効電力調節器。
FIG. 1 is a system diagram of a conventional received reactive power control device, FIG. 2 is a system diagram showing the basic configuration of a received reactive power control device according to the present invention, and FIG. 3 is a block diagram showing the main configuration of the device of the present invention. The wiring diagram, Figures 4 1 to 7, shows the operation of each component of the circuit shown in Figure 3.
is the received reactive power control command signal, and 2 is the logic circuit's control command signal.
The output of AND element AD 1 , 3 is the output of monostable element MS 1 of the logic circuit, 4 is the output of monostable element MS 2 of the logic circuit, 5 is the detected value of the received reactive power detector 26, 6
is the output of the integration circuit 34 and 7 is the output of the integration calculation circuit 4
FIG. 2 is a waveform diagram of each output of FIG. 10...Power receiving transformer, 12...Voltage transformer, 1
4...Current transformer, 16...Receiving reactive power detector, 18...Synchronous motor, 20...Load, 22...
...Voltage organizer, 24...Current transformer, 26......
Reactive power detector, 28...thyristor, 30...
Excitation coil, 32...Set value calculator, 34...Integrator circuit, 36...Sample hold circuit, 38...
...Filter, 40...Sample hold circuit, 4
2... Addition delay circuit, 44... Logic circuit, 46...
…Reactive power regulator.

Claims (1)

【特許請求の範囲】 1 配電系に接続された同期機の無効電力を制御
することにより、受電点力率を高く保つようにし
た受電無効電力制御装置において、 受電点の無効電力を検出する第1の無効電力検
出器と、同期機の無効電力を検出する第2の無効
電力検出器と、第1の無効電力検出器の検出値を
積分する積分回路と、該積分回路の積分値および
第2の無効電力検出器の検出値をそれぞれ所定周
期にて繰り返しサンプルホールドする第1および
第2のサンプルホールド回路と、両サンプルホー
ルド回路における所定周期のサンプル動作のタイ
ミングを指定するパルスと共にサンプル動作完了
後に行うべき前記積分回路のリセツトのタイミン
グを指定するパルスを発生する制御手段と、両サ
ンプルホールド回路の出力値の和を求める加算手
段と、この加算手段の出力値を設定値としてこれ
に第2の無効電力検出器の検出値が一致するよう
に同期機の励磁制御を行う無効電力調節器とを備
えていることを特徴とする受電無効電力制御装
置。
[Scope of Claims] 1. In a receiving reactive power control device that maintains a high power factor at a receiving point by controlling the reactive power of a synchronous machine connected to a power distribution system, there is provided a first step for detecting reactive power at a receiving point. a first reactive power detector, a second reactive power detector that detects the reactive power of the synchronous machine, an integrating circuit that integrates the detected value of the first reactive power detector, and a second reactive power detector that detects the reactive power of the synchronous machine; The sample operation is completed with the first and second sample hold circuits that repeatedly sample and hold the detected values of the two reactive power detectors at a predetermined cycle, and a pulse that specifies the timing of the sample operation at a predetermined cycle in both sample hold circuits. A control means for generating a pulse that specifies the timing of resetting the integrating circuit to be performed later; an addition means for calculating the sum of the output values of both sample and hold circuits; A receiving reactive power control device comprising: a reactive power regulator that performs excitation control of a synchronous machine so that the detection values of the reactive power detectors match.
JP2513579A 1979-03-06 1979-03-06 Received reactive power controller Granted JPS55120339A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2513579A JPS55120339A (en) 1979-03-06 1979-03-06 Received reactive power controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2513579A JPS55120339A (en) 1979-03-06 1979-03-06 Received reactive power controller

Publications (2)

Publication Number Publication Date
JPS55120339A JPS55120339A (en) 1980-09-16
JPS6327936B2 true JPS6327936B2 (en) 1988-06-06

Family

ID=12157515

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2513579A Granted JPS55120339A (en) 1979-03-06 1979-03-06 Received reactive power controller

Country Status (1)

Country Link
JP (1) JPS55120339A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03106842U (en) * 1990-02-16 1991-11-05

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5429037A (en) * 1977-08-08 1979-03-03 Nissin Electric Co Ltd Device for predicting reactive power

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5429037A (en) * 1977-08-08 1979-03-03 Nissin Electric Co Ltd Device for predicting reactive power

Also Published As

Publication number Publication date
JPS55120339A (en) 1980-09-16

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