JPS6327926B2 - - Google Patents

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Publication number
JPS6327926B2
JPS6327926B2 JP10920682A JP10920682A JPS6327926B2 JP S6327926 B2 JPS6327926 B2 JP S6327926B2 JP 10920682 A JP10920682 A JP 10920682A JP 10920682 A JP10920682 A JP 10920682A JP S6327926 B2 JPS6327926 B2 JP S6327926B2
Authority
JP
Japan
Prior art keywords
output
circuit
harmonic
detection element
time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP10920682A
Other languages
Japanese (ja)
Other versions
JPS58224518A (en
Inventor
Masaji Usui
Akyoshi Pponma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP10920682A priority Critical patent/JPS58224518A/en
Priority to AU15318/83A priority patent/AU560683B2/en
Priority to CA000429635A priority patent/CA1195392A/en
Priority to US06/501,085 priority patent/US4477854A/en
Priority to DE8383105846T priority patent/DE3374742D1/en
Priority to EP83105846A priority patent/EP0097321B1/en
Publication of JPS58224518A publication Critical patent/JPS58224518A/en
Publication of JPS6327926B2 publication Critical patent/JPS6327926B2/ja
Granted legal-status Critical Current

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  • Protection Of Transformers (AREA)

Description

【発明の詳細な説明】 本発明は電力系統を保護する保護継電器に係
り、特に電力系統の重要機器である変圧器を保護
する第2高調波抑制付保護継電器に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a protective relay that protects a power system, and more particularly to a protective relay with second harmonic suppression that protects a transformer, which is an important device in a power system.

従来この種の継電器として第1図に示すものが
あつた。この第1図において1は抑制入力端子、
2は差動入力端子、3は抑制回路、4は差動回
路、5は第1の比較回路、6は抑制回路3、差動
回路4及び第1の比較回路5よりなる比率要素、
7は基本波分導出回路、8は第2高調波分導出回
路、9は第2の比較回路、10は基本波分導出回
路7、第2高調波分導出回路8及び第2の比較回
路9よりなる第2高調波検出要素、11は比率要
素6の出力を第2高調波検出要素10の出力が送
出されない時のみ動作して出力する第1論理積回
路、12は出力端子である。
A conventional relay of this type is shown in FIG. In this FIG. 1, 1 is an inhibition input terminal;
2 is a differential input terminal, 3 is a suppression circuit, 4 is a differential circuit, 5 is a first comparison circuit, 6 is a ratio element consisting of the suppression circuit 3, the differential circuit 4, and the first comparison circuit 5;
7 is a fundamental wave component deriving circuit, 8 is a second harmonic component deriving circuit, 9 is a second comparison circuit, 10 is a fundamental wave component deriving circuit 7, a second harmonic component deriving circuit 8, and a second comparison circuit 9. 11 is a first AND circuit that operates and outputs the output of the ratio element 6 only when the output of the second harmonic detection element 10 is not sent out; 12 is an output terminal;

尚第1図の記号I1は差動入力、aは比率要素6
の出力、I2は差動入力の基本波分、I3は差動入力
の第2高調波分、bは第2高調波検出要素の出
力、cは最終出力を示し、これらの波形動作を第
2図、第3図で表し、交流量として点線で示し整
流平滑量を実線で示している。
Note that the symbol I 1 in Figure 1 is the differential input, and a is the ratio element 6.
, I 2 is the fundamental wave of the differential input, I 3 is the second harmonic of the differential input, b is the output of the second harmonic detection element, and c is the final output. It is shown in FIGS. 2 and 3, with the dotted line representing the alternating current amount and the solid line representing the rectification and smoothing amount.

次に動作について第2図、第3図を用いて説明
する。
Next, the operation will be explained using FIGS. 2 and 3.

第2図は変圧器のインラツシユ電流が差動入力
として流れた場合の動作波形図である。変圧器の
インラツシユ電流は変圧器の無負荷投入時に発生
する電流で故障電流ではなく、保護継電器として
動作してはならない電流である。一般にインラツ
シユ電流中には第2高調波分が多く含まれ、この
含有量を検出することにより出力抑制する方式が
一般的で、第1図に示される装置もこの出力抑制
方式を使用している。第2図に示すように比率要
素6の出力aは差動量が一定値以上あれば動作
し、第2高調波検出要素10の出力bは第2高調
波分I3と基本波分I2との比が大きいので動作して
いる。従つて第1論理積回路11の出力cは出力
bが送出しなければ点線で示すように立ち上がる
が、第1論理積回路11の出力条件が出力bによ
り成立しないために出力が表われない。
FIG. 2 is an operating waveform diagram when the inrush current of the transformer flows as a differential input. The inrush current of a transformer is the current that occurs when the transformer is turned on with no load, and is not a fault current, but a current that must not operate as a protective relay. Generally, the in-rush current contains a large amount of second harmonics, and a method of suppressing the output by detecting this content is common, and the device shown in Figure 1 also uses this output suppression method. . As shown in FIG. 2, the output a of the ratio element 6 is activated if the differential amount is above a certain value, and the output b of the second harmonic detection element 10 is the second harmonic component I3 and the fundamental wave component I2. It is working because the ratio is large. Therefore, the output c of the first AND circuit 11 will rise as shown by the dotted line if the output b is not sent out, but since the output condition of the first AND circuit 11 is not satisfied by the output b, no output appears.

第3図は、差動電流が発生(内部故障発生)し
た場合の波形動作を示し、時刻t1に基本波電流が
差動電流I1として流れると基本波分I2が発生す
る。この基本波分I2は、一般に基本波分導出回路
7がフイルター回路を使用するため立ち上がりが
遅れ図示のように漸増する。又本来入力は基本波
分I2のみであるため、第2高調波分出力I3は発生
しないが、第2高調波分導出回路8もフイルター
回路を使用しており当該フイルター回路の尖鋭度
は基本波分導出回路7の尖鋭度より高いのが普通
で、入力の変化による過渡現象特性により第3図
示のような山形状のように急増漸減状態を示す。
これにより比率要素6の出力aは差動量が一定値
以上で動作するが、第2高調波検出要素10の出
力bが上述のような第2高調波分出力I3は初期に
一定期間出力を送出するので、第1論理積回路1
1の出力cは立ち上がりが遅れる。これは動作時
間が第2高調波検出要素10により遅延するため
である。
FIG. 3 shows a waveform operation when a differential current is generated (an internal failure occurs). When a fundamental wave current flows as a differential current I 1 at time t 1 , a fundamental wave component I 2 is generated. Since the fundamental wave component I 2 generally uses a filter circuit in the fundamental wave component deriving circuit 7, its rise is delayed and gradually increases as shown in the figure. Also, since the input is only the fundamental wave component I2 , the second harmonic component output I3 is not generated, but the second harmonic component deriving circuit 8 also uses a filter circuit, and the sharpness of the filter circuit is Normally, the sharpness is higher than the sharpness of the fundamental wave component deriving circuit 7, and due to the transient phenomenon characteristics due to changes in input, it shows a rapidly decreasing state like a mountain shape as shown in FIG.
As a result, the output a of the ratio element 6 operates when the differential amount is above a certain value, but the output b of the second harmonic detection element 10 is the second harmonic component output I3 as described above, and the output I 3 is initially output for a certain period of time. Therefore, the first AND circuit 1
1 output c has a delayed rise. This is because the operating time is delayed by the second harmonic detection element 10.

次に第3図の波形動作図で、時間t2において差
動電流が急減少した場合について説明する。時間
t2において比率要素6の動作範囲内で差動電流が
急に減少した場合、動作範囲内での故障点の移動
であるため、本来出力は送出状態を継続するが、
入力の変化による第2高調波分導出回路8の過渡
現象により第2高調波出力分I3が山形状の変化を
しこの第2高調波出力分I3の値が基本波分I2の値
の一定比率より大きければ、第2高調波検出要素
10の出力bが立ち上がり、この出力を受けて第
1論理積回路11の出力cが一時停止する現象が
あつた。上述のような比率要素6の動作範囲内で
の差動電流の移動は、保護継電器の点検電流を印
加しての点検中での系統故障の発生及びその後の
点検電流除去(点検中は保護継電器の動作は遮断
器コイル付勢出力とならないので点検を中止する
必要があり、点検電流を除去する)等に発生し、
点検シーケンスの設定を困難にする等の欠点があ
つた。
Next, a case will be described in which the differential current suddenly decreases at time t2 using the waveform diagram of FIG. 3. time
If the differential current suddenly decreases within the operating range of the ratio element 6 at t 2 , the fault point has moved within the operating range, so the output should continue to be in the sending state, but
Due to the transient phenomenon of the second harmonic component deriving circuit 8 due to a change in the input, the second harmonic output component I3 changes in a mountain shape, and the value of this second harmonic output component I3 becomes the value of the fundamental wave component I2 . If the ratio is larger than a certain ratio, the output b of the second harmonic detection element 10 rises, and in response to this output, the output c of the first AND circuit 11 temporarily stops. The movement of the differential current within the operating range of the ratio element 6 as described above is caused by the occurrence of a system fault during inspection by applying the test current of the protective relay, and the subsequent removal of the test current (by applying the test current of the protective relay). Since the operation does not result in the circuit breaker coil energizing output, it is necessary to stop the inspection and remove the inspection current), etc.
There were drawbacks such as making it difficult to set the inspection sequence.

本発明は上記のような従来のものの欠点を除去
するためになされたもので、比率要素の出力後一
定時間のみ第2高調波検出要素の出力を抑制力と
するとともに、第2高調波検出要素の出力が所定
の時間以上継続して送出している場合にもその出
力を抑制力とし、比率要素の動作範囲内での差動
電流の急変に対しては第1論理積回路出力の断絶
することのない第2高調波抑制付保護継電器を提
供することを目的とする。
The present invention was made in order to eliminate the drawbacks of the conventional ones as described above, and the present invention uses the output of the second harmonic detection element as a suppressing force only for a certain period of time after the output of the ratio element, and also uses the output of the second harmonic detection element as a suppressing force. Even if the output continues to be sent for more than a predetermined time, the output is used as a suppressing force, and the output of the first AND circuit is cut off in response to a sudden change in the differential current within the operating range of the ratio element. It is an object of the present invention to provide a protective relay with second harmonic suppression that does not cause problems.

以下、この発明の一実施例を図について説明す
る。第1図と同一部分は同一符号で示す第4図に
おいて、13は比率要素6が出力を送出した時、
一定時間の出力を継続して送出する単安定マルチ
バイブレータ回路、14は単安定マルチバイブレ
ータ回路13が出力を送出している時のみ第2高
調波検出要素10の出力を送出する第2の論理積
回路、15は第2高調波検出要素10の出力を計
時し、一定時間以上第2高調波検出要素10が出
力を継続させているとき動作する時限回路、16
は第2の論理積回路14の出力と時限回路15の
出力の論理和を得、第1論理積回路11の出力を
抑制動作させる論理和回路、尚第4図における記
号d〜fは各回路各部分の出力波形を表し、これ
らの動作状態を第5図、第6図に示す。第5図は
第3図に対応する入力条件の動作波形の場合、第
6図は変圧器のインラツシユ電流が入力された場
合(第2図に対応する入力条件)を示す。
An embodiment of the present invention will be described below with reference to the drawings. In FIG. 4, parts that are the same as those in FIG.
A monostable multivibrator circuit that continuously sends out an output for a certain period of time, and 14 a second logical product that sends out the output of the second harmonic detection element 10 only when the monostable multivibrator circuit 13 is sending out an output. A circuit 15 is a time limit circuit 16 which measures the output of the second harmonic detection element 10 and operates when the second harmonic detection element 10 continues to output for a certain period of time or more.
is a logical sum circuit that obtains the logical sum of the output of the second logical product circuit 14 and the output of the time limit circuit 15, and operates to suppress the output of the first logical product circuit 11, and symbols d to f in FIG. 4 represent each circuit. The output waveforms of each part are shown, and their operating states are shown in FIGS. 5 and 6. FIG. 5 shows operating waveforms under the input conditions corresponding to FIG. 3, and FIG. 6 shows the case when the inrush current of the transformer is input (input conditions corresponding to FIG. 2).

次に本発明の動作について説明する。第5図に
おいて、波形a、bについては第3図で説明した
動作と同様であるため省略する。時刻t1において
差動電流I1が流れると、比率要素6出力aを送出
し、単安定マルチバイブレータ回路13が動作し
て一定時間出力dを送出する。これにより第2論
理積回路14は第2高調波検出要素10の出力b
を抑制動作する出力eとして送出する。従つて第
1論理積回路11の出力cは第3図で説明したと
同様に時間的な遅れをともなつて出力する。この
場合には時限回路15は第2高調波検出要素10
の出力bが一定時間Tに到達しないので何ら出力
を送出しない。
Next, the operation of the present invention will be explained. In FIG. 5, waveforms a and b are omitted because they are similar to the operations described in FIG. 3. When the differential current I 1 flows at time t 1 , the ratio element 6 outputs a, and the monostable multivibrator circuit 13 operates to output an output d for a certain period of time. As a result, the second AND circuit 14 outputs the output b of the second harmonic detection element 10.
is sent out as an output e that performs a suppressing operation. Therefore, the output c of the first AND circuit 11 is outputted with a time delay as explained in FIG. In this case, the timer circuit 15 is connected to the second harmonic detection element 10.
Since the output b does not reach the fixed time T, no output is sent out.

次に時刻t2において差動電流I1が比率要素6の
動作範囲内で急に減少した場合について説明す
る。比率要素6の出力aは継続し、単安定マルチ
バイブレータ回路13は出力を送出しない。従つ
て第2論理積回路14の出力eが立ち上がらない
ため、第2高調波検出要素10の出力bは第3図
の場合と異なり、第1論理積回路11の出力を抑
制する出力とはなりえない。又この時、時限回路
15が第2高調波検出要素10の出力bを計時す
るが、一定時間Tに到達しないので出力fを送出
しない。
Next, a case where the differential current I 1 suddenly decreases within the operating range of the ratio element 6 at time t 2 will be described. The output a of the ratio element 6 continues and the monostable multivibrator circuit 13 delivers no output. Therefore, since the output e of the second AND circuit 14 does not rise, the output b of the second harmonic detection element 10 does not suppress the output of the first AND circuit 11, unlike in the case of FIG. No. Also, at this time, the timer circuit 15 measures the output b of the second harmonic detection element 10, but since the predetermined time T has not been reached, the output f is not sent out.

従つて、時刻t2において第1論理積回路11の
出力cが復帰することはない。
Therefore, the output c of the first AND circuit 11 does not return at time t2 .

次に第6図の動作波形について説明する。入力
電流I1が変圧器のインラツシユ電流である場合に
は、比率要素6の出力aと第2高調波検出要素1
0の出力bの動作は第2図の説明と同じである。
従つて単安定マルチバイブレータ回路13は一定
幅のパルス出力dを送出する。これにより第2論
理積回路14は第2高調波検出要素10の出力b
と単安定マルチバイブレータ回路13の出力dの
論理積をとつて第1論理積回路11の出力を抑制
する出力eを送出する。この状態であると第1論
理積回路11の出力cは出力eの立ち下がりにと
もない点線のように立ち上がるが、第2高調波検
出要素10の出力bを計時している時限回路15
が一定時間T後に出力fを送出するので、この出
力fにより第1論理積回路11の出力cは立ち上
がることができない。即ち、本発明の一実施例に
おいても、変圧器インラツシユ電流入力時に誤動
作することはない。
Next, the operating waveforms shown in FIG. 6 will be explained. When the input current I1 is the in-rush current of the transformer, the output a of the ratio element 6 and the second harmonic detection element 1
The operation of the output b of 0 is the same as the explanation in FIG.
Therefore, the monostable multivibrator circuit 13 sends out a pulse output d with a constant width. As a result, the second AND circuit 14 outputs the output b of the second harmonic detection element 10.
and the output d of the monostable multivibrator circuit 13 and outputs an output e that suppresses the output of the first AND circuit 11. In this state, the output c of the first AND circuit 11 rises as shown by the dotted line as the output e falls, but the time limit circuit 15 which is timing the output b of the second harmonic detection element 10
outputs f after a certain period of time T, so the output c of the first AND circuit 11 cannot rise due to this output f. That is, even in one embodiment of the present invention, malfunction does not occur when the transformer inrush current is input.

上記時限回路15の計時時間Tは、差動入力の
急激な減少時の第2高調波検出要素10の出力時
間(第2高調波検出要素10の回路定数及び入力
の急変量により定まる。)より長くかつ単安定マ
ルチバイブレータ回路13の出力パルス幅より短
かく設定する必要があり、又単安定マルチバイブ
レータ回路13の出力パルス幅は差動入力の急激
な減少時の第2高調波検出要素10の出力時間よ
り長い時間であれば任意に設定可能である。
The time T measured by the time limit circuit 15 is determined from the output time of the second harmonic detection element 10 when the differential input suddenly decreases (determined by the circuit constant of the second harmonic detection element 10 and the sudden amount of input). The output pulse width of the monostable multivibrator circuit 13 must be set to be long and shorter than the output pulse width of the monostable multivibrator circuit 13, and the output pulse width of the monostable multivibrator circuit 13 must be set to be longer than the output pulse width of the second harmonic detection element 10 when the differential input suddenly decreases. Any time can be set as long as it is longer than the output time.

尚上記実施例では第2高調波検出要素として基
本波分導出回路と第2高調波分導出回路を示した
が第2高調波検出要素の方式を限定するものでな
くまた第2高調波付比率差動継電器について説明
したが、いわゆる第2高調波検出継電器(第2高
調波分を検出して他の継電器をロツクするために
使用する継電器)等に実施しても同様の効果を奏
する。
In the above embodiment, a fundamental wave component derivation circuit and a second harmonic component derivation circuit are shown as the second harmonic detection element, but this does not limit the method of the second harmonic detection element, and the second harmonic addition ratio may also be changed. Although the differential relay has been described, the same effect can be achieved even if the present invention is applied to a so-called second harmonic detection relay (a relay used to detect the second harmonic component and lock other relays).

以上記載のように、本発明によれば差動量の増
加時のみ、第2高調波検出要素の出力を有効とす
るよう構成するとともに、第2高調波検出要素の
出力を計時後有効とするように構成したので、保
護継電器の安定性が増加し、信頼度の高い保護継
電器が得られる効果がある。
As described above, according to the present invention, the output of the second harmonic detection element is made valid only when the differential amount increases, and the output of the second harmonic detection element is made valid after timing. With this configuration, the stability of the protective relay is increased and a highly reliable protective relay can be obtained.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の保護継電器のブロツク図、第2
図、第3図は従来の保護継電器の動作状況を示す
波形図、第4図は本発明の一実施例を示す保護継
電器のブロツク図、第5図、第6図は本発明の一
実施例の動作状況を示す波形図である。 1…抑制入力端子、2…差動入力端子、3…抑
制回路、4…差動回路、5…第1比較回路、6…
比率要素、7…基本波分導出回路、8…第2高調
波分導出回路、9…第2比較回路、10…第2高
調波検出要素、11…第1論理積回路、13…単
安定マルチバイブレータ回路、14…第2論理積
回路、15…時限回路、16…論理和回路。な
お、図中同一符号は同一又は相当部分を示す。
Figure 1 is a block diagram of a conventional protective relay, Figure 2 is a block diagram of a conventional protective relay.
Fig. 3 is a waveform diagram showing the operating status of a conventional protective relay, Fig. 4 is a block diagram of a protective relay showing an embodiment of the present invention, and Figs. 5 and 6 are an embodiment of the present invention. FIG. DESCRIPTION OF SYMBOLS 1... Suppression input terminal, 2... Differential input terminal, 3... Suppression circuit, 4... Differential circuit, 5... First comparison circuit, 6...
Ratio element, 7... Fundamental wave component deriving circuit, 8... Second harmonic component deriving circuit, 9... Second comparison circuit, 10... Second harmonic detection element, 11... First AND circuit, 13... Monostable multi vibrator circuit, 14...second AND circuit, 15...time limit circuit, 16...OR circuit. Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims (1)

【特許請求の範囲】[Claims] 1 差動電流量と抑制電流量を比較する比率要素
を有し、該差動電流中の第2高調波含有率を検出
する第2高調波検出要素からなる第2高調波抑制
付保護継電器において、上記比率要素が出力を送
出したときに一定時間出力を送出する単安定マル
チバイブレータ回路と、上記単安定マルチバイブ
レータ回路の出力と上記第2高調波検出要素の出
力を受ける第2論理積回路と、上記第2高調波検
出要素の出力を計時する時限回路と、上記時限回
路の出力と第2論理積回路の出力を受けその論理
和を第2高調波抑制出力として、上記比率要素出
力と論理積を形成する第1論理積回路に出力する
論理和回路とを備えたことを特徴とする第2高調
波抑制付保護継電器。
1. In a protective relay with second harmonic suppression, which has a ratio element that compares the differential current amount and the suppressed current amount, and includes a second harmonic detection element that detects the second harmonic content rate in the differential current. , a monostable multivibrator circuit that sends out an output for a certain period of time when the ratio element sends out an output, and a second AND circuit that receives the output of the monostable multivibrator circuit and the output of the second harmonic detection element. , a timer circuit for timing the output of the second harmonic detection element, and a logic circuit that receives the output of the timer circuit and the output of the second AND circuit, and uses the logical sum thereof as a second harmonic suppression output, and the output of the ratio element. 1. A protective relay with second harmonic suppression, comprising: an OR circuit that outputs an output to a first AND circuit that forms a product.
JP10920682A 1982-06-23 1982-06-23 Protecting relay with second harmonic wave suppressor Granted JPS58224518A (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP10920682A JPS58224518A (en) 1982-06-23 1982-06-23 Protecting relay with second harmonic wave suppressor
AU15318/83A AU560683B2 (en) 1982-06-23 1983-06-02 Protective relay with second harmonic suppression
CA000429635A CA1195392A (en) 1982-06-23 1983-06-03 Protective relay with second harmonic suppression
US06/501,085 US4477854A (en) 1982-06-23 1983-06-06 Portective relay with second harmonic suppression
DE8383105846T DE3374742D1 (en) 1982-06-23 1983-06-15 Protective relay with second harmonic suppression
EP83105846A EP0097321B1 (en) 1982-06-23 1983-06-15 Protective relay with second harmonic suppression

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10920682A JPS58224518A (en) 1982-06-23 1982-06-23 Protecting relay with second harmonic wave suppressor

Publications (2)

Publication Number Publication Date
JPS58224518A JPS58224518A (en) 1983-12-26
JPS6327926B2 true JPS6327926B2 (en) 1988-06-06

Family

ID=14504284

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10920682A Granted JPS58224518A (en) 1982-06-23 1982-06-23 Protecting relay with second harmonic wave suppressor

Country Status (1)

Country Link
JP (1) JPS58224518A (en)

Also Published As

Publication number Publication date
JPS58224518A (en) 1983-12-26

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