JPS63278324A - Ion implantation forming method for p-type conductive region - Google Patents

Abstract

PURPOSE:To enable forming the high quality p-type conductive region with little radiation damage and to make a small-sized low acceleration voltage device serve as an ion implantation device required for this formation, by performing implantation of group VII halogen ion species at least either before or after performing implantation of p-type impurity ion species. CONSTITUTION:When implantation of group VII halogen ion species is performed into a p-type impurity ion implanted into a substrate, group V elements are substituted for these group VII elements, so that the quantity of group V atoms is apparently increased and an increase in the quantity of group III atoms, due to the implantation of the p-type impurities, is cancelled to keep a stoichiometric composition ratio 1:1. Since ion implantation in the use of the halogen ion species small in atomic weight is small in its radiation damage compared with that in the use of the group V elements very large in atomic weight, the forming of a high quality p-type conductive region 20 with a high activity factor is enabled. Accordingly p-type impurity redistribution, due to heat treatment after the ion implantation of the p-type impurities, can be suppressed and also the high quality p-type conductive region can be formed high in its electrical activity factor of the p-type impurities.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention provides a method for forming a p-type conductive region by ion implantation, which is advantageous when manufacturing electronic devices or optical devices using ■-■ group compound semiconductor materials. Regarding.

[Conventional technology]

Typical methods for forming a p-type conductive region on the surface of a semiconductor substrate (wafer) by introducing impurities include an impurity diffusion method and an ion implantation method. in general.

The latter method using ion implantation is considered to be suitable as a method for forming a p-type conductive region because it provides better controllability of impurity distribution than the former impurity diffusion method.

However, even with ion implantation, which is said to have good controllability of impurity distribution, redistribution of impurity distribution occurs due to heat treatment to electrically activate implanted impurities.
As a result, controllability of impurity distribution is lost. This example will be explained using drawings.

FIG. 8 shows the depth distribution of Be impurities when Be ions, which are p-type impurity species, are implanted into a GaAs single crystal (semi-insulating GaAs substrate) at an energy of 50 kV. The broken line in the figure shows the distribution of Be immediately after implantation without any heat treatment, and the solid line shows the distribution of Be after implantation and heat treatment at 850°C to electrically activate Be. shows the distribution of

From the deviation between the broken line and the solid line in this figure, it can be seen that the distribution of Be is clearly different immediately after the implantation and after the heat treatment after the implantation.

Furthermore, FIG. 9 shows the depth distribution of Be impurities when the same <Be ions as in FIG. 8 were implanted into the MIl, 3Ga6,7As single crystal at an energy of 50 kV. In this figure as well, the broken line showing the distribution immediately after implantation without heat treatment and the solid line showing the distribution after heat treatment at 850°C after implantation are clearly different.
The redistribution of can be recognized.

Such redistribution of p-type impurities due to heat treatment is caused by the above-mentioned G
Not limited to the examples of aAs, AQo, , Ga, , As, but also In
This occurs in all m-v group compound semiconductors such as P, In, GaxAs, and GaP. Depth redistribution of p-type impurities is a major obstacle when using ion implantation to fabricate electronic or optical devices. For example, when it comes to electronic devices.

For example, it becomes impossible to control the threshold voltage of a field effect transistor, and the current gain value of a bipolar transistor becomes small. Regarding optical devices, the oscillation threshold current of semiconductor lasers becomes larger and the transverse mode becomes wider. Of course, redistribution in the depth direction not only degrades device performance, but in the worst case, the device will not work at all, affecting yield and reliability.

In conventional ion implantation methods, redistribution of implanted ions occurs not only in the depth direction but also in the lateral direction. FIG. 10 schematically shows this. In this figure, 23 is a semiconductor substrate, 24 is a p-type impurity ion implantation, 25 is an implantation mask, 26 is an ideal impurity distribution, and 27 is an actual impurity distribution. As shown in this figure, when p-type impurity ions are implanted from above the implantation mask 25 as shown at 24,
As shown in 27, the actual impurity distribution spreads not only in the depth direction of the semiconductor substrate 23 but also in both sides of the implantation mask 25, that is, in the lateral direction. Therefore, it has been difficult to manufacture ultrafine transistors and narrow stripe semiconductor lasers using conventional ion implantation techniques.

By the way, when forming a p-type conductive region by implanting ions into a semiconductor substrate, it is desirable that all of the implanted ions be electrically activated. However, in reality, the activation rate of implanted ions rarely reaches 100%, and for example, in the case of AA6.3 Ga0. The activation rate of Be or Mg impurities implanted with As ions is at most 20
At present, it is extremely low at ~25%.

[Problem that the invention seeks to solve]

In order to solve the problem of redistribution of impurities and low activation rate as mentioned above, recently, P or As ions, which are group V elements that are the same as the constituent elements of group ■-■ compound semiconductors, have been
Attempts have been made to simultaneously implant the type impurity. However, even if this method is used, in the case of implantation into GaAs, the activation rate with Mg ion implantation alone is 27%, whereas with double ion implantation of Mg and As, the activation rate is 40%.
degree (Journal of Applied Physics (J o
urnal ofA applied physics
), Vol. 48, No. 21, p. 1467 (1986)), and in an example implanted into AQ6,3 Ga... As, the activation rate of double ion implantation of Mg and P is Approximately 50%, approximately twice that of Mg ion implantation alone (Electronics Letters)
cs Letters), Volume 22, No. 6.

p. 315 (1986)).

Furthermore, regarding the depth distribution of impurities, the problem of redistribution due to heat treatment has not yet been completely resolved. Figure 11 is an example showing this. Double ion implantation was performed.

This figure shows the depth distribution of hole concentration due to Mg acceptors determined by hole measurement after heat treatment at 950°C. In the figure, the broken line indicates the theoretical distribution (theoretical Gaussian distribution curve), and the solid line indicates the measured distribution.

This figure shows that due to the low activation rate of impurities, the measured hole concentration is much smaller than the theoretical distribution, and that the depth distribution has a large deviation from the theoretical distribution, especially inside the substrate. Recognize.

An object of the present invention is to provide a method for forming a P-type conductive region by ion implantation of a -v group compound semiconductor, which solves the problem of redistribution of p-type impurities and low activation rate.

[Means for solving problems]

In order to achieve the above-mentioned object, the present invention provides a method for implanting p-type impurity ion species before or after the ion implantation in order to form a p-type conductive region in a -V group compound semiconductor substrate. The most important feature is that at least one or simultaneously ion implantation of halogen ion species of group (I) elements is performed. That is, as mentioned above, in the conventional technology, single ion implantation of p-type impurity ion species or double ion implantation of p-type impurity ion species and group II element ion species such as P and As was performed. On the other hand, the main feature of the present invention is to use group ■ halogen ion species as the ion species for double ion implantation instead of group ■ element ion species.
In this respect, the present invention is completely different from the conventional technology.

[Effect]

The p-type impurity ion-implanted into the ■-■ group compound semiconductor substrate becomes an electrically active acceptor by replacing the lattice positions of the ■-group elements constituting the semiconductor substrate. Therefore, by implanting P-type impurity ion species into the semiconductor substrate, the apparent number of group III elements increases, and the stoichiometric ratio of the number of group III atoms to the number of group III atoms becomes 1:1. The condition of becoming 1 is no longer satisfied. This deviation from the 1:1 stoichiometric composition ratio is thought to be the cause of the above-mentioned conventional problems such as redistribution of impurities due to heat treatment or a decrease in activation rate.

Therefore, in the present invention, by implanting a group Ⅰ halogen ion species, this group Ⅰ element replaces the group V element, increasing the apparent number of group Ⅰ atoms, and by implanting p-type impurities, the number of group Ⅰ atoms increases. It is considered that the increase in the amount of the stoichiometric composition is canceled out, and the stoichiometric composition ratio of 1:1 is maintained, which improves the agreement with the theoretical distribution and eliminates the above-mentioned problem.

In addition, since the atomic weight of the group II element is much heavier than that of the group II halogen ion species, a large amount of radiation damage is generated in the substrate during ion implantation, which causes a decrease in the activation rate. Also, implantation of heavy ions requires large-scale implantation equipment with high voltages. In other words, ion implantation using a halogen ion species with a light atomic weight according to the present invention causes less radiation damage than ion implantation using a group III element with a very heavy atomic weight, so it is possible to form a high-quality p-type conductive region with a high activation rate. Furthermore, it has the advantage that the ion implantation device can be a small, low acceleration voltage device.

〔Example〕

Embodiments of the present invention will be specifically described below with reference to the drawings.

Example 1 First, Figure 1 shows the hole diagrams for the case of single implantation of Be ions into a semi-insulating GaAs substrate and the case of double ion implantation of Be ions and F ions, which are group II halogen ions. The results of investigating the concentration distribution in the depth direction using Hall measurements are shown in comparison with the theoretical distribution. In the figure, the dashed line is the theoretical distribution (
Gaussian distribution (theoretical curve), the solid line shows the measured distribution, and of the measured distribution, ◯ indicates Be single ion implantation, and ◯ indicates double ion implantation of Be and F. The ion implantation conditions were: acceleration voltage of 50 kV for Be ions, and implantation amount of 1 x 1014 ions/a.
n'', F ion acceleration voltage 125kV, implantation amount lXl0
"Ion/port 2. Be and F ions were implanted so that their concentration peaks were formed at a depth of about 0.2" from the surface of the GaAs substrate.
Heat treatment is performed at a temperature of 950°C to activate. Generally, a GaAs substrate is known as a material that exhibits little redistribution of p-type impurities such as Be or Mg. However, as is clear from FIG. 1, in the case of single implantation of Be ions, the hole concentration becomes high on the surface side because Be diffuses toward the substrate surface side (out-diffusion) due to heat treatment. However, in double ion implantation of Be and F, this out-diffusion is suppressed, and as a result, the hole concentration distribution matches the theoretical curve very well.

Be in GaAs substitutes for the lattice position of Ga, which is a group II element, and becomes an electrically active acceptor.

Therefore, by implanting Be ions into GaAs, the apparent number of group III elements increases, and the condition that the stoichiometric composition ratio of the number of group III atoms and the number of group III atoms is 1:1 is satisfied. become dissatisfied. It is believed that this deviation from the 1:1 stoichiometric composition ratio is the cause of abnormal phenomena such as redistribution such as out-diffusion of Be to the surface side and a decrease in the activation rate.

However, by implanting group ■ F ions, this group ■ element replaces the group ■ element, the apparent number of group V atoms increases, the increase in the number of group ■ atoms due to Be is offset, and the stoichiometric amount increases. It is considered that the theoretical composition ratio of 1:1 is maintained, abnormal phenomena such as out-diffusion disappear, and the agreement with the theoretical distribution becomes better.

P-type impurities and group II element ions (P, As
Double ion implantation with (etc.) was actually used to improve this stoichiometric composition deviation. but,
The atomic weight of P is 31, and the atomic weight of As is 75, which is much heavier than the atomic weight of 19, which is 19 for F according to the present invention. Therefore, a large amount of radiation damage is generated during ion implantation, so a high-quality p-type conductive region is required. From the viewpoint of formation, double ion implantation of group Ⅰ elements is not preferable. The significant effect of radiation damage caused by the implantation of heavy ions can result in a negative effect that p-type impurities are not electrically activated by low-temperature heat treatment. At the same time, it also has the disadvantage that seven large-scale implantation bags with high voltage are required to implant heavy ions. In the previous example, Be was implanted at an acceleration voltage of 50kV.The acceleration voltage required to implant F ions to the same depth as eBe is approximately 125kV, but this is more than 250kV for P ions and more than 250kV for As ions. In this case, the voltage will be as high as 500 kV or more. Therefore, double ion implantation using F ions makes it possible to form a high-quality p-type conductive region with less radiation damage compared to P or As ions, and the ion implantation equipment required for this is a small, low acceleration voltage equipment. It will be a good thing.

Example 2 Another example according to the present invention will now be described. Figure 2 shows
Mo was ion-implanted under the same conditions as in the case of Figure 1 above.
It is a figure showing the depth direction distribution of the hole concentration in Ga,..., As. Similarly to FIG. 1, the broken line in FIG. 1 shows the theoretical distribution, and the solid line shows the actually measured distribution. Of the measured distributions, 0 indicates Be single ion implantation and 0 indicates double ion implantation of Be and F. As is clear from this figure, when Be ions are implanted alone, 9
Due to the heat treatment at 50°C, Be has diffused very deeply into the interior.

On the other hand, in the double ion implantation of Be and F according to the present invention, there is no redistribution of Be due to heat treatment, so it can be seen that the hole concentration matches the theoretical distribution very well.

Moreover, FIG. 3 is a diagram showing the results of plotting the electrical activation rate against the heat treatment temperature of the sample used in FIG. 2. This figure shows that the activation rate in single implantation of Be ions, indicated by 0, is just under 30%, whereas in the double ion implantation of Be and F according to the present invention, indicated by 0, the activation rate is up to 8%.
It can be seen that it reaches 0%.

In Example 1.2 above, Be was used as the p-type impurity, but other p-type impurities such as Mg
, Zn, Cd, Hg, etc. may also be used.

Further, in the above Example 1.2, only examples using GaAs, uo, 3Ga0,7As as the ■-■ group compound single conductor substrate were described, but the present invention is of course applicable to m-
V group compound semiconductors, such as InGaAs, InGaAs
Application to P, InP, GaP, etc. is also possible. Also,
Although F ions are used as the halogen ion species according to the present invention, halogen ions such as Cll, Br, and Cl may be implanted instead.

Further, the effects of the present invention did not differ significantly even if the halogen ions were implanted before or after the p-type impurity implantation, or before and after the p-type impurity implantation, or at the same time as the p-type impurity implantation.

In the following, p is added into the m-v group compound semiconductor substrate according to the present invention.
The field of application of the method for forming a type conductive region will be specifically explained with reference to the drawings.6 Example 3 First, application to electronic devices such as transistors will be described. FIGS. 4(a), 4(b) and 5 are diagrams each showing an embodiment in which the present invention is applied to a field effect transistor. Figures 4 (a) and (b) show a column gate field effect transistor, (a) is a top view, (b)
is a sectional view of (a). FIG. 5 is a cross-sectional view of a pn junction gate type field effect transistor. Figure 4(a),
In (b), 17 is a column gate made of a p-type conductive region, 18 is a source, 19 is a drain, dl is the diameter of the column gate 17 according to the present invention, and d2 is the diameter of the column gate 17 according to the prior art. In FIG. 5, 1 is a source electrode, 2 is a gate electrode, 3 is a drain electrode, and 4 is an m
- an n-type semiconductor substrate made of a V-group compound; 20 (shaded region) is a p-type conductive region formed by ion implantation into the n-type semiconductor substrate 4; t is the lower surface of the p-type conductive region 20 according to the present invention; to the bottom surface of the substrate 4, and t2 indicates the distance from the bottom surface of the p-type conductive region 20 to the bottom surface of the substrate 4 according to the prior art.

In such a transistor, when forming the P-type conductive region indicated by the shaded area in the figure by ion implantation, conventional techniques
Due to depth and lateral redistribution, the dimensions of this region tended to expand as shown by the dotted line. Therefore, it has been extremely difficult to control the threshold voltage of the transistor. However, according to the present invention, since there is no redistribution of implanted ions, the p-type conductive region can be precisely determined as shown by the solid line, and a desired field effect transistor can be manufactured with good reproducibility.

Embodiment 4 FIG. 6 is a diagram showing an example in which the present invention is applied to a bipolar transistor. (a) shows a conventional bipolar transistor, and (b) shows a bipolar transistor of the present invention. In these figures, 5 is an emitter (or collector) electrode, 6 is a base electrode, 7 is a collector (or emitter) electrode, 8 is an n-type semiconductor layer, 9 is an n-type semiconductor layer, 10 is an n-type semiconductor substrate, 21 (shaded area)
is a p-type conductive region formed by ion implantation, al is the active layer width according to the present invention, and a2 is the active layer width according to the prior art.

The shaded area in the figure is a p-type conductive region formed by ion implantation. In the conventional technique of (a), the active layer width a2 becomes narrow due to lateral redistribution of implanted ions, and in the worst case, the transistor does not operate. However, according to the present invention, (b)
Since this width does not widen, high-performance bipolar transistors can be manufactured with good reproducibility. In addition, the present invention is characterized in that there is no redistribution in the lateral and depth directions and that the activation rate of implanted ions is high. A bipolar transistor with a reverse collector top/emitter down structure can be realized. In FIG. 6, when 5 is an emitter electrode and 7 is a collector electrode, the transistor has a normal structure, and when 5 is a collector electrode and 7 is an emitter electrode, the transistor has a reverse structure.

Example 5 The method of the present invention can be applied not only to electronic devices such as transistors but also to optical devices. Figure 7 (a
) is a cross-sectional view of a conventional planar stripe laser, (b)
1 is a cross-sectional view of a planar stripe laser of the present invention. In these figures, 11 is an anode electrode, 12 is a cathode electrode, 13 is an n-type semiconductor layer, 14 is a p-type cladding layer, and 15 is an active layer.

16 is an n-type cladding layer, and 22 (shaded region) is a p-type conductive region formed by ion implantation.

In the laser manufactured by the conventional technique of (a), the width of the active layer increases due to the redistribution of implanted ions due to heat treatment, resulting in an increase in the oscillation threshold current and a broadening of the transverse mode. However, in the laser manufactured according to the present invention (b), the active layer width does not increase;
It becomes possible to create high-performance lasers. Further, the method of the present invention can also be applied to manufacturing a guard ring portion of an avalanche photodetector, which requires precise control of carrier concentration distribution.

〔Effect of the invention〕

As explained above, according to the method of the present invention, redistribution of p-type impurities due to heat treatment after ion implantation of p-type impurities into a ■-■ group compound semiconductor can be suppressed, and electrical It becomes possible to form a high quality p-type conductive region with a high activation rate. Further, this method can be easily carried out by simply implanting F ions before or after, before or after, or simultaneously with p-type impurity implantation during ion implantation.

Furthermore, the ion implantation equipment used to carry out the present invention has the advantage of being a small, low acceleration voltage device.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the hole concentration distribution in the depth direction when single Be ions are implanted into GaAs and when double ion implantation of Be and F ions is performed according to the present invention.
The figure is A-stand. FIG. All in the case of single ion implantation and in the case of double ion implantation of Be and F ions according to the present invention
Figures 4(a) and 4(b) plot the activation rate of Be in Gas and tAs against the heat treatment temperature, respectively, when the present invention is applied to a column gate field effect transistor. Figure 5 is a top view and cross-sectional view showing the effect of 1. Figure 6 (a) is a cross-sectional view showing the effect when the present invention is applied to a p-n junction gate type field effect transistor.
, (b) are cross-sectional views showing the effects when the present invention is applied to a bipolar transistor, and FIGS. 7(a) and (b) are
FIG. 8, a cross-sectional view showing the effect when the present invention is applied to a planar stripe laser, shows the depth distribution of Be concentration implanted into GaAs by conventional ion implantation technology before and after heat treatment. 9A and 9B show As6. a Gas, B injected into 7 As
Figure 10 showing the depth distribution of e concentration before and after heat treatment.
The figure schematically shows that p-type impurities are redistributed in the depth and lateral directions by heat treatment using conventional ion implantation technology.
FIG. 3 is a diagram showing the depth distribution of hole concentration in GaAs after heat treatment by double ion implantation of g and As. 1... Source electrode 2... Gate electrode 3... Drain electrode 4... N-type semiconductor substrate 5... Emitter electrode (or collector) electrode 6...
Base electrode 7...Collector electrode (or emitter) electrode 8...
N-type semiconductor layer 9...P-type semiconductor layer 10...N-type semiconductor substrate 11...7 Node electrode 12...Cathode electrode 13...N-type semiconductor layer 14...P-type cladding layer 15 ...Active layer 16...N-type cladding layer 17...Column gate 18...Source 19...Drain

Claims (1)

[Claims] 1. In a method of forming a p-type conductive region by implanting p-type impurity ion species on or into the surface of a III-V compound semiconductor substrate, before or after the above-mentioned implantation of the p-type impurity ion species. III, characterized in that it comprises a step of implanting a group VII halogen ion species at least one or simultaneously with the above implantation, and after the step, a heat treatment for activating the p-type impurity ion species is performed. - A method for forming a p-type conductive region by ion implantation of a V group compound semiconductor.