JPS63274988A - Character pattern generation system for bit map display - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention provides a pattern synthesis method using a bitmap display method that synthesizes and displays nine characters/grams and predetermined patterns such as ruled line patterns and shading/IP turns. It is related to.

[Conventional technology]

Conventionally, this type of pattern synthesis has been performed by combining a 9-character pattern and a ruled line pattern as shown in FIG.
) The 9-character pattern and the hatching are realized by a circuit configuration as shown in FIG. 6 or 7 in order to display a composite display of the patterns. That is, CPU 21
Following instructions from 1, the compositing/transfer control circuit 22 first reads character pattern information from the character pattern memory 23 and stores it.Secondly, for ruled lines and shading, it reads ruled line pattern information (or shading pattern information) from the pattern memory 24. ,
Combine the two patterns and write the two combined patterns into the display frame memory 25.
Read data sequentially from the display device 26 such as CRT.
It was displayed on .

[Problem that the invention seeks to solve]

In the conventional method described above, 2 character patterns and a ruled line pattern (or 4 turns of shading) are read out separately, 2 are combined, and 1 are
Since the composite pattern is written to the display frame memory, three memory accesses are required to write one piece of data to the display frame memory, which has the disadvantage of poor efficiency. 2. Means for Generating Character Patterns for Bitmap Display According to the present invention, character patterns to be displayed and predetermined patterns such as ruled lines and shading are determined.

A control unit that sends out a transfer control signal, a character pattern memory that stores a one-character pattern, a pattern generation circuit that generates a predetermined pattern, and a synthesis unit that combines the characters and patterns stored in the two-character pattern memory with the predetermined pattern. a transfer control circuit for writing a pattern synthesized by two synthesis circuits into a display frame memory in response to a transfer control signal; and a display means for displaying display information written in one display frame memory. Features.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.

The control unit 1 is a circuit having a microprocessor, memory, etc. that performs display control. The character pattern memory 2 is
As shown in the figure, this is a memory that stores letters and turns made up of multiple words in address order. The ruled lines and shading indicate the pattern generation circuit 3.

The pattern designation signal 4 from the control unit 1 causes the pattern designation signal 4 in FIG.
) The ruled line/IP turn as shown in FIG. 3(b) or the shaded area as shown in FIG. The synthesis circuit 5 synthesizes the character pattern data 6 which is the output of the 2-character pattern memo V2, and the ruled line and shaded 4-turn data 7 which is the output of the pattern generation circuit 3, and generates the data shown in FIG. 4(a) or 9 composite pattern data 8 as shown in ) is output. Transfer control signal 9 is transmitted to character pattern memory 2 in which character patterns to be transferred are stored.
address information and.

This signal includes address information of the frame memory 10 as a transfer destination.

The transfer control circuit 11 outputs the character pattern memory address signal 12 based on the instruction of the transfer control signal 9, inputs the resulting composite pattern data 8, and outputs the 2-display pattern data 13 and the frame memory address 14. The frame memory 10 stores display pattern data 13 at an address indicated by a frame memory address 14, and sequentially outputs the data stored for two displays as display data 15. CRT 16 is a display device for displaying display data 15.

〔Effect of the invention〕

As explained above, is the present invention one character? Turn and ruled line patterns or shading can be created by combining patterns using a combining circuit, and the two combined patterns can be written into the frame memory one after another by a transfer control circuit, reducing the number of times the memory is accessed compared to conventional methods. This has the effect of shortening the transfer time.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of a bitmap display character pattern generation system according to an embodiment of the present invention;
FIG. 2 is a block diagram of the character A' turn memory in FIG. 1, and FIGS. 3(a) and 3(b) are ruled line patterns, and hatching indicates the pattern -F! Diagram showing iIJ. FIGS. 4(a) and 4) are diagrams showing an example of a composite tcutane. Figures 5(,) and (b) are diagrams showing display examples in which characters and ruled lines and characters and shading are combined, respectively. Figure 6 is a block diagram showing an example of a conventional circuit. Figure 7 is a diagram showing an example of a conventional circuit. It is a block diagram showing an example. 1...Control unit, 2...Character pattern memory, 3...
・Pattern generation circuit, 4... and turn designation signal, 5
...Synthesis circuit, 6...Character pattern data, 7...
- Ruled lines and shaded lines are Tsukuturn data, 8... Composite pattern data, 9... Transfer control signal, 10... Frame memory. 11...Transfer control circuit, 12...Character pattern memory address, 13...Display i! Turn data, 14.
...Frame memory address, 15...Display data,
16...CRT 0 Figure 3 (0) (b) Figure 4 (0) (b) Figure 5 (0) (b) Figure 6 Figure 7

Claims (1)

[Claims] 1. A control unit that determines a character pattern to be displayed and a predetermined pattern and sends a transfer control signal, a character pattern memory that stores the character pattern, and a pattern that generates the predetermined pattern. a generating circuit, a synthesizing circuit for synthesizing the character pattern stored in the character pattern memory and the predetermined pattern, and writing the pattern synthesized by the synthesizing circuit into a display frame memory in response to the transfer control signal. A character pattern generation method for a bitmap display, comprising a transfer control circuit and a display means for displaying display information written in the display frame memory. 2. The predetermined pattern includes a plurality of patterns, the control section sends out a pattern designation signal for designating one of the predetermined patterns, and the pattern generation circuit generates the predetermined pattern designated by the pattern designation signal. 2. A bitmap display character pattern generation method according to claim 1, which generates one particular pattern among patterns. 3. The bitmap display character pattern generation method according to claim 2, wherein the predetermined pattern is a ruled line pattern and a hatching pattern.