JPS63271629A - Recorder - Google Patents

Abstract

PURPOSE:To attain resetting processing without adding any additional circuit by sending out a reset signal directly to another control means from a 1st control means after it is confirmed that the other control means reads data from the 1st control means. CONSTITUTION:When 1st and 2nd MPUs have a communication through peripheral interfaces (PIA) 3 and 4 and the MPU 1 receives an external reset signal, the reception of an READ pulse in the PIA 3 is waited for and then the MPU 1 waits for the external reset signal to reset after confirming the reception. Then the MPU 1 writes data to the output port of the PIA 3 after the resetting and also sends out the reset signal directly to the MPU 2 through an internal reset line 6. Further, the MPU 2 writes data to the output port of the PIA 4 and also sends out the READ pulse to the MPU 1 to perform the resetting process, and the MPU 1 receives the READ pulse and performs the resetting process.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a recording apparatus, and particularly to various recording apparatuses having a plurality of control means.

[Prior art 1] In a conventional recording device that records characters and images on a recording medium such as recording paper, a car's MPLI (
Many of them used microprocessor units.

However, when high-speed printing and high-definition printing are required, such as with recent color inkjet printers, M
In order to reduce the load on the PU and support high-speed processing, it is equipped with multiple MPUs.For example, the first MPU processes data sent from the host, and the second
In recent years, a distributed processing type configuration has appeared in which drive control of a drive source such as a carriage motor is performed.

On the other hand, in recording devices such as inkjet printers, when a reset signal is input manually from the outside, if a hardware reset is performed using an electronic circuit, ink purge processing (clogging recovery processing) and memory (storage device) cleaning will be performed. Once the device starts up, unnecessary processing such as power-on processing will be performed at the same time, so we used software interrupts to handle external resets to avoid performing the above-mentioned unnecessary processing. There were many things.

[Problem to be Solved by the Invention 1] However, in conventional recording devices equipped with a plurality of control means, handshaking of commands etc. is performed between the first MPu and the other MPUs. Even if an attempt is made from the first MPU to inform other 1ilPUs by a reset command of an external reset accepted by the first MPU or an interrupt, if a certain command is being executed by another MPII, the The reset command cannot be sent, and the hardware does not allow the first MPtl to send the reset command.
However, if only a sending means for sending a reset signal is provided, there is a possibility that the handshake will be disrupted. This has the disadvantage that special measures are required for each MPU.

The present invention eliminates the above-mentioned drawbacks and enables external reset processing by handshaking without special means for notifying the first control means that other MLJ control means have accepted the set command. The purpose is to provide a recording device with

[Means for Solving the Problems] In order to achieve the above object, the present invention provides an interface means for handshaking between the first control means and other control means, and an interface means for handshaking between the first control means and the other control means, and an interface means for transmitting a reset signal from the outside to the first control means. transmission means for transmitting from the control means to the other control means without going through the interface means, and after handshaking with the first control means via the interface means that the reset signal has been received, The control means and the second control means are characterized in that they each execute a reset process corresponding to a reset signal from the outside.

[Function] In the present invention, after confirming that the other control means has read the data sent by the first control means, the first control means communicates with the other control means without using a handshake interface. By sending a reset signal directly to the controller, it is possible to send a reset signal using an external reset signal while handshaking between multiple control means, making it possible to perform reset processing without the need for complicated additional circuits. becomes. Further, according to the present invention, since the reset process can be performed by software, the reset process at power-on and the reset process by an external reset signal can be performed differently. For example, at the time of external reset, the RAM (It is possible to omit the memory check and purge process of the random access memory, and shorten the reset process time using an external reset signal.

[Example] Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

FIG. 1 shows an example of a circuit configuration of an interface portion between control devices of a recording apparatus to which the present invention is applied. In this figure, 1
MPII (microprocessor) is the first control means and controls the operation of the entire device. Reference numeral 2 denotes MPII, which is another control means, and controls driving parts such as a carriage motor and a purge processing motor. 3
and 4 are PIAs (peripheral interfaces), which connect the first MPU 1 and the other MPUs.
2 communicate data and commands with each other via this device 31.4.

5 is an external reset line connected to the input side of the MPU, and through this line 5 an external reset signal (reset pulse) that interrupts the MPU 1 is sent to the MPII.
1 executes interrupt processing immediately upon receipt. 6 is an internal reset line for the reset signal sent from the first MPLI 1 to the other MPUs 2, and the first MPLI 1 receives the above-mentioned external reset pulse.
By interrupt processing, the reset signal is sent directly to the second MP via the internal reset line without going through PIA3.
Send to I2.

7 is sent from the first MPU 1 to the other MPU 2,
8 is the MPIJ command data line that sends the command data (to D to T).
W old 7E (i included) pulse line to notify MPII 2 that it has been written to PIA3, 9 is MPII
MPIJ 1 indicates that I2 has read the command data.
This is the READ (read) pulse line to notify the user. In addition, IO is a command data line for transmitting command data sent from MPII 2 to MPII 1, and 11 is a command data line for transmitting command data from MPII 2 to PIA 4.
WIt to notify MPU 1 that it has written to
ITE pulse line, 12 is II for informing MPU 2 that MPU 1 has written command data
This is the EAD pulse line.

FIG. 2 shows an example of a control procedure and a signal transmission/reception state in the embodiment apparatus of FIG. In this diagram, the left side is MPLI
The processing procedure in i, the right side shows the processing and processing procedure in MPII 2, and the middle part shows the signal transmission/reception status.

First, when an external reset signal is input from the external reset line 5 to the first MPt1l, the MPU 1 immediately starts interrupt processing and performs the following operations. First step S
At 1, Mpui reads a control register (not shown) in the first PIA B to detect whether a READ pulse has been received.

If a pulse is being received to RE8, the first MP
This indicates that the other MPIJ 2 has accepted some command sent from the MPU 111 to the other MPU 2, so the process moves to the next step S2.

After the other MPIJ 2 sends IIE8D, it waits for the next command (step 31').
.

On the other hand, when the first PTA 3 does not receive a READ pulse to the RE 8, the first MPII
1 waits. By doing this, the first MPIJ 1
No matter when the first MII receives an external reset signal,
The handshake between U 1 and the second MPtl 2 is maintained.

Next, in step S2, the MPII 1 detects whether the external reset signal is released. If it has been released, the process moves to the next step S3. On the other hand, if the external reset signal has not been released, the MPU+ waits until that signal is released.

In step S3, MPII 1 is the 1st < 7) PI
FF (16
It writes data in the MPII 2 and sends a reset pulse (reset signal) to the other MPII 2 through the internal reset line 6. In this case, M
MPU sends a WRITE pulse to notify PU 2
1 is not sent. Next, the process moves to step S4, and M
Wait for a pulse to be sent from PII 2 to RE 8. During this time, on the other MPII 2 side, the 1st MPIJ
When the reset pulse is received from 1, it enters interrupt processing, writes FF (hexadecimal) data to the output port (not shown) of other PIA 4 (step 52'), and sends the IIEAD pulse to the first MPtl 1. and performs reset processing.

On the other hand, the first MPtl 1, which received the READ pulse sent from the second MPII 2,
Perform the reset process in the same manner as in step 2. In addition, step S
3 and step 32', the data FF was written to the output port to the PI in 1.
This is to enable detection of completion of communication preparation by rewriting the above-mentioned boat when communication preparations are completed with each other during the reset process. Furthermore, the data (FF)
Since this indicates that the initialization process has not yet been completed, the value is not limited to 'FF' as long as it is a value other than the value to be written when the process is completed (in this embodiment, 'oo').

In this embodiment described above, two control means (MPU
1, MPU 2), but the present invention can be similarly applied to a case in which more control means are provided.

[Effects of the Invention] As explained above, according to the present invention, the first control means controls the other control means after confirming that the other control means has read the data sent by the first control means. By sending a reset signal directly to the controller without going through a handshake interface, we have made it possible to send a reset signal using an external reset signal while handshaking between multiple control means. This provides the effect of enabling reset processing without any additional circuitry. Further, according to the present invention, the reset process can be performed by software, so the reset process at power-on and the reset process by an external reset signal can be handled differently.For example, at the time of external reset,
It is possible to omit checking and purging of the RAM (random access memory) and shorten the reset processing time using an external reset signal.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an example of the circuit configuration of an interface between control devices of a recording apparatus to which the present invention is applied, and FIG. It is a flowchart which shows an example. 1.2...MPII (multiprocessor unit),
3.4...PIA (peripheral interface),
5-12...Signal line. Flowchart Figure 2

Claims (1)

[Scope of Claims] Interface means for handshaking between the first control means and another control means, and an interface means for transmitting an external reset signal from the first control means to the other control means. and a transmission means for transmitting the reset signal without going through the interface means, and after handshaking with the first control means via the interface means to the effect that the reset signal has been received, the first control means and the second control means A recording apparatus characterized in that the means executes reset processing corresponding to each of the reset signals from the outside.