JPS63271555A - Storage control system - Google Patents

Storage control system

Info

Publication number
JPS63271555A
JPS63271555A JP62106019A JP10601987A JPS63271555A JP S63271555 A JPS63271555 A JP S63271555A JP 62106019 A JP62106019 A JP 62106019A JP 10601987 A JP10601987 A JP 10601987A JP S63271555 A JPS63271555 A JP S63271555A
Authority
JP
Japan
Prior art keywords
error
data
block
main storage
written
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62106019A
Other languages
Japanese (ja)
Inventor
Tomoaki Kubota
Original Assignee
Nec Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nec Corp filed Critical Nec Corp
Priority to JP62106019A priority Critical patent/JPS63271555A/en
Publication of JPS63271555A publication Critical patent/JPS63271555A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To prevent soft errors from being accumulated by storing error corrected data in a cache memory when data read out of a main memory has an error, setting the error bit of an address array and rewriting the data in the main storage when a block is substituted.
CONSTITUTION: If the data read out of the main storage 2 has an error and the error is correctable, the data corrected by an error correcting circuit 5 is stored in, for example, a block 1 of the cache memory 3 and the error bit E1 of the address array 4 is set. Then when the block 1 becomes an object of rewriting, the data in the block 1 is written in the main storage 2 on condition that a write bit W1 is set, but the data is written in the main storage 2 similarly even when the error bit E1 is set. Consequently, correct data is written in an address from the cache memory 3 without fail and soft errors are reduced.
COPYRIGHT: (C)1988,JPO&Japio
JP62106019A 1987-04-28 1987-04-28 Storage control system Pending JPS63271555A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62106019A JPS63271555A (en) 1987-04-28 1987-04-28 Storage control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62106019A JPS63271555A (en) 1987-04-28 1987-04-28 Storage control system

Publications (1)

Publication Number Publication Date
JPS63271555A true JPS63271555A (en) 1988-11-09

Family

ID=14422941

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62106019A Pending JPS63271555A (en) 1987-04-28 1987-04-28 Storage control system

Country Status (1)

Country Link
JP (1) JPS63271555A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04229484A (en) * 1990-07-23 1992-08-18 Internatl Business Mach Corp <Ibm> Method controlling recovery of dram
CN102063940A (en) * 2009-11-16 2011-05-18 索尼公司 Nonvolatile memory and memory system

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56169295A (en) * 1980-05-30 1981-12-25 Fujitsu Ltd Error retrieval system of information processor

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56169295A (en) * 1980-05-30 1981-12-25 Fujitsu Ltd Error retrieval system of information processor

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04229484A (en) * 1990-07-23 1992-08-18 Internatl Business Mach Corp <Ibm> Method controlling recovery of dram
CN102063940A (en) * 2009-11-16 2011-05-18 索尼公司 Nonvolatile memory and memory system
JP2011108306A (en) * 2009-11-16 2011-06-02 Sony Corp Nonvolatile memory and memory system
TWI414941B (en) * 2009-11-16 2013-11-11 Sony Corp Nonvolatile memory and memory system
US8683290B2 (en) 2009-11-16 2014-03-25 Sony Corporation Save area for retaining corrected data

Similar Documents

Publication Publication Date Title
BR8404463A (en) Appliance and method to automatically correct an error and ensure impossibility of repeating the occurrence
DE3380910D1 (en) METHOD FOR STORING DATA WORDS IN ERROR-TOLERANT STORAGE FOR CORRECTING UNCORRECTABLE ERRORS.
JPS63271555A (en) Storage control system
JPH04184634A (en) Microcomputer
JPH04162300A (en) Semiconductor memory
JPS5555499A (en) Memory control unit
JPH01290200A (en) Lsi memory with self-correcting function
JPS63200239A (en) Error correcting system
JPS61290556A (en) Memory error recovering system
JPS5622291A (en) Bit error correction method for memory
JPH0383300A (en) Semiconductor memory
JPH03263148A (en) Storage device
JPS55157038A (en) Microprogram control system
JPS56163600A (en) Memory control system
JPS62212854A (en) Automatic error correcting memory device
JPS61272851A (en) Storage device
JPS63278162A (en) Error correction device in information processor
JPS60113394A (en) Error correction system
JPH03105444A (en) Memory address control circuit
JPS60231248A (en) Common memory device
JPS61123957A (en) Storage device
JPH0229839A (en) Microprogram control device
JPH0266652A (en) Cache memory
JPS63170756A (en) Main storage initializing system
JPH04291434A (en) Memory system