JPS63269573A - Semiconductor device having heterojunction - Google Patents

Abstract

PURPOSE:To satisfy both an emitter ground current-amplification factor and an operation speed as an emitter ground current-amplification element by a method wherein a first semiconductor region and a second semiconductor region formed by silicon isotopes and a heterojunction is formed between the first semiconductor region and the second semiconductor region. CONSTITUTION:A semiconductor region 13 as a base region is used as a first semiconductor region; a semiconductor layer 4 as an emitter region is used as a second semiconductor region; a type of isotope silicon constituting the first semiconductor region and the second semiconductor region is selected in such a way that a forbidden band width for the second semiconductor region is wider than that for the first semiconductor region. The semiconductor region 13 as the base region, unlike a semiconductor substrate 1, is composed of the same type of isotope silicon as a semiconductor layer 12. Accordingly, a heterojunction 14 is formed between the semiconductor substrate 1 and a semiconductor layer 12 as a collector region; also a heterojunction 15 is formed between the semiconductor region 13 as the base region and the semiconductor layer 4 as the emitter region.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a semiconductor device having a first semiconductor region and a second semiconductor region in contact with the first semiconductor region, and particularly relates to a bipolar transistor. It is suitable for application to.

[1] Conventionally, as a semiconductor device having a first semiconductor region and a second semiconductor region in contact with the first semiconductor region, a bipolar transistor described below with reference to FIG. Proposed.

In other words, commonly used silicon (quality ff
128.29 and 30 isotope silicon (respectively 28
, 29 3G.

28Si:29
・ , 30 ・ 2 S+, S+-y (natural silicon having a composition ratio of 92.2:4.7:3.1) and has an n+ type semiconductor substrate 1; A semiconductor layer 2 made of the same silicon as the semiconductor substrate 1 and having n-type conductivity.
is formed as a collector region by, for example, an epitaxial growth method, and on the other hand, by introducing p-type impurities into the semiconductor layer 2 from the surface side, a semiconductor region 3 made of the same silicon as the semiconductor layer 2 and having p-type is formed. is formed as a base region.

Further, on the semiconductor region 3, a semiconductor layer 4 made of the same silicon as the semiconductor region 3 and of n+ type is locally formed as an emitter region by epitaxial growth and etching.

Further, an electrode 5 is ohmically attached as a collector electrode on the surface of the semiconductor substrate 1 opposite to the semiconductor layer 2 side, and another electrode 6 is attached on the surface of the semiconductor layer bX3.
An ohmic electrode is applied as a base electrode, and furthermore, another electrode 7 is applied on the semiconductor layer 4 as an ohmic emitter electrode.

The above is the configuration of the conventionally proposed bipolar transistor.

A bipolar transistor with such a configuration is
Although detailed explanation will be omitted, it functions as a common emitter current amplification element.

Furthermore, in the case of the bipolar transistor shown in Fig. 4,
All the semiconductor regions constituting it, that is, the semiconductor substrate 1, the semiconductor layer 2 as the collector region, the semiconductor region 3 as the base region, and the semiconductor layer 4 as the emitter region, are all relatively easily available. Since it is made of silicon, it has the feature that a bipolar type i-transistor can be provided easily and at low cost.

However, in the case of the conventional bipolar transistor shown in FIG.
When looking at a semiconductor layer having a semiconductor region of Semiconductor region 3 (first semiconductor region,
When looking at a semiconductor layer having a second semiconductor region in contact with the first semiconductor region, the common emitter current amplification factor can be increased by reducing the impurity concentration of the first semiconductor region. However, in this case, the base resistance (the first semiconductor region and the second semiconductor region in contact with the first semiconductor region)
When viewed from the perspective of a semiconductor layer having a semiconductor region of When looking at a semiconductor layer having a first semiconductor region and a second semiconductor region in contact with the first semiconductor region, if the impurity concentration of the first semiconductor region is increased, the base resistance (the first semiconductor region) is increased. semiconductor region and its first
When viewed from a semiconductor layer having a second semiconductor region in contact with a semiconductor region, the resistance of the first semiconductor region is lowered, so the operating speed as a common emitter current amplification element can be improved. , in this case, the common emitter current amplification factor decreases.

Therefore, the conventional bipolar transistor shown in FIG. 4 has the disadvantage that it cannot simultaneously satisfy both the common emitter current amplification factor and the operating speed as a common emitter current amplification element.

To solve the problem, the present invention provides a novel bipolar transistor which, when applied to a bipolar transistor, has the characteristics described above with respect to the conventional bipolar transistor described above in FIG. 4, but does not have the drawbacks described above. This paper attempts to propose a semiconductor device having a heterojunction.

A semiconductor device having a heterojunction according to the present invention has a first semiconductor region (semiconductor region 3 as a base region when viewed from the conventional bipolar transistor described above in FIG. 4), similar to a conventional semiconductor device; In the semiconductor layer that is in contact with the first semiconductor region (semiconductor layer 4 as an emitter region when viewed from the conventional bipolar transistor described above in FIG. 4), the second semiconductor region is in contact with the first semiconductor region.
Although the first and second semiconductor regions are both made of silicon, they are made of different isotopes of silicon, so that the first and second semiconductor regions
A heterojunction is formed between the second semiconductor region and the second semiconductor region by using different isotopes of silicon.

Functions and Effects According to the semiconductor device having a Peter junction according to the present invention having such a configuration, it is constructed by adding the semiconductor region 3 as the base region to the conventional bipolar transistor described above in FIG. Furthermore, the semiconductor layer 4 serving as an emitter region is defined as a second semiconductor region, and the type of isotope silicon constituting each of the first and ff12 semiconductor regions is defined as a second semiconductor region. In the case where the semiconductor region is selected in advance to have a wider forbidden band width than the first semiconductor region, the bipolar transistor is similar to the conventional bipolar transistor described above in FIG. In addition, it functions as a common emitter current amplification element.

Further, according to the bipolar transistor to which the present invention is applied, all the semiconductor regions constituting the bipolar transistor are
Similar to the conventional bipolar transistor described above in the figure, it may be made of silicon and therefore the fourth
Similar to the conventional bipolar transistors described above in the figures, bipolar transistors can be readily and commercially available.

Furthermore, according to the bipolar transistor to which the present invention is applied, the emitter region is a semiconductor m (a semiconductor layer having a first semiconductor region and a second semiconductor region in contact with the first semiconductor region). When looking at the semiconductor region (the first semiconductor region and the second semiconductor region in contact with the first semiconductor region) as the base region, with the impurity concentration of the second semiconductor region kept constant. By increasing the impurity concentration of the first semiconductor layer (when viewed from the semiconductor layer with the first semiconductor layer), the base resistance is lowered and the operating speed as a common emitter current amplification element is improved. rate is not expected to decline. However, this decrease in the common emitter current amplification factor is effectively compensated for because the semiconductor layer serving as the emitter region has a wider forbidden band width than the semiconductor region serving as the base region.

Therefore, according to the bipolar transistor to which the present invention is applied, both the common emitter ff1Ft amplification factor and the operating speed as a common emitter current amplification element can be substantially satisfied at the same time.

Embodiment Next, an embodiment of a semiconductor layer having a heterojunction according to the present invention when applied to a bipolar transistor will be described with reference to FIG.

In FIG. 1, parts corresponding to those in FIG. 4 are designated by the same reference numerals, and detailed description thereof will be omitted.

The bipolar transistor shown in FIG. 1 to which the present invention is applied has the same structure as the conventional bipolar transistor described above in FIG. 4, except for the following points.

That is, it is formed on a semiconductor substrate 1 which is made of commonly used silicon (natural silicon) similar to that described above in FIG. The semiconductor layer 2 serving as the collector region is replaced with a semiconductor layer 12 made of isotopic silicon, which is different from the semiconductor substrate 1 and is mainly composed of isotopic silicon ("S i ") having a mass number of 30, for example. The semiconductor region 3 as a base region formed in the semiconductor layer 2 and made of the same silicon (natural silicon) as the semiconductor substrate 1 is a semiconductor region 13 made of the same isotopic silicon as the semiconductor layer 12, which is different from the semiconductor substrate 1. Therefore, a heterojunction 14 is formed between the semiconductor substrate 1 and the semiconductor layer 12 as a collector region, and a heterojunction 14 is formed between the semiconductor region 13 as a base region and the semiconductor layer 4 as an emitter region. Even between, heterojunction 1
It has the same structure as the conventional bipolar transistor described above with reference to FIG. 4, except that 5 is formed.

Note that the semiconductor layer 12 made of isotope silicon mainly composed of 30Si may be made of disilane (S) from natural silicon, for example.
iH4) and concentrating its disilane using a centrifugation method to obtain an isotopic -130-isomer difluoride (SIH4), which can be formed by a CVD method using the isotopic disilane.

The above is the configuration of the embodiment of the bipolar transistor to which the present invention is applied.

According to the bipolar type transistor 1 to transistor to which the present invention is applied having such a configuration, it has the same configuration as the conventional bipolar type transistor described above in FIG. 4, except for the matters mentioned above. Although detailed explanation will be omitted,
Like the conventional bipolar transistor described above in FIG. 4, it functions as a common emitter current amplification element.

Further, according to the bipolar transistor to which the present invention is applied as shown in FIG. Since the region 13 and the semiconductor layer 4 as the emitter region are all made of silicon, which is relatively easily available, as in the conventional bipolar transistor described above in FIG. can be provided to

Furthermore, according to the bipolar transistor to which the present invention is applied, the impurity W in the semiconductor layer 4 as an emitter region
If the operating speed as an emitter-grounded current amplifying element is improved by lowering the base resistance by increasing the impurity concentration of the semiconductor layer llA13 as the base region while keeping the 4 degrees constant, the emitter will change accordingly. Assume that the ground current amplification rate does not decrease. However, the reduction in the common emitter current amplification factor is due to natural silicon,
Since the semiconductor region 13 as the base region is made of isotope silicon mainly composed of 30S1, the semiconductor layer 4 as the emitter region has a sufficiently wider forbidden band width than the semiconductor layer region 13 as the base region. When the semiconductor region 13 as a region is the same as the semiconductor region 3 as a base region of the conventional bipolar transistor described above in FIG. 4, the emitter contact Ja current amplification factor is the same as that of the conventional bipolar transistor described above in FIG. This is a much improved relationship compared to the above, and is effectively compensated.

Therefore, according to the bipolar transistor to which the present invention is applied, both the common emitter current amplification factor and the operating speed as a common emitter current amplifying element can be satisfied almost simultaneously.

Note that the semiconductor region 13 as the base region and the semiconductor region 4 as the emitter region are made of isotope silicon that lends to each other, but since they are both made of the same silicon, the heterojunction 15 formed between them is Since the interface of the semiconductor region 13 and the semiconductor layer 4 are made of silicon of different isotopes, the v1 function as a common emitter current amplifying element is improved. Does not decrease. This also applies to the space between the semiconductor substrate 1 and the semiconductor layer 12 serving as the collector region.

Also, a bipolar type to which the present invention is applied shown in FIG.
- In the transistor, when the semiconductor region 13 as the base region is made of isotope silicon mainly composed of 30sr, and the semiconductor layer 4 as the emitter region is made of isotope silicon made of natural silicon. As mentioned above, when the semiconductor region 13 is made of isotope silicon mainly composed of 303i, the semiconductor ll!
The semiconductor region 13 may be made of isotopic silicon mainly composed of 29Si, and the semiconductor region 13 may be made of 29Si.
Accordingly, the semiconductor layer 4 can be made of isotope silicon mainly composed of 29S; of course, the semiconductor region 13 can be made of isotope silicon mainly composed of 30S.
Assuming that it is made of isotope silicon mainly composed of i,
Semiconductor substrate 1 is 298. Alternatively, if the semiconductor region 13 is made of isotopic silicon mainly composed of 2981, then the semiconductor U plate 1 can be made of isotopic silicon mainly composed of 30Si or 2981.
It can also be made of isotopic silicon mainly composed of 9Si.

Further, in the above description, the present invention was applied to a bipolar transistor, but as shown in FIG.
the semiconductor fn region 22 of the mold, the electrode 23 attached to the side of the semiconductor region 21 opposite to the semiconductor region 22 side, and the semiconductor region 2
In the diode shown in FIG. 2, the p-type semiconductor region is an n-type semiconductor, as shown in FIG. In a diode having a configuration in which the region 22' is substituted, the semiconductor region 21 is made of natural silicon or an isotopic silicon mainly composed of 30Si such as 28Si, and isotopic silicon mainly composed of 29S1. The semiconductor regions 22 and 22' may be made of one isotope of silicon, and the semiconductor regions 22 and 22' may be made of another isotope of silicon, and other modifications may be made without departing from the spirit of the invention. Variations and changes may be made.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view showing an embodiment of a semiconductor layer having a heterojunction to which the present invention is applied. FIGS. 2 and 3 are line sectional views each showing an embodiment of a diode to which the present invention is applied. FIG. 4 is a cross-sectional view showing a conventional bipolar transistor. 1... Semiconductor substrate 2.4.12... Semiconductor layer 3.13.21.22.22'... Semiconductor region 5 .6.7.23.24 ・・・・・・・・・3 flashes of electrode whistle

Claims (1)

[Scope of Claims] A semiconductor device having a first semiconductor region and a second semiconductor region in contact with the first semiconductor region, wherein the first and second semiconductor regions contain different isotopes. A semiconductor device having a heterojunction, characterized in that the first and second semiconductor regions are made of silicon and that a heterojunction is formed between the first and second semiconductor regions by making them different isotopes of silicon.