JPS63268381A - Solid-state camera - Google Patents

Abstract

PURPOSE:To record picture information on a memory pack without providing a buffer memory or a serial-parallel conversion circuit and to realize a solid- state camera miniaturized and with resulting low cost, by storing serial picture information signal read out from an image pickup element in the storage means of a serial picture information signal connected separably to a main body without changing a time base by controlling the transfer speed of the signal. CONSTITUTION:The readout speed of a signal from a solid-state image pickup element 402 and data transfer speed to the memory pack 102 are matched by using the solid-state image pickup element 402 having a cumulative effect. At a signal processing circuit 403, the adjustment of white balance, etc., is applied or the output signal of the solid-state image pickup element 402 having the cumulative effect, and next, the signal is converted to a digital signal at an A/D converter 404, and is recorded on the memory pack 102 via a memory pack interface 405. In such a way, it is possible to make the buffer memory and the serial-parallel conversion circuit, etc., unnecessary.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a camera using a solid-state memory (a semiconductor device that does not require a movable mechanism for recording and reproducing information).

[Prior art] Electronic still cameras (hereinafter referred to as solid-state cameras) that use memory elements that do not require a movable mechanism for recording and reproducing information include silver halide still cameras, video floppy electronic still cameras (hereinafter referred to as Sv It is mainly focused on being a camera that sells well.

By handling image information electronically, the Sv camera
It enables immediate playback of captured images, and also facilitates image transmission, computer processing, and electronic filing of images. However, in the Sv camera,
The mechanism that rotates a small magnetic sheet called a video floppy at high speed and records video information on the magnetic sheet with a track pitch of several tens to 100 μm requires a high degree of precision, which reduces the cost of the camera itself. was difficult. An optical disk camera that uses an optical recording medium instead of a magnetic sheet has also been devised, but for the same reasons as above, there was a limit to the cost reduction.

Under these circumstances, solid-state cameras are replaced by second-generation cameras (S
It is considered as a solution to the shortcomings of the V-camera.

The concept of the solid-state camera system will be explained below.

FIG. 1 shows an example of this solid-state camera system. 1st
In Figure (a), 101 is a solid-state camera, and 102 is a memory bag for storing image information. This memory pack 102 is composed of an IC memory, a backup power source, and the like. Photographing a subject becomes possible by inserting this memory pack 102 into the throttle of the solid-state camera 101.

The memory pack 102 and the solid-state camera 101 can be connected in various ways, including a normal metal connector, a transmit coil, and an optical coupler.

Further, in FIG. 1(b), 103' is a regenerator for reproducing image information photographed by the solid-state camera 101 and memory pack 102, and its output is a normal T
It is possible to connect to Vsonita, video printer, still image transmitter, still image filing device, etc.

Next, the configuration of such a solid-state camera and playback device will be explained.

FIG. 2 shows two configurations of this solid-state camera.

In FIG. 2(a), 201 is an imaging lens, 202
2 is a solid-state image sensor such as a CCD, 203 is a signal processing circuit, and 2
04 is a to/D converter, 205 is a sofa memory,
206 is an interface circuit with the memory pack 102. As described above, the connection line a between the solid-state camera 200 and the memory pack 102 is composed of a metal connector, a transmitting coil, an optical coupler, and the like. An image formed by the imaging lens 201 on the imaging surface of the solid-state image sensor 202 is converted into an electrical signal by the solid-state image sensor 202. After passing through the next stage signal processing circuit 203,
The A/D converter 204 converts it into a digital signal. After being temporarily stored in the buffer memory 205, the data is read out at a data transfer rate suitable for recording into the memory pack 102, and is recorded in the memory pack 102 via the memory back interface 206. Note that the processing contents of the signal processing circuit 203 are as follows:
Mainly, adjustments such as white balance are made.

Further, in FIG. 2(b), 207 is a digital data serial-parallel conversion circuit, and 208 is an interface circuit with the memory pack 102 (other configurations are the same as in FIG. 2(a)). The connection isb between the solid-state camera 200° and the memory pack 102 is composed of a metal connector, a transmitting coil, an optical coupler, etc., as described above. The solid-state image sensor 2 is captured by the imaging lens 201.
The image formed on the imaging surface of 02 is captured by the solid-state image sensor 20.
2 into an electrical signal. Then, after being subjected to processing such as white balance in the next stage signal processing circuit 203, it is converted into a digital signal by the ^/[1 converter 204. In the serial-parallel conversion circuit 207, /D
A serial-to-parallel conversion process of the data string is applied to the human-powered digital signal so as to change the digital signal string that is the output of the converter 204 to a data transfer rate suitable for recording into the memory back 102. The image information from the conversion circuit 207 is then recorded in the memory pack 102 via the memory back interface 208.

Although omitted in the above explanation, 8/[+Converter 2
The human input signal to 04 is the pixel output of the solid-state image sensor 202 as it is, or the same pixel output is converted into a luminance/color difference signal or NT.
Sf: Any signal converted to a signal may be used.

FIG. 3 shows the configuration of a reproducing device used for reproducing image information captured and stored by the solid-state camera described above.

In FIG. 3, 102 is a memory pack in which video signals are already recorded, 301 is a memory back interface, 302 and 304 are signal processing circuits, and 303 is a D/
An eight-way converter 305 is a digital output interface circuit.

In the memory bag reproducing machine shown by the broken line 310 having the above configuration, image information recorded in the memory bag 102 is first read out via the memory pack interface 301. After being subjected to processing such as moiré removal and color matching in a signal processing circuit 302, the signal is converted into an analog signal by a D-converter 303 at the next stage and output as a video output.

Note that if the image information recorded in the memory back 102 is not a direct sample of the video signal,
Signal conversion processing into a video signal is required before or after the D/A converter 303. Also memory back 10
If you want to output the image information recorded in 2 as a digital signal, use the memory back interface 301.
It is also possible to output the output signal via the signal processing circuit 304 and the digital output interface 305.

This digital output serves as a transmission line that does not cause image deterioration as an output signal to the transmitter and filing device shown in FIG. 1(b). However, it is assumed that errors occurring in the transmission path can be almost completely corrected by adding a sufficiently strong ECC (error correction code).

The solid-state camera system described above is characterized by eliminating the complicated mechanical mechanism from the Sv camera system.

[Problem that the invention seeks to solve]

However, the solid-state camera system as described above has the following drawbacks.

That is, a memory pack that records image information requires a very large storage capacity. Furthermore, in general, as the capacity of an IC memory increases, its cycle time becomes longer, so that it cannot keep up with the readout speed of signals from a solid-state image pickup device such as a CCD. Therefore, as shown in FIGS. 2(a) and 2(b), a buffer memory 205 or a serial-to-parallel conversion circuit 207 is required.

However, the buffer memory 205 must be a high-speed processing type memory that can adapt to the signal readout speed from the solid-state image sensor 202, which increases the cost.
It is also disadvantageous to downsizing the camera. Furthermore, the addition of the serial-parallel conversion circuit 207 results in an increase in the number of signal lines with the memory pack. Furthermore, even if a serial-parallel conversion circuit is provided within the memory pack, this will conversely increase the cost of the memory pack.

An object of the present invention is to provide a solid-state camera that eliminates the above-mentioned conventional drawbacks.

(Means for Solving the Problems) The present invention includes an image sensor, a serial image information signal storage means detachably connected to the main body, and a device that controls the transfer speed of the serial image information signal read out from the image sensor. The present invention is characterized by comprising a control means for storing the signal in the storage means without changing the time axis.

[Effect]

According to the present invention, the transfer rate of the serial image information signal read out from the image sensor is controlled and the signal is stored in the storage means without changing the time axis.

〔Example〕

FIG. 4 shows an embodiment of a solid-state camera according to the present invention. In FIG. 4, 401 is an imaging lens, and 402 is a solid-state image sensor that has the effect of accumulating signal charges, such as BASIS (BASIS).
SE 5TORED IMAGE 5ENSOR (see JP-A-60-12759), etc. 403 is a signal processing circuit, 404 is an A/D converter, 405 is a memory back interface, and 102 is a memory back.

Note that a broken line 410 indicates the solid-state camera body.

On the wood grain side, by using a solid-state image sensor 402 with an accumulation effect, the reading speed of signals from the solid-state image sensor 402 and the data transfer speed to the memory pack 102 are matched. That is, in FIG. 4, the solid-state image sensor 402 which has an accumulation effect has less signal deterioration due to dark current and the like like a CCD, and therefore can read out signals without deterioration at a somewhat slow readout speed. Therefore CC
There is no need for time axis conversion using a buffer memory (FIG. 2(a)) or serial-to-parallel conversion processing (FIG. 2(b)) as in the case of using I). Therefore, as shown in FIG.
The signal processing circuit 403 adjusts the white balance and the like for the output signal from the 02, and then converts it into a digital signal in the A/D converter 404, and then records it in the memory pack 102 via the memory back interface 405. becomes possible. As described above, it is possible to eliminate the need for buffer memories, serial-to-parallel conversion circuits, etc. as shown in FIGS. 2(a) and 2(b).

Another embodiment of the invention is shown in FIG.

This can be applied even if a solid-state image sensor such as a CCD is used.

In this embodiment, attention is paid to the fact that the output of the solid-state image sensor is an image signal, and the image signal (information) is encoded with high efficiency to reduce the data transfer speed when recording to the memory pack.

In FIG. 5, 501 is an imaging lens, 502 is a solid-state image sensor, 503 is a signal processing circuit, 504 is an A/D converter, 505 is a high efficiency encoding circuit, 506 is a memory back interface, and 1oz is a memory pack. .

In FIG. 5, the output signal of the solid-state image sensing device 502, which has been converted into a digital signal via a signal processing circuit 503 and an A/D converter 504, has redundant components removed in a high-efficiency encoding circuit 505. The most effective encoding method for this high-efficiency encoding circuit 505 is a method that utilizes the correlation of image information to remove spatial low frequency components of the image signal. For example, Dt'CIA (Dif
ferential Pulse CodedModu
(ration), vector conversion, and various types of conversion coding, among which the PCM method is the most suitable because both coding and decoding can be realized with a small-scale circuit configuration.

As described above, by highly efficient encoding the digital image information signal in the high efficiency encoding circuit 505, the solid-state camera 4
The transfer rate of information from 10 can be reduced to a transfer rate that can be recorded to memory pack 102, and therefore,
Image information from high efficiency encoding circuit 505 can be recorded in memory pack 102 via memory back interface 506.

In this case, it is necessary to insert a high-efficiency encoding decoder when reproducing image information from the memory pack 102. In addition, the high-efficiency encoding circuit housed in the solid-state camera body can be configured with a relatively small-scale circuit such as a DPCM system, so it is not suitable for conventional solid-state cameras that must accommodate large-capacity buffer memories. This can contribute to the miniaturization of comparative cameras. Furthermore, since video redundancy is suppressed, the memory capacity of the memory pack can be saved.

As described above, according to the first embodiment of the present invention, it is possible to record image information in a memory pack without providing a buffer memory as a time axis converter or a serial-parallel conversion circuit inside the solid-state camera. Become.

Further, according to the second embodiment, by incorporating a high-efficiency encoding circuit that can be realized with a small-scale circuit configuration in place of the buffer memory or serial-parallel conversion circuit, data transfer between the solid-state image sensor and the memory back is achieved. Not only can this be matched with the speed, but the amount of information in the image can be reduced, saving the storage capacity of the memory pack.

〔Effect of the invention〕

As explained above, according to the present invention, it is possible to provide a low-cost solid-state camera with an extremely simple configuration.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of the first embodiment of the present invention, Fig. 2 is a block diagram of the second embodiment of the invention, Fig. 3 is a conceptual diagram of a solid-state camera, and Fig. 4 is a conventional A block diagram of a solid-state camera. FIG. 5 is a block diagram of a reproducing device for stored image information of a solid-state camera. 402: Solid-state image sensor with accumulation effect. Figure 1

Claims (1)

[Scope of Claims] 1) an image sensor; storage means for serial image information signals detachably connected to the main body; A solid-state camera characterized by comprising a control means for causing the storage means to store data without changing the time axis. 2) The solid-state camera according to claim 1, wherein the image sensor has a signal charge accumulation effect, and the control means controls a readout speed of the image sensor. 3) The solid-state camera according to claim 1, wherein the control means encodes an image information signal read out from the image sensor.