JPS63268275A - Schottky barrier width control transistor - Google Patents

Abstract

PURPOSE:To operate the title transistor by modulating the level of tunnel current running from a metallic side to an n type semiconductor by a method wherein a metal is adopted in a feeding region of a transistor carrier to change the width of Schottky barrier formed on the interface between a metal and the n type semiconductor. CONSTITUTION:Figures 1, 2, 3 and 4 respectively represent a collector region on a GaAs substrate, a running region of electrons injected from an n<-> layer provided in contact with a base region, an n<+> GaAs layer 3 and an n<-> Ga1-xAlxAs layer 4 with the impurity density specified to be 1X10<14>-1X10<17>cm<-3>. A metallic emitter region 5 forms a Schottky junction with the n-Ga1-xAlxAs layer 4. Outer base regions 6, 6' of p<+>-GaAs change the Schottky barrier width by injecting holes into the front of Schottky junction. 7, 8, 8' and 9 respectively represent an emitter electrode, a base electrode, and a collector electrode. The electrodes 7, and 8, 8' are electrically insulated from one another by an insulating layer 10. In such a constitution, the concrete requirements to operate a device shall be the three points i.e. the height of Schottky barrier, the impurity concentration and thickness of n-GaAs layer 3 as well as the composition and thickness of n-Ga1-xAlxAs layer 4.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention is a semiconductor device that has a large current drive capability and is capable of high-speed switching even at the limit of semiconductor device miniaturization, and which modulates the Schottky junction barrier width. The present invention relates to a Schottky barrier width control transistor that modulates the magnitude of a tunnel current passing from a metal to a semiconductor by injecting enough carriers from a control region to do so.

[Conventional technology]

BACKGROUND ART Conventionally, as transistors whose operating principle is to control the amount of carrier injection, there are bipolar transistors (hereinafter abbreviated as BPT) and static induction transistors (hereinafter abbreviated as SIT). In particular, the St BPT has achieved a device with high speed and large current drive capability by miniaturizing the device and shortening the emitter width using self-line technology (T,
5akai + et al, rElectroni
cs Letters+vo1.19+ AL p, 2
83-284 +1983,). These devices have been introduced as ultra-high speed switches in the field of converters or communication between converters.

On the other hand, compound semiconductor devices such as GaAs and InP, which have high electron mobility, have not yet demonstrated their high speed performance in the field of semiconductor devices for integrated circuits. The reason for this is said to be that a device that can flow a large current, that is, has a high transfer conductance, has not been realized, and the development of hetero BPTs is progressing.

The amount of information to be processed in the advanced information society that is about to be built in the future is enormous, and dramatic improvements in the performance of these devices are expected. The main performance required here is ultra-high speed operation, but in order to increase the speed it is essential to miniaturize the elements and increase the effective current density accordingly.

Up to now, efforts have been made to increase the speed of BPT with the aim of increasing the cut-off frequency and reducing parasitic elements. Specifically, the goal is to form shallow emitter-base junctions, shorten emitter widths, miniaturize elements, and introduce heterogeneous emitters, all while improving and miniaturizing the structure to an ideal structure with no inactive regions. be.

Currently, in order to improve the performance of transistors whose operating principle is to control the amount of carrier injection in the future, it is effective to create devices that can operate even when miniaturized to the extreme, can flow large currents, and have large transfer conductance (gm). It is said that

Considering ultimate miniaturization, a transistor whose operation principle is carrier injection amount control will not operate unless at least the conductivity type of the carrier supply region can be accurately determined. Therefore, one indicator of ultimate miniaturization is how many impurities can be densely added into the semiconductor crystal in an electrically active state.

In addition, in a potential distribution controlled transistor such as a BPT, the amount of carrier injection is expressed by the following equation.

n@o-q/KT (vbi-vbe) where ne is the electron concentration in the emitter region, vbi is the emitter-base diffusion potential, vbo is the base applied voltage, and Kit
, yl-” Lutzmann constant, T is the absolute temperature, i.e.
As long as a sufficiently high concentration of carriers exists in the carrier supply region, the amount of injected carriers can maintain an exponential increase up to a sufficiently large amount. Therefore, in order to realize a high-performance transistor that can flow a large current in a small area, it is essential to form an emitter with an ultra-high impurity density.

The limit of the density of electrically active impurities in a semiconductor is determined in principle from the band structure, and the larger the density of states in the conduction band, the more advantageous it is. Although the high electron mobility and the large density of states in the conduction band are contrary to each other, compound semiconductors such as GaAs and InP, which have high electron mobility, have a small density of states, and have a high electron concentration of 1 x 1019cJIL-' or more. area cannot be realized. Therefore, even if GaAs or InP-based compound semiconductor heterogeneous BPTs are realized, miniaturization and high g
M-ization naturally has its limits.

Among conventional semiconductors, 81 is GaAB and I
It has a larger density of states than high electron mobility compound semiconductors such as nP, and is suitable for miniaturization. In the case of Sl, a region with an electron concentration of about 5×10 20 α −3 is formed when considering the reduction in the forbidden width in a degenerate semiconductor.

Still, the average spacing of impurity atoms at this time is about 13 or so, and if about 10 impurity atoms are required on average when viewed in the -dimensional direction, the dimension of the carrier injection region is at least 130X or more. There must be. On the other hand, G
In aAs, the maximum electron concentration at room temperature is usually around 5×10 α, so the average spacing between impurity atoms is around 601, and it has been pointed out that the minimum dimension of n+GaAs is limited to around 600×. "Panel Discussion", Tadahiro Omi, Semiconductor Research Vol. 20, "Basics of VLSI Technology Process", p382).

Furthermore, the flatness of the junction surface, which is important for obtaining an effective high current density device, is also related to the average distance of electrically active impurities, but the flatness of several 101 is the limit for semiconductors. Furthermore, in order to take advantage of BPTQ's large current drive capability, as miniaturization progresses, the emitter contact resistivity ρ must be increased. must be reduced.

However, in this case as well, the areal density of electrically active impurity atoms comes into play, so miniaturization of the emitter size is limited.

[Problem that the invention seeks to solve]

In this way, in conventional carrier injection amount controlled transistors that use impurity-doped semiconductors as the carrier supply region, as we push the limits of device performance, that is, miniaturization and high current density, the current If the large current drive capability that supports high-speed operation in integrated circuits cannot be maintained, the integrated circuits will cease to function.

The present invention has been made in view of the above circumstances, and by proposing a transistor that uses metal in the carrier supply region and has a new method for controlling the amount of carrier injection,
It operates even when miniaturized to the extreme, has a large current drive capability because it can obtain a sufficiently large injection current density from the carrier supply region, and uses tunnel injection, so it has no carrier accumulation effect and is high-speed Schottky. An object of the present invention is to provide a barrier width control transistor.

[Means and effects for solving the problem] The present invention employs metal in the carrier supply region of the transistor, and
The most important feature is that by changing the width of the Schottky barrier formed at the interface of the n-type semiconductor, the magnitude of the tunnel current flowing from the metal side to the n-type semiconductor can be modulated to obtain transistor operation. Since the density of states of metals is sufficiently larger than that of semiconductors, a large tunnel current can be extracted from the emitter.

Specifically, a reverse bias voltage is applied to a Schottky junction formed by a metal and a highly doped n-type semiconductor to a level just before tunnel injection occurs, and a high concentration impurity region of the opposite conductivity type adjacent to the junction is Holes are injected into the depletion layer having a positive space charge to rapidly reduce the width of the depletion layer, that is, the Schottky barrier width. This creates a probability that electrons will tunnel from the metal side to the semiconductor side, causing a large tunnel current to flow. Since this current increases exponentially with respect to the voltage applied to the opposite conductivity type high concentration impurity region, a large transfer conductance is expected. Furthermore, in order to accumulate enough holes in front of the Schottky junction to make the Schottky barrier width thin enough to cause tunnel injection, a gap gap between the metal and the n-type semiconductor is smaller than that of the n-type semiconductor. It is characterized by extending the lifetime of holes by introducing a thin film layer of a semiconductor or insulator with a large amount of ions.

Therefore, in a transistor whose operating principle is to control the amount of carrier injection, a metal with a free electron density about two orders of magnitude larger than that of a conventional semiconductor doped with impurities is used as the carrier supply region. , it is possible to operate even when miniaturized to a scale of several tens of times,
A sufficiently large injection current density can be obtained from the carrier supply region. Furthermore, if metal is used in the carrier supply region, it is possible to achieve junction flatness on the atomic order, which is advantageous for obtaining an effective high current density device. Also,
Since the current flowing from the source is a tunnel current, there is no carrier accumulation effect between the potential barrier and the source or emitter, which was seen in the conventional method of injecting carriers by overcoming the potential barrier using thermal energy, resulting in ultra-high-speed operation. suitable for

Conventional tunnel injection type semiconductor devices include ``tunnel injection controlled type semiconductor devices (see Japanese Patent Application Laid-open No. 75464/1983)'' and ``tunnel injection type static induction transistors'' (
(See Japanese Patent Laid-Open No. 61-43479) has been proposed. In these proposals, in the case of a Schottky junction, the amount of carrier injection can be increased to 16 by changing the potential barrier distribution in front of the Schottky junction using the electrostatic induction effect of the seven electrodes.
1. However, when bias is applied to the dart, a thermal electron emission current with a low barrier height begins to flow due to the Schottky effect. In the method of injecting carriers by using thermal energy to overcome a potential barrier, a carrier accumulation effect exists between the potential barrier and the source or emitter, which is one of the factors that limits the speed during ultra-high-speed operation.

In principle, there are two ways to change the magnitude of tunneling current through a barrier: changing the barrier height and changing the barrier width, but controlling the barrier width is advantageous in suppressing thermionic emission. This is because, in principle, it is possible to suppress the thermionic emission current and allow only the tunnel current to flow if the barrier height is maintained sufficiently and only the barrier width is made thin. Therefore, the Schottky barrier width control employed in the present invention is essentially effective in causing pure tunnel injection. In the present invention, by introducing a thin layer of semiconductor or insulator with a large forbidden band width between the Schottky junction of the metal and the n-type semiconductor, the influence of the mirror image force is reduced and the Schottky barrier height is reduced. Since the Schottky barrier height is prevented from decreasing, even when a reverse bias is applied or holes are injected, the Schottky barrier height hardly changes, making it possible to cause pure tunnel injection.

〔Example〕 Embodiments of the present invention will be described in detail below with reference to the drawings.

[Embodiment 1] FIG. 1 is a sectional view showing an embodiment of a Schottky barrier width control transistor using GaAs as a base material according to the present invention. In FIG. 1, 1 is a region of the GaAs substrate that becomes the collector, and 2 is an n region provided in contact with the base region.
It is preferable that the impurity density be as small as possible in order to avoid scattering of the injected electron traveling region in a single layer, and the impurity density is determined so that it is depleted during operation. 3 is an n-GaAs layer, 4
is an n Ga I x Al x As layer, and the impurity density is l
10'' to -3 of 1×1017.

3 and 4 relate to tunnel implantation in the base region.

5 is a metal emitter region, 4 n-Ga1-xAlx
A Schottky junction is formed with the Al1 layer. 6 and 6'ij: in the external base region of p+-GaAa,
From here, holes are injected into the front surface of the Schottky junction to change the Schottky barrier width. Impurity density is IXIQ19cm
' or more. The spacing between these external base regions 6 and 6' is determined by the impurity density of the n+GaAs layer 3, and needs to be narrow in order to effectively control the front surface of the Schottky junction and extract current. For example, 0.1μ
As in m. 7 is an emitter electrode, 8 and 8
' is a base electrode, and 9 is a collector electrode.

The electrodes 7, 8, 8' are electrically insulated from each other by an insulating layer 10.

Here, specific conditions for operating the device having the above structure based on the principle proposed in the present invention will be described in detail.

These design conditions also apply to devices using St as a base material, which will be described later.

In order to suppress carrier injection from the emitter to the base to achieve pure tunnel injection by suppressing the thermionic emission component, and to control the amount of tunnel injection by injecting holes from the external base region, consideration must be given to the factors described below. is necessary. 1.
Setting the Schottky barrier height, 2.3 n-GaAs
Setting the impurity concentration and thickness of the layer, 3:4 n Ga 1
xA 1 xA 8 layer composition and thickness settings.

These are the three points above. These are not independent factors but depend on each other. They will be explained in order below.

First, the setting of the Schottky barrier height will be explained. The Schottky barrier height for semiconductors is determined by the type of metal material. Once the impurity concentration on the semiconductor side is determined, a higher barrier height is advantageous for tunnel implantation with a thinner barrier width. Further, the higher the barrier, the better in terms of suppressing thermionic emission current. However, if it is too high, a very high electric field strength is required to cause tunnel injection.
It becomes difficult for holes to accumulate in front of the Schottky junction. Therefore, a metal material having a Schottky barrier height of about 1 eV is desirable. For the n-Ga, It has a barrier height of OeV and is a suitable material. For n-GaAs, Ag r A
u + Pt is Pt, Ir for n-81
S+ forms a high barrier.

Next, the setting of the impurity concentration and thickness of the n-GaAs layer in No. 3 will be explained. In order to perform pure tunnel injection by applying a reverse bias to the Schottky barrier, it is necessary to suppress the thermionic emission current from the metal side and suppress the multiplication of carriers due to impact ionization in the depletion layer. Regarding the former, one way to suppress the thermionic emission component of the total injection current is to increase the Schottky barrier and increase the impurity density of the semiconductor. Regarding the latter, it is sufficient to focus on the fact that the strong electric field region must exist for a certain length in order for the avalanche current to flow, and to make the strong electric field depletion layer region thin. Considering the above points, n+-GaAs Jfi
It is desirable that the impurity concentration of 5.9×10 cIn is approximately 1×1018 cm−3 or higher.
There is a report that a tunnel current density of 1 × 10 ACIn was obtained by applying a reverse bias voltage of 7.5 V to a GaAs-Pt no-Schottky junction ("Tannet", Tadahiro Futami, Semiconductor Research Vol. 13, "Ultra High Frequency Oscillation”, p102-1
o3).

Also, as stated in the above report, the thickness of the region involved in tunnel injection is around 100X, so n
- It is sufficient for the thickness of the GaAs layer to be several hundred times larger.

Finally, the composition and thickness settings of the n-Ga1-xAIXAs layer 4 will be explained. This layer is provided so that when a strong reverse bias is applied to the Schottky junction, holes injected from the external base region are not instantaneously recombined at the Schottky junction interface, but instead accumulate at the front surface of the junction. Furthermore, it exists to prevent the Schottky barrier height from decreasing due to mirror image forces. In order to sufficiently accumulate holes at the interface with the n"-GaA+s layer of 3, it is desirable to have a valence band jump (ΔEv) of 0.5 to 1.QeV or more. Conversely, in order not to inhibit tunnel injection, conduction It is desirable that the band jump (ΔEo) be small.

Here, ΔEv and ΔEc correspond to the portions shown in FIG. 3 (,), which is an energy band diagram of this embodiment.

When x = Q composition, ΔEv = 0.5 eV, Δ
EC=0.2 eV, which almost satisfies the above conditions. On the other hand, the thickness must be sufficiently thinner than the depletion layer width for materials with little conduction band jump, and must be limited to at least 100X or less for materials with large conduction band jump.

The depletion layer W is W= (2e8/qND” (Vb, −V−kT/
q))", where 68 is the dielectric constant q of the semiconductor.
is the unit charge amount, ND is the impurity density in the semiconductor, vb is the diffusion potential, ■ is the applied voltage, k is the Portzmann constant, and T is the absolute temperature. Total of 5.9X1017σ-6-GaAs
Since the depletion layer width W when applying a reverse bias of 7.5 V to the Schottky junction of The thickness should be about 150X.

FIG. 2 shows the electric field strength distribution of an embodiment of the Schottky barrier width control transistor configured as described above. 2 shows an electric field intensity distribution when viewed in the direction of line A-B in FIG. 1. FIG. In the figure, (1) is the emitter region, (■) is the nGa 1xA 1xAtx base region, (II
) is n-GaAs base region, (IV) is n-GaA
The s-electron travel region and (V) correspond to the n''-GaAs collector region, respectively. A high electric field strength due to reverse bias is achieved at the Schottky junction interface to induce a tunneling effect. However, at several hundred kV/ The width W of the depleted region having an electric field strength of α is made small so as to satisfy the following condition.

, fwCL (E) dx <1 Here, α(E) is the ionization rate of electrons or holes when the electric field strength is E. Further, the electric field strength in the electron travel region is set to several tens of kV/cm so that carriers travel at a saturation speed.

Next, an energy band diagram of an example of a Schottky barrier width control transistor is shown in FIG. A- in Figure 1
This is a band diagram when viewed in the B-line direction. In the figure (D
is the emitter region, (n) is the n-Ga1-xAlxA3 base region, where x = Q, (1) is the n-Ga
The As base region, (IV) correspond to the n-GaAs electron transit region, and (V) correspond to the n''-GaAs collector region. Figure 3 (a) shows an equilibrium state in which no voltage is applied to each electrode. A Schottky barrier (φB) is formed between the emitter and base, and the depletion layer extends to the n″-GaAs base region of (III). In the depletion layer, ionized donors exist as space charges.

Next, a reverse bias voltage (■...) is applied to a level just before electron tunneling occurs between the emitter and collector. The band diagram at this time is shown in (b). In this state, the band diagram when a forward bias voltage is applied to the base electrode is (c
). In the depletion layer, holes injected from the external base region accumulate at the front where there is a jump in the valence band.
The depletion layer shrinks. As a result, the electrons at the Fermi level in the emitter region
Exit to the area.

Thereafter, the electrons are accelerated by the electric field and reach the collector region.

[Embodiment 2] Although FIG. 1 shows a transistor of the present invention having a vertical structure, the transistor of the present invention can also be structured as a lateral type which is advantageous for integration. FIG. 4 shows a lateral type structure when Si, which is advantageous for miniaturization as described above, is used as the host material. 11 is a p-type S1 substrate (the impurity density is 1012~IQ
17cm'), 12 is the collector region of the layer-st (the impurity density is 1019 to 1021α-3), and 13 is the n-8i layer provided in contact with the base region, which is the electron travel region (the impurity density is 1012 to 1017cm- 3), 14.15
is involved in tunnel implantation in the base region.

14 is an n-8i layer (the impurity density is 1.017 to 1019
crn'), 15 is a single crystal thin film layer of a semiconductor or an insulator having a wider bandgap than St, which can be epitaxially grown on single crystal St, or a very thin St oxide film. however,
As a thin film material, when a reverse bias is applied to the Schottky junction, the band jump (ΔE
v) and has a small jump (ΔEo) on the conduction band side. Furthermore, it is desirable to use a material that has good lattice matching with Si and can form a high-quality interface with little electron-hole pair recombination current at the interface.

In semiconductors, materials that may satisfy these conditions include 0l-xSSiXCl-x, 5ixGeyC7
, 5ixSr1-XO1 insulator, SrO, 5rxBa
There is 1-XO.

On the other hand, it is also effective to use a Si oxide film for this layer, which has a large forbidden band width but has a good interface with the single crystal 31.

However, it is necessary to make the film thinner than 100X so as not to inhibit tunnel injection. Reference numeral 16 is a metal or crystalide emitter region, which forms a Schottky barrier between it and the layer 15. The barrier height at this time is several eV or less in order to draw out a sufficiently large tunnel current, and in some cases it is l
It should be about eV.

Therefore, such a metal material is selected.

17, Z 7' is p+-st for hole injection
external base region (the impurity density is 1019-1021c)
TL-6, 18 is emitter region, 19, l9'
is a base electrode, and 20 is a collector electrode. These electrodes are electrically insulated from each other by an insulating layer 21. The insulating layer 21 also serves as lateral electrical insulation from other elements.

The design conditions under which a device with the above structure operates according to the principles proposed in the present invention are the same as those described for devices using GaAs as a base material, and the following considerations must be taken into account. 1. Setting the Schottky barrier height, 2.14
Setting the impurity concentration and thickness of the n-8i layer, S of 3,15
Selection of a semiconductor material or insulating material with a forbidden band wider than t and setting of its thickness. These are the three points.

The electric field strength distribution and energy band diagram of the embodiment of the lateral Schottky barrier width control transistor constructed as described above are the same as those shown in FIGS. 2 and 3 already shown.

5 shows an electric field strength distribution and an energy band diagram when viewed in the direction of line A-B in FIG. 4. FIG. However, in these figures, (I) is the emitter region, (II) is the semiconductor or insulator layer with a wide bandgap, (III) is the layer to St base region, and (IV) is the n-8i electronic region. , (V) is n
-8t collector regions respectively.

〔Effect of the invention〕

As described above, according to the present invention, by proposing a transistor that uses metal in the carrier supply region and has a new method for controlling the amount of carrier injection, it can operate even when miniaturized to the extreme, and Since a sufficiently large injection current density can be obtained from the supply region, it has a large current drive capability, and since tunnel injection is used, there is no carrier accumulation effect, and a high-speed semiconductor device can be realized.

In particular, by constructing the transistor of the present invention from a compound semiconductor with high electron mobility, it overcomes the inherent problem of the material that a region with high electron concentration cannot be formed by adding impurities, and allows a large current to flow in a small amount. Therefore, a transistor with high speed and large transfer conductance can be realized.

Furthermore, by constructing Si crystals with excellent microfabrication properties, we can overcome the miniaturization limitations of conventional semiconductor devices that form carrier supply regions by adding impurities, and create semiconductor devices for high-performance integrated circuits, that is, ultra-fine semiconductor devices. It is possible to realize a high-speed device that can flow a large current.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view showing an embodiment of a Schottky barrier width control transistor using GaAs as a base material according to the present invention, and FIG. 2 is a diagram showing the electric field intensity distribution of an embodiment of the Schottky barrier width control transistor. . FIG. 3 is an energy band diagram of an embodiment of a Schottky barrier width control transistor, and FIG. 4 is a sectional view showing an embodiment of the transistor of the present invention configured in a lateral type. 1-n GaAs substrate, 2・-n single layer, 3-n+
-GaAs layer, 4...n Ga1□AlxA3 layer,
5... Metal emitter region, 6.6... p-GaA
s external base region, 7... emitter electrode, 8, 8'
...Base electrode, 9...Collector electrode, 10...
Insulating layer, 11... p-type Si substrate, 12... n −
8l collector region, 13...n-8l layer (electron travel area), 14.15... base region, 16...
Emitter region of metal silicide, 77, 17'
... External base region of ridge-8t, 18... Emitter electrode, 19°19'... Base electrode, 20... Collector electrode, 21... Insulating layer.

Claims (3)

[Claims] (1) A collector region, an electron travel region provided in contact with this collector region, a base region including a high impurity density semiconductor region provided in contact with this electron travel region, and a base region including a high impurity density semiconductor region provided in contact with this electron travel region; and an emitter region formed of metal or silicide that supplies carriers to the base region, and the amount of carrier injection is determined by a Schottky junction between the emitter region and the high impurity density semiconductor region of the base region. A Schottky barrier width control transistor characterized in that it is controlled by a tunnel effect produced by varying the width of a Schottky barrier. (2) In the high impurity density semiconductor region of the base region,
A highly impurity-density semiconductor region of an opposite conductivity type is provided adjacent to the Schottky junction, and the Schottky barrier width is varied by carriers having an opposite sign to the carriers injected from this region. Schottky barrier width control transistor according to item 1. (3) between the Schottky junctions, the width of the depletion layer of the electron travel region formed in front of the Schottky junction is sufficiently thinner and the forbidden band width is larger than the high impurity density semiconductor region; 2. The Schottky barrier width control transistor according to claim 1, comprising a semiconductor or insulator layer in which the difference in band width is mainly a jump in valence electrons.