JPS63267025A - Device for alarming article left behind - Google Patents

Abstract

PURPOSE:To reduce current consumption by operating intermittently both a transmission circuit and a reception circuit. CONSTITUTION:A transmitter 1b is provided with an intermittent signal generating circuit 7, a switch means (transistor (TR)) 8 converting the transmission signal into an intermittent transmission signal by an intermittent signal and a transmission circuit 4. Moreover, a receiver 11b is provided with a synchronism detection circuit 18 detecting synchronously the intermittent signal while using the intermittent transmission signal and a switch means (TR) 19 controlled by a synchronism detection signal from the synchronism detection circuit 18 and the switch means 19 controls switchingly a reception circuit 21 into the continuous operation and the intermittent operation depending on the presence of the synchronism detection signal. Thus, the current consumption of a transmitter-receiver is reduced remarkably and crosstalk is prevented to the utmost even at the use of a carrier signal of the same frequency.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an improvement in a lost item alarm device comprising a transmitter and a receiver.

[Conventional technology]

In order to prevent valuables such as bags, document cases, and wallets from being misplaced or lost, conventionally, as shown in Fig. 2, a transmitter 1 is attached to the valuables 1x, and a receiver 11 of a small mobile phone is used. There has been provided a lost item alarm device as shown in FIG. 2, which receives the radio waves from the transmitter 1 and issues an alarm when the receiver 11 becomes unable to receive the radio waves from the transmitter 1. (For example, JP-A-60-
(Japanese Patent No. 200395) A conventional lost item alarm device will be explained with reference to FIG.

1a is the transmitter of the lost item alarm device, 2 is the transmitting antenna, 6
is a recognition signal generation circuit; 4 is a transmission circuit; the recognition signal generation circuit 3 generates a recognition signal Sml with a modulation signal frequency fm;
The transmission circuit 4 oscillates a signal with a carrier frequency fc, modulates it with a recognition signal Sml of a frequency fm, and outputs a carrier signal Sc, which is a transmission signal.

The carrier signal Sc is then emitted as a radio wave by the transmitting antenna 2. 11a is a receiver for a forgotten item alarm device, 1
2 is a receiving antenna, 16 is a demodulation circuit, and 14 is a frequency fm
15 is a recognition signal detection circuit that outputs a determination signal ph at H level when it detects the demodulated recognition signal Sm2, and 16 is an alarm signal generation circuit that generates an alarm signal Sk when the determination signal ph is at L level. , 17 is a piezoelectric buzzer which is an audible alarm generating means for issuing an alarm by means of an alarm signal Sk, and 21 is a receiving circuit composed of the demodulation circuit 13 and the bandpass filter 14.

When the transmitter 1a and the receiver 11a are sufficiently close, the carrier signal Sc emitted as a radio wave is received by the receiving antenna 12, and the demodulated signal Sd demodulated by the demodulation circuit 16 passes through the bandpass filter 14 and is demodulated at the frequency fm. recognition signal S
m2 occurs. The demodulated recognition signal Sm2 is determined by the recognition signal detection circuit 15 and the H level determination signal Ph is sent to the alarm signal generation circuit 16, so that no alarm signal Sk is generated.

Next, the operation when the valuable item 1X shown in Figure 2 is left behind and the radio waves from the transmitter 1 no longer reach the receiver 11 carried by the user is shown in Figure 3.
This will be explained using figures.

Since the carrier signal Sc modulated by the recognition signal Sm1 emitted from the transmitter 1a does not reach the receiver 11a,
The demodulated signal Sd of the receiver 11a does not include the component of the frequency fm of the recognition signal Sm1. Therefore, the signal passing through the bandpass filter 14 is very small, and the recognition signal detection circuit 1
5, the recognition signal cannot be determined. Therefore, the judgment signal ph is L
At this level, the alarm signal generating circuit 16 outputs an alarm signal Sk, and an acoustic alarm is generated from an acoustic alarm generating means such as a piezoelectric buzzer 17 to notify the person carrying the receiver 11a that the transmitter 1a has left the transmitter 1a.

[Problem that the invention seeks to solve]

As described above, the conventional lost item alarm device issues an alarm when the receiver 11a is unable to receive the carrier signal Sc transmitted by the transmitter 1a. Therefore, the transmitter 1a must continue transmitting radio waves without stopping. However, if the transmitter 1a continues to transmit radio waves, the transmitter 1a
Type a consumes a lot of current and has a short battery life. In addition, providing multiple frequencies fc of the carrier signal Sc to prevent interference increases the burden on mass production, and it is preferable to unify to one frequency fc under limited frequency usage conditions, but in this case, the carrier signal Sc If Sc is being transmitted continuously, when the transmitter 1a of another person's left behind alarm device approaches the receiver 11a of your own left behind alarm device, there will be interference, and the transmitter 1a of your own left behind alarm device will be far away. It may not alert you even if you move away. Further, when the receiver 11a is continuously operated, the current consumption is large and the battery life is short.・ Conventional lost item alarm devices have the above problems.

The purpose of the present invention is to significantly reduce the current consumption of the transceiver,
The present invention provides a transmitter/receiver device that can prevent interference as much as possible even when using carrier signals Sc of the same frequency.

[Means for solving problems]

In order to achieve this object, the present invention has the following configuration.

That is, a transmitter includes a recognition signal generation circuit that generates a recognition signal, a transmission circuit that generates a carrier signal, modulates the carrier signal with the recognition signal, and outputs it as a transmission signal, and a transmitter that receives the transmission signal from the transmitter. a receiving circuit that demodulates the recognition signal, a recognition signal detection circuit that determines the presence or absence of the recognition signal and generates a determination signal, an alarm signal generation circuit that generates an alarm signal based on the determination signal, and outputs an audible alarm signal in accordance with the alarm signal. In the lost item alarm device, the transmitter includes an intermittent signal generating circuit and a switch means for converting the transmitted signal into an intermittent transmitted signal using the intermittent signal, and The receiver includes a synchronization detection circuit that synchronously detects an intermittent signal from the intermittent transmission signal, and a switch means controlled by a synchronization detection signal from the synchronization detection circuit, and the switch means detects the intermittent signal according to the presence or absence of the synchronization detection signal. The receiving circuit is controlled to switch between continuous operation and intermittent operation.

〔Example〕

Embodiments of the present invention will be described below based on the drawings.

FIG. 1 is a block diagram of a lost item alarm device showing an embodiment of the present invention, which will be explained using FIGS. 4, 5, 6, and 7. The same elements as in FIG. 3 are given the same numbers, and their explanations will be omitted.

1b is a transmitter of the lost item alarm device of the present invention, 6b is a recognition signal generation circuit of the present invention, 5 is an oscillation circuit of the transmitter, 6 is a frequency dividing circuit of the transmitter, and 7 is an intermittent signal generation circuit in the transmitting state.
Intermittent signal Ptc outputs L level. 8 is a PNP type transistor (hereinafter referred to as Trt) which is a switching means of a transmitting circuit.
) is turned ON when the intermittent signal Ptc is at L level.

11b is a transmitter of the lost item alarm device of the present invention, 18 is a synchronization detection circuit, and 19 is a PNP type transistor (hereinafter abbreviated as Trt) which is a switch means of the receiver, which receives ONt when the switch signal Prc of the receiving circuit is at L level. Circuit 21 operates. 20 is continuous/intermittent switching control means;
An intermittent switching control circuit, 22 is a receiver oscillation circuit, and 26 is a synchronous frequency dividing circuit.

FIG. 4 is a timing waveform diagram illustrating the intermittent operation of the lost item alarm device of the present invention, in which the oscillation signal 08CI from the oscillation circuit 5 is frequency-divided by the predistribution frequency circuit 6, and the recognition signal S
A pulse signal Pml having the same frequency as the frequency fm of ml is generated, passes through the recognition signal generation circuit 6b of the present invention, becomes an appropriate recognition signal Sm1, and is input to the transmitter 4. On the other hand, another frequency division signal Pt1 of the frequency dividing circuit 6 is an intermittent periodic signal of the intermittent signal Ptc, and a division signal Pt2 is a division signal that determines the operating time per intermittent operation of the intermittent signal Ptc. The frequency-divided signal Pt1 and the frequency-divided signal Pt2 of 6 are input to the intermittent signal generation circuit 7. The intermittent signal generating circuit 7 is, for example, a NAND type one-shot circuit, and outputs an intermittent signal Ptc as shown in the timing waveform of FIG. 4 based on the frequency-divided signal Pt1 and frequency-divided signal pt2.

The intermittent signal Ptc switches Trt8 and turns ON when the intermittent signal Ptc is at L level to operate the transmitting circuit 4,
The transmitting circuit 4 oscillates the carrier signal Sc, modulates it with the recognition signal Sm1, and emits it from the transmitting antenna 2 as a battery. Therefore, the transmitter 1b has the intermittent signal Ptc at L.
Intermittent operation is performed in which the carrier signal Sc modulated by the recognition signal Sm1 is emitted as a radio wave only when the recognition signal Sm1 is at the level. At this time, the intermittent operation waveform of the carrier signal Sc is shown in FIG.

The carrier signal Sc modulated by the recognition signal Sm1
is demodulated by the demodulation circuit 16 via the receiving antenna 12 into the demodulated signal Sd shown in FIG. The demodulated signal Sd passes through the bandpass filter 14 and becomes a demodulated recognition signal Sm2 having only the frequency fm component, and is input to the recognition signal detection circuit 15.

The recognition signal detection circuit 15 receives, for example, a demodulated recognition signal Sm2 including a fourth sine wave in series of a Shemite trigger circuit and a multivibrator circuit with a retrigger function, for a period T.
It is converted into a judgment signal ph which is a pulse of 2. FIG. 5 is a detailed circuit diagram of the synchronization detection circuit 18, and FIG. 6 is a circuit diagram for explaining the continuous/intermittent switching control circuit 20 in detail.

In FIG. 6, 20a is a power-on reset circuit, 20b is an intermittent operation pulse generation circuit that sets the intermittent operation timing of the receiving circuit, and 20d and 20e are NAND type latch circuits that use NAND gates to generate the continuous/intermittent switching signal Pr2. When the signal Pr8 goes to L level, the continuous/intermittent switching signal -Pr2 goes to H level, indicating that the receiving circuit is in continuous operation. Further, when the signal Pr11 goes to L level, the continuous/intermittent switching signal Pr2 goes to L level, indicating that the receiving circuit is in an intermittent operating state.

In FIG. 5, 18a is a synchronous pulse generating circuit which outputs a synchronous pulse Pr9, and synchronization is achieved at the rise of the detection signal ph when the synchronous pulse Pr9 is at H level. A delay circuit 18b has the purpose of reliably resetting the synchronous frequency dividing circuit 26 and the synchronous pulse generating circuit 18a as quickly as possible.

FIG. 7 is a timing waveform diagram explaining the synchronization detection circuit 18 and the continuous/intermittent switching control circuit 20.
Until timing tI, the power-on reset circuit 20
Since the output of a is at H level and the output signal Pr8 of NOR gate 20g is at L level, continuous/intermittent switching signal Pr
2 becomes H level through the NAND gate 20e, and N
The switch signal Prc is at L level via the OR gate 20f.

The Trr19 in FIG. 1 has the switch signal Prc at L level.
Since it is at the level, it is turned on and the receiving circuit 21 becomes operational.

Next, when the recognition signal detection circuit 15 receives the radio waves from the transmitter 1b which is intermittently operating and outputs the determination signal ph to the H level at timing t2 in FIG. The continuous/intermittent switching signal Pr2 goes to L level and enters an intermittent operation state. As the continuous/intermittent switching signal Pr2 becomes L level, the inverter 18c in FIG. 5 and the synchronous pulse Pr9 become L level -
11-Since the output of the NAND gate) 18e is at H level, the reset signal Pr1 is changed from the H level to the L level via the NAND gate) 18d and the delay circuit 18b, and the J synchronous frequency divider circuit 23 is started.

Here, the synchronous frequency divider circuit 23 generates a frequency divided signal Pr5 having the same period as the frequency divided signal Pt1 of the transmitter frequency divider circuit 6, and the frequency divided signal Pr5.
4 times the frequency divided signal Pr4 and the synchronized pulse Pr
The signal Pr6 that determines the pulse width of 9 and the intermittent operation pulse Pr
A signal Pr7 that determines the pulse width of 10 is sent out.

FIG. 8 is a timing waveform diagram illustrating the synchronization timing of the receiver 11b of the lost item alarm device of the present invention.

Here, as shown in FIG. 8, the synchronization pulse Pr9 is a signal that becomes H level in the period T3 when the determination signal ph is expected to rise, and is at a timing after the synchronization T1 after the reset of the frequency division signal Pr5 is released. -014 seconds ago, it rises to H level, and when the determination signal ph rises, it becomes L level even during the expected period T3. Further, the intermittent operation pulse Pr10 is a pulse that determines the operation period T in the intermittent operation state of the receiving circuit 21, and the timing t0 is set in consideration of the operation stabilization time of the receiving circuit before the synchronous pulse Pr9 becomes H level. This pulse is set to H level 15 seconds before , and falls to L level at the same timing as the judgment signal Ph falls to L level (after T2 from to).

The intermittent operation pulse generating circuit 20b generates the frequency divided signal Pr.
5 and the signal Pr6, the intermittent operation pulse Pr10 is set to the H level, and the NOR gate 20f continues to output the receiving circuit switch signal Prc at the L level.

The intermittent operation pulse Pr10 has a pulse width such that it becomes L level at the same timing as the timing t when the determination signal ph becomes L level, and the intermittent operation pulse Pr10 becomes L level.
Since the continuous/intermittent switching signal Pr2 is at the L level, the receiving circuit switch signal Pre goes to the H level via the NOR gate 20f, and the receiving circuit becomes inactive. Next, from Fig. 7't2 to Fig. 8 (T1'L)
) The intermittent operation pulse Pr at the timing of Fig. 7 t of the sand diameter.
10 becomes H level and the receiving circuit switch signal Prc becomes L.
The level changes and the receiving circuit 21 becomes operational.

Then, from t in Fig. 7 to timing t11 in Fig. 7 of the (TI - T4) sand diameter in Fig. 8, a synchronized pulse Pr9 is generated.
becomes H level and receives the carrier signal Sc modulated by the recognition signal Sml from the receiver 1b of the present invention at the timing st, and when the determination signal ph becomes H level, the NAND gate 18e changes to L level. Output and NAND
The reset signal Pr1 becomes H level via the gate 18d and the delay circuit 18b.

When the reset signal Pr1 becomes H level, it resets the synchronous frequency divider circuit 23 and the synchronous pulse generation circuit 18a, and the synchronous pulse generation circuit 18a sets the synchronous pulse Pr9 to the level NAND gate 18e.
The output is at H level, and the continuous/intermittent switching signal Pr2
is at the L level and the output of the inverter 18c is at the H level, so the reset signal Pr1 goes to the L level via the NAND gate 18d and the delay circuit 18b, and the synchronous frequency divider circuit 26 and the synchronous pulse generator circuit 18a are reset. It will be canceled.

In the present invention, this is called synchronization.

17 seconds after the reset release, the intermittent operation pulse Pr
10 goes to the L level, and the switch signal Prc goes to the H level via the NOR gate 20f, making the receiving circuit 21 inactive. At this time, continuous 7 quantity arrow switching signal Pr2
remains at L level.

Up to this point, after the power is turned on, the receiver 11b of the present invention receives the intermittent carrier signal Sc modulated by the recognition signal Sm1 from the transmitter 1b of the present invention, and switches from the continuous operation state to the intermittent operation state. state, hereinafter the transmitter 1b of the present invention
The intermittent operating state continues until synchronization is achieved by receiving the intermittent carrier signal Sc modulated by the recognition signal Sm1 from the carrier.

Next, an explanation will be given of the operation when the intermittent carrier signal Sc modulated by the recognition signal Sml from the transmitter 1b of this embodiment is interrupted or when the transmitter 1b is separated and radio waves no longer reach.

Since the determination signal ph does not go to H level at the timing t in FIG. 7, the determination signal ph cannot rise while the synchronous pulse Pr9 is at H level, and the NAND in FIG.
The output of the gate 18e remains at H level, the NAND gate 18d, and the delay circuit 18b.

The reset signal Pr1 remains at L level via
The synchronous frequency divider circuit 23 and the synchronous pulse generator circuit 18a are not reset. Furthermore, since the determination signal ph does not go to the H level even at the timing t, the reset signal Pr1 continues to be at the L level as at the timing t.

At this time, the synchronous frequency divider circuit 23 is not reset, so the branch signal Pr4, which is four times the branch signal Pr5, goes to H level, and the signal Pr8 goes to L level through the NOR gate 20g and passes through the NAND gate 20e to the continuous / Intermittent switching signal Pr2 becomes H level.

As the continuous/intermittent switching signal Pr2 becomes H level, the receiving circuit switch signal Prc goes to L level through the NOR gate 20f, and the receiving circuit 21 enters a continuous operating state, and the inverter 18c, NAND gate 18d,
The reset signal Pr1 is at H level via the delay circuit 18b, and the synchronous frequency dividing circuit 23 and the synchronous pulse generating circuit 18a are reset.

Next, t in Figure 7. When the intermittent carrier signal Sc modulated by the recognition signal Sml from the transmitter 1b can be received again by the receiver 11b of the present invention at the timing t2, the determination signal ph becomes H level, similar to the timing t2, and N
The continuous/intermittent switching signal Pr2 goes to the L level through the AND gates 20d and 2Qe, and an intermittent operation state is entered.

When the continuous/intermittent switching signal Pr2 becomes L level, the reset signal Pr1 is changed from H level to L level via the inverter 18c, NAND gate 18d, and delay circuit 18b, and the synchronous frequency divider circuit 26 is started. Thereafter, the intermittent operation of the receiving circuit 21 is continued again.

The alarm signal generating circuit 16 shown in FIG. 1 generates an alarm signal SK when the continuous/intermittent switching signal Pr2 is at H level, and sounds a piezoelectric buzzer 17 which is an acoustic signal generating means.

As described above, the lost item alarm device of the present invention has a receiver 11b.
from when the power is turned on to when the receiver 11b determines that it has received the intermittent carrier signal Sc modulated by the recognition signal Sm1 from the transmitter 1b. Intermittent carrier signal Sc
When it cannot be determined that the continuous/intermittent switching signal Pr2 has been received twice in succession, the continuous/intermittent switching signal Pr2 becomes H level and the piezoelectric buzzer 17 sounds to issue an alarm.

[2. Effects of the Invention] As is clear from the above explanation, according to the present invention, both the transmitting circuit and the receiving circuit, which consume a large amount of current, among the circuit configurations of the transmitter and receiver of the lost item alarm device are operated intermittently. For,
Current consumption can be extremely reduced.

Also, since the transmission signal is intermittently operated, the carrier signal Sc of another person
Even if the frequency is the same as that of the carrier signal Sc from another person's transmitter, there will be no interference with the carrier signal Sc from another person's transmitter unless the intermittent transmission timings match, and a large number of lost item alarm devices can be used at the same frequency. Therefore, frequency adjustment during production is easy and it is also effective for effective use of radio frequencies.

In addition, the receiver automatically switches between continuous operation and intermittent operation, and there is no need for external operation, making it possible to provide a transmitting and receiving device that has long battery life, excellent interference resistance, and is easy to operate. .

[Brief explanation of the drawing]

FIG. 1 is a block diagram of the lost item alarm device of the present invention, FIG. 2 is an external perspective view of the left behind alarm device, FIG. 3 is a block diagram of a conventional left behind alarm device, and FIG. 4 is a block diagram of the lost item alarm device of the present invention. A timing waveform diagram explaining intermittent operation. Figure 5 is a detailed circuit diagram of the synchronization detection circuit. Figure 6 is a detailed circuit diagram of the continuous/intermittent switching control circuit, Figure 7 is a timing waveform diagram explaining the synchronization detection circuit and continuous/intermittent switching control circuit, and Figure 8 explains the synchronization timing of Figure 7. It is a timing waveform diagram. 1.1a, 1b...transmitter, 2...transmission antenna, 6a, 6b...recognition signal generation circuit, 4...
... Transmission circuit, 7... Intermittent signal generation circuit, 11.11 a, 1 l b = receiver, 15...
... Recognition signal detection circuit, 16 ... Alarm signal generation circuit, 17 ... Piezoelectric buzzer, 18 ... Synchronization detection circuit, 20 ... Continuous / Intermittent switching control circuit. L++
J Figure 2

Claims (1)

[Claims] a transmitter comprising a recognition signal generation circuit that generates a recognition signal, a transmission circuit that generates a carrier signal, modulates the carrier signal with the recognition signal, and outputs it as a transmission signal; and a transmitter that receives the transmission signal from the transmitter. A receiving circuit that demodulates the recognition signal, a recognition signal detection circuit that determines the presence or absence of the recognition signal and generates a determination signal, an alarm signal generation circuit that generates an alarm signal based on the determination signal, and an audible alarm signal that outputs an audible alarm signal in accordance with the alarm signal. In the lost item alarm device, the transmitter includes an intermittent signal generating circuit and a switch means for converting the transmitted signal into an intermittent transmitted signal using the intermittent signal, and The receiver includes a synchronization detection circuit that synchronously detects the intermittent signal from the intermittent transmission signal, and a switch means controlled by the synchronization detection signal from the synchronization detection circuit, and the switch means detects the intermittent signal from the intermittent transmission signal according to the presence or absence of the synchronization detection signal. What is claimed is a lost item alarm device, characterized by switching control between continuous operation and intermittent operation.