JPS63266909A - Emitter follower circuit - Google Patents

Abstract

PURPOSE:To remarkably reduce the current consumption of the titled circuit by providing a differential switch between the emitter of 1st and 2nd emitter transistors(TRs) and a current source. CONSTITUTION:A complementary binary logic, for example, a high voltage level to a 1st input terminal 2 and a low voltage level to a 2nd input terminal 3, is fed respectively to the two input terminals 2, 3 in an emitter follower circuit. In this case, each input activates a differential switch composed of 3rd and 4th TRs 8, 9 through level shift circuits 11, 12. In this case, the 4th TR 9 having a base with a high voltage applied complementarily thereto is turned on and a current nearly equal to a current of a current source 10 coupled with the emitter flows to the 4th TR 9. Then the emitter of a 2nd TR 7 whose base is at a low level is decreased to the low voltage level and a low voltage level is outputted to a 2nd output terminal 3.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an emitter follower circuit that performs impedance conversion and level conversion using transistors.

BACKGROUND OF THE INVENTION FIG. 2 shows the structure of two conventional emitter follower circuits that operate complementary to each other. In FIG. 2, 1 is a power supply, 2 is a first input terminal, 3 is a second input terminal, 4 is a first output terminal, 5 is a second output terminal, 6 is a first transistor, and 7 is a The second transistor, 13, is a first current source, and 14 is a second current source.

The operation of the emitter follower circuit configured as described above will be explained below.

First, when a high voltage level is generated at the first output terminal 4 and a low voltage level is generated at the second output terminal 5, the first
When a low voltage level is applied to the input terminal 2 and a high voltage level is applied to the second input terminal 3, the first output terminal 4 is lower than the first input terminal by the base-emitter voltage due to the action of the current source 13. At the same time, the second output terminal 5 is pulled up to a voltage level lower than the second input terminal 3 by the base-emitter voltage. In this way the first
．． The second output terminals 4, 5 are connected to the first. Second input terminal 2, 3
outputs complementary voltage levels in response to complementary input voltages.

Problems to be Solved by the Invention However, in the conventional configuration described above, when the output terminal changes from low level to high level, the output terminal goes high even though there is no need to bias the emitter of the follower transistor with a current source. It has the disadvantage that it is biased with the same current source as when changing from level to low level, and current that is unnecessary for operation flows, resulting in wasted current consumption.

The present invention solves the above-mentioned conventional problems, and aims to provide an emitter follower circuit that consumes less current.

Means for Solving the Problems To achieve this objective, the emitter-follower circuit of the present invention comprises the first. A differential switch is provided between the emitter of the second emitter follower transistor and the current source, and the current source is switched to the emitter of one transistor depending on the operation of the emitter follower transistor.

Effect: With this configuration, unnecessary current can be prevented from flowing, and the number of required current sources can be reduced to one, thereby reducing current consumption.

EXAMPLE Hereinafter, an example of the present invention will be described with reference to the drawings. FIG. 1 shows an emitter in an embodiment of the present invention.
FIG. 3 is a configuration diagram of a follower circuit. In FIG. 1, 1 is a power supply, 2 is a first input terminal, 3 is a second input terminal, 4 is a first output terminal, 5 is a second output terminal, 6 is a first transistor, 7 is the second transistor, 8 is the third transistor, 9 is the fourth transistor, 10 is the current source, 11
1 is a first level shift circuit, and 12 is a second level shift circuit.

The operation of the emitter follower circuit configured as described above with respect to complementary inputs will be described below.

First, when complementary binary logic values are applied to the two input terminals of this emitter follower circuit, for example, a high voltage level is applied to the first input terminal, and a low voltage level is applied to the second input terminal. When a level is input, each input is passed through a level shift circuit 11.12 to a third. A differential switch consisting of a fourth transistor is activated. At this time, the fourth transistor 9, which has a complementary high voltage applied to its base, turns on and a current approximately equal to the current of the current source 10 coupled to its emitter flows through the fourth transistor 9, and the base becomes low. The emitter of the second transistor is pulled down to a low voltage level, and the low voltage level is output to the second output terminal.

At this time, the third transistor 8 is off, and the first
The emitter of the transistor is pulled to a high voltage level and outputs a high voltage level to the first output terminal.

On the other hand, when a low voltage level is applied to the first input terminal 2 and a high voltage level is applied to the second input terminal 3, the operation is completely opposite to the above operation, and the low voltage level is applied to the first output terminal 4. A high voltage level is output to the second output terminal 5.

As described above, according to this embodiment, a differential switch is provided between the follower transistor and the current source, and the common current source is configured to switch the emitter bias current to the transistor that requires it. This allows the number of current sources to be reduced and current consumption to be reduced.

Note that in this embodiment, the first. Second. Third. Although the fourth transistor is an NPN transistor, it may be a PNP transistor in consideration of the current circuit.

Effects of the Invention According to the present invention, a differential switch is provided between the follower transistor and the current source, and depending on the input voltage level, one current source is switched to the transistor that requires emitter bias current. This configuration reduces the number of current sources from two to one, creating an excellent emitter follower circuit that significantly reduces current consumption, especially when high-speed operation requires a large current to flow through the emitter. can.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an emitter follower circuit according to an embodiment of the present invention, and FIG. 2 is a block diagram of a conventional emitter follower circuit. 1...Power supply, 2...First input terminal,
3... Second input terminal, 4... First output terminal, 5... Second output terminal, 6...
...First transistor, 7...Second transistor, 8...Third transistor, 9...
...Fourth transistor, 10, 13, 14...
...Current source, 11...First level shift circuit, 12...Second level shift circuit. Name of agent: Patent attorney Toshio Nakao and one other person Figure 1 Figure 2

Claims (1)

[Claims] a first transistor having a base coupled to the first input terminal, a second transistor having a base coupled to the second input terminal, and a collector coupled to the first output terminal and the first transistor;
a third transistor coupled to the emitter of the transistor and having a base coupled to the second input terminal through a first level shift circuit, and a collector coupled to the second output terminal and the emitter of the second transistor. a fourth transistor having a base coupled to the first input terminal through a second level shift circuit; and a fourth transistor having one end coupled to the third input terminal.
and a current source coupled to the emitter of the fourth transistor.
follower circuit.