JP3294909B2 - Electronic switch circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic switch circuit, and more particularly to an electronic switch circuit for analog signals.

[0002]

2. Description of the Related Art FIG. 3 is a diagram showing a configuration example of a conventional electronic switch circuit. As shown in the figure, the electronic switch circuit of this configuration example includes a differential transistor circuit section, a differential circuit section, and a control circuit section (each shown by a broken line).

In the differential transistor circuit section, the emitters of a pair of transistors Q ₁ and Q ₂ and the emitters of Q ₃ and Q ₄ are commonly connected, and a constant current switching transistor (switching transistor) is provided at the emitter junction.
The collector of Q _5, Q ₆ are connected. The collectors of the transistors Q ₂ and Q ₄ are connected in common, connected to the collector of a transistor Q ₉ which is a constant current source (first constant current source), and connected to the base of the output transistor Q _10. compensation capacitor C ₁ are paired GN
It is connected between D. The collectors of the transistors Q ₁ and Q ₃ are connected to Vcc, and the bases are connected to analog input signal terminals IN1 and IN2 which can be switched.

[0004] The collector of the output transistor Q ₁₀ is connected to Vcc, with emitter connected to the pair connected to the constant current source between GND (second constant current source) I _1, a differential transistor Q as a feedback signal _2, is connected to the base of Q _4, the output signal OUT is output from an output terminal connected to the emitter of the output transistor Q _10.

The transistor Q ₁₁ , the resistor R ₇ , the transistor Q ₉ , the resistor R ₆ , the transistor Q ₁₆ , and the resistor R ₅ constitute a current mirror circuit, and supply a current substantially equal to the constant current source I ₀ to the transistor Q ₉ , the transistor Q Output from ₁₆ collectors. Here, the constant current (I _{Q9 / C} ) output from the collector of the transistor Q ₉ is expressed by the relation I ₃ : with the constant current (I ₃ ) coupled to the emitters of the transistors Q ₅ and Q ₆ :
By setting I _{Q9 / C} = 2: 1, the offset voltage of the selected pair of differential transistors can be minimized.

In the differential circuit section, the emitters of the constant current switching transistors Q ₅ and Q ₆ are commonly connected, and a constant current source I ₃ is connected to GND at the connection point.

A switching signal is applied to the differential circuit section from the control circuit section, and the bases of the transistors Q ₅ and Q ₆ are connected to the transistors Q ₁₉ and Q ₂₁ (base and collector are connected to each other to form a diode. Comprising) and a resistor R ₁
And transistors Q _20, Q ₂₂ is connected to the collector of the differential transistors Q _12, Q ₁₃ of (base, collector is connected to constitute a diode) and the resistance R ₂ and the load.

[0008] The emitter of the differential transistors Q _12, Q ₁₃ are commonly connected, is connected to the collector of the constant current output transistor Q _16. The base of transistor Q ₁₃ is applied the voltage of a reference voltage V _R1 becomes a threshold voltage which switches the input signals. The base of transistor Q ₁₂ is connected to a pair emitters and the input clipping transistor Q ₂₄ of the constant current source connected to the GND I ₂ and the input transistor Q _23.

The collectors of the transistors Q ₂₃ and Q ₂₄ are both connected to Vcc. The base of transistor Q _24, the voltage V _R2 in order to avoid the following voltage level where the base potential of the transistor Q ₁₂ are applied, V _R2
It is set to a voltage lower than V _R1. The base of the transistor Q _23, the logic level of the signal is a differential switching signal is applied.

[0010] Here, the base of the transistor Q _23, is applied a differential switching signal, when the base potential of the transistor Q ₁₂ becomes higher than V _R1, the transistor Q ₁₂ is turned on, the transistor Q ₁₃ is turned off, the transistor Q ₆ is turned on, the transistor Q ₅ is turned off. Conversely, when the base potential of the transistor Q ₁₂ is lower than V _R1, the transistor Q ₁₂ is turned off, the transistor Q ₁₃ is turned on, the transistor Q ₆ is turned off, the transistor Q ₅ is turned on. Therefore, the analog input signal terminal IN
1. The output signal OUT can be selectively output from the output terminal in accordance with the analog signal input to IN2.

FIG. 4 shows an example of an improved configuration of the electronic switch circuit shown in FIG. 3, and mainly includes input signals IN1 and IN1.
2 for expanding the input amplitude level.

As shown in FIG. 4, in the present configuration example, resistors R ₁₀ and R ₁₁ are connected to the emitters of transistors Q ₅ and Q ₆ , respectively, and transistors Q ₅ and Q ₆ are connected to transistors Q ₂₅ and Q ₂₆ ( A base and a collector are connected to form a diode) to form a current mirror configuration. Therefore, in the circuit of this configuration, the input signal IN1, to the IN2 input level, the current supplied to the emitter point of attachment of the transistors Q ₁₂ and the transistor Q ₁₃ in order to prevent the generation of offset voltage level of the output signal OUT It is set so as to be twice the collector current of the transistor Q _9.

[0013]

However, FIG. 3 and FIG.
In electronic switch circuit configuration as, first, as the first transistor Q ₁₂ is not a saturation operation, the provided transistor Q ₂₄ is a circuit for clipping the base potential of the transistor Q _12, the clip level V _R2 There is a problem that the voltage must be set.

Second, when the number of switching differentials is increased to three or more states, there is a problem that the switching circuit becomes complicated.

[0015]

An electronic switch circuit according to the present invention has a plurality of pairs of transistors whose emitters are commonly connected, and a collector of one of the plurality of transistors has a constant voltage source. And an input signal is input to the base of the one transistor, and the first constant current source and the base of the output transistor are commonly connected to the collector of the other transistor of the pair of transistors. A differential transistor circuit section to which the emitter of the output transistor connected to the second constant current source is connected to the base of the other transistor; and a commonly connected emitter of the pair of transistors, A plurality of switching transistors respectively connected to the plurality of switching transistors. And a switching circuit for selectively turning on each switching transistor at a base of each of the plurality of switching transistors and a differential circuit unit having a common connection of emitters of the transistors and connected to a reference potential via a first resistor. And a control circuit unit for applying the same, wherein the control circuit unit has the same number of insulated gate transistors as the number of the plurality of switching transistors, and the first insulated gate transistors are connected to the insulated gate transistors. A third constant current source that supplies a constant current twice as large as the constant current source described above, and a plurality of second constant current sources connected to the respective sources of the insulated gate transistor and having the same resistance value as the first resistance. A resistor and these second resistors are connected in common and connected to the collector and the base, the emitter is connected to the reference potential, and the shape is A transistor of the same shape as the switching transistor, and means for selectively turning on said insulated gate transistor,
Wherein each source of the insulated gate transistor is connected to a base of the corresponding switching transistor.

[0016]

According to the present invention, a plurality of differential transistors of the control circuit section are constituted by insulated gate transistors, and the plurality of insulated gate transistors are switched by digital signals of a plurality of bits, whereby a switching circuit is constituted. Is simplified. For example, when there are two insulated gate transistors, a CMOS inverter of opposite phase is used. When there are three or more insulated gate transistors, a decoder that decodes a plurality of logic signals is used.
The insulated gate transistor can be selectively turned on.

Further, according to the present invention, the emitters of a plurality of switching transistors are connected in common, connected to a reference potential (eg, GND) via a first resistor, and the base of each of the plurality of switching transistors is connected to the base. First
And a second resistor having the same resistance value as that of the second
Are connected to a reference potential via a transistor (collector and collector are connected to form a diode) whose resistors are commonly connected to each other to reduce fluctuations in the base potential of the switching transistor. The setting is to reduce the switching noise of the input signal.

[0018]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a circuit diagram showing a first embodiment of the electronic switch circuit of the present invention. As shown in FIG. 1, the electronic switch circuit of the present embodiment includes a differential transistor circuit section, a differential circuit section, and a control circuit section (each shown by a broken line). Note that the configuration of the differential transistor circuit is the same as that of FIGS. 3 and 4, and the same reference numerals are given and the description is omitted.

The circuit configuration of this embodiment will be described in comparison with the conventional configuration shown in FIGS. (1) As shown in FIG. 1, a resistor R ₃ (first resistor) is connected between the emitter connection point of the transistors Q ₅ and Q ₆ between GND (reference potential) and the transistors Q ₅ and Q ₆ .
Based Q _6, the resistance R ₁ (second resistor), the resistance R
₂ (second resistor), transistor Q ₇ (base and collector are connected to form a diode)
It is driven by a differential circuit composed of OS transistors Q ₁₂ ′ and Q ₁₃ ′.

With this configuration, the fluctuations in the base potentials of the transistors Q ₅ and Q ₆ during switching can be set to be relatively small as compared with the configurations shown in FIGS. .

The present embodiment will be described in comparison with the configuration of FIG. 4. In this embodiment, the bases of the transistors Q ₅ and Q ₆ are connected to the transistor Q ₇ via the resistors R ₂ and R ₁ and are connected to GND. (Reference potential) side, and
S Since the transistor Q ₁₂ ', or Q _13' transistor Q ₇ through the resistor R ₁ or resistor R ₂ from the constant current is always supplied, either the base potential of the transistor Q _5, Q ₆ of transistors Q ₇ not be lower than V _F. On the other hand, each base transistor Q ₂₆ of the transistor Q _5, Q ₆ in the configuration of FIG. 4, Q _25, resistors R _2, R
Is connected to the GND side separately through a _1, the base potential of the transistor in an off state of the transistors Q _5, Q ₆ is substantially GND level. That is, the base potential when switching transistors Q _5, Q ₆ is a conventional configuration example of FIG. 4 is will be increased from approximately the GND level, the base potential in this embodiment is raised from V _F level of the transistor Q ₇ As a result, the fluctuation of the base potential can be suppressed relatively small.

In this embodiment, the transistors Q ₅ ,
While connecting the resistor R ₃ to the emitter point of attachment of Q ₆ between pairs GND, the voltage drop across the resistor R _1, R ₂ and the resistor R _3, the transistors of the current flowing through the transistor Q ₇ Q
_5, the improvement of the current mirror accuracy to Q ₆ there is attained the effect.

The voltage drop of the resistor R ₃ depends on the collector current ratio at the time of switching of the transistors Q ₅ and Q ₆ , but it is usually sufficient to set it to about several hundred mV. (2) In the control circuit section, the differential transistor is a MOS
Transistor (insulated gate transistor) Q ₁₂ ′, Q
₁₃ 'is composed of, according MOS transistor Q _12' 'to the gate of the applied reverse phase logic signals from each other, MOS transistor Q _13', Q ₁₃ signal input to the are formed by CMOS inverters INV2 , M
The signal input to the OS transistor Q ₁₂ ′ further includes CM
It is formed by being inverted by the OS inverter INV1.

With such a configuration, a CMOS level signal can be directly applied to the input of INV2 as a switching signal, and the CMOS level input signal applied to the input of the CMOS inverter INV2 allows the MO level signal to be applied.
One of the S transistor Q ₁₂ ′ and the MOS transistor Q ₁₃ is turned on, and the other is turned off.

Note that the collector currents of the transistors Q ₈ and Q ₁₄ constituting the third constant current source flow through the MOS transistors Q ₁₂ ′ or Q ₁₃ ′ in the ON state, and from the resistor R ₁ to the transistor Q ₇ or flowing from the resistor R ₂ to transistor Q _7. The resistance values of the resistors R ₁ and R ₂ are set so that R ₁ = R ₂ = R ₃ . Also, the transistors Q ₇ , Q ₅ ,
Q ₆ is a transistor having the same shape are used. The differential current of MOS transistors Q ₁₂ ′ and Q ₁₃ ′ is set to be twice the collector current of constant current source transistor Q ₉ .

The transistor current flowing to Q ₇ becomes a collector current of the transistor Q ₅ or Q ₆ by a current mirror effect, the second analog input signal terminal IN1 or IN2
The state analog input signal can be switched.

The electronic switch circuit of this embodiment can secure a wide linear signal amplitude region of an input analog signal. V
cc side, Vcc- (voltage drop across the resistor R ₆₎ - (saturation voltage of the transistor Q ₉₎ - responds linearly to the level of (V _BE of the transistor Q _10). On the GND side, (V _{BE of} transistor Q ₂ or transistor Q ₄ ) + (saturation voltage of transistor Q ₅ or transistor Q ₆ ) + (resistance R ₃
Linear response up to the level of the voltage drop).

FIG. 2 is a circuit diagram showing a second embodiment of the electronic switch circuit of the present invention.

This circuit can switch between three states as an application example of FIG. Note that a pair of transistors Q ₁₅ and Q ₁₆ , a constant current switching transistor Q ₁₇ , a resistor R ₉ , and a MOS transistor Q ₁₄ ′ are additionally provided. In this embodiment, a CMOS circuit constitutes a decoder circuit for forming a gate signal for turning on one of the MOS transistors Q ₁₂ ′, Q ₁₃ ′, and Q ₁₄ ′ in response to a 2-bit input logic signal. It was done.

As is clear from this embodiment, according to the present invention, a multi-state electronic switch circuit having three or more states can be configured.

[0032]

As described above, according to the present invention,
A logic signal of a plurality of bits enables a configuration for switching an input analog signal of three or more states, and an electronic switch circuit with a relatively small number of elements and low switching noise can be provided.

The electronic switch circuit of the present invention can be said to be suitable for switching video signals, etc., which require high speed and reduced switching noise.

The circuit configuration is suitable for making a monolithic IC using a Bi-CMOS process capable of simultaneously forming a CMOS circuit and a bipolar circuit.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a first embodiment of an electronic switch circuit according to the present invention, which is an electronic switch circuit that switches a 2-state analog signal by a 1-bit logic signal.

FIG. 2 is a circuit diagram showing a second embodiment of the electronic switch circuit of the present invention.

FIG. 3 is a diagram illustrating a configuration example of a conventional electronic switch circuit.

FIG. 4 is a diagram showing another configuration example of a conventional electronic switch circuit.

[Explanation of symbols]

Q ₁ , Q ₂ One pair of transistors Q ₃ , Q ₄ One pair of transistors Q ₅ , Q ₆ , Q ₁₇ Constant current switching transistor (switching transistor) Q ₇ Transistor whose base and collector are connected to form a diode Q ₉ transistor Q ₁₀ output transistor C ₁ phase compensation capacitor IN1, IN2 analog input signal terminal I ₀ that constitutes the constant current source, I ₁ constant current source _{Q 11, Q 9, Q 14} , Q 8 constitute a current mirror circuit transistor _{R 7, R 6, R 8} , R 4 constitute a current mirror circuit resistance R ₁ ~R _3, R ₉ resistance Q ₁₂ to _{', Q 13', Q 14} ' differential MOS transistors

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-60-14520 (JP, A) JP-A-5-37324 (JP, A) JP-A-2-186714 (JP, A) JP-A-58-58 69117 (JP, A) JP-A-3-85804 (JP, A) JP-A-64-68121 (JP, A) JP-A-59-47841 (JP, A) JP-A-6-509215 (JP, A) (58) Field surveyed (Int. Cl. ⁷ , DB name) H03K 17/00 H03F 3/181

Claims (2)

(57) [Claims] 1. A transistor having a plurality of transistors having emitters commonly connected to each other, a collector of one of the plurality of transistors is connected to a collector of a constant voltage source, and a base of the transistor is connected to a constant voltage source. Respectively, an input signal is input, a first constant current source and a base of an output transistor are commonly connected to a collector of the other transistor of the pair of transistors, and a second base is connected to a base of the other transistor. A differential transistor circuit portion to which the emitter of the output transistor connected to the constant current source is connected, and a commonly connected emitter of the pair of transistors,
A differential circuit unit having a plurality of switching transistors each connected to a collector, connecting the emitters of the plurality of switching transistors in common, and connecting to a reference potential via a first resistor; A control circuit unit for applying a switching signal for selectively turning on each switching transistor to each base of the switching transistor; and an electronic switch circuit comprising: The same number of insulated gate transistors as the number of transistors; a third constant current source for supplying a constant current twice as large as the first constant current source to the insulated gate transistor; The first connected to a source
A plurality of second resistors having the same resistance value as the above-mentioned resistors, and these second resistors are connected in common and connected to a collector and a base, an emitter is connected to a reference potential, and the shape of the switching transistor is An electronic switch circuit comprising: a transistor having the same shape as the above; and means for selectively turning on the insulated gate transistor, wherein each source of the insulated gate transistor is connected to the base of the corresponding switching transistor. . 2. The electronic switch circuit according to claim 1,
Bi- to form CMOS circuit and bipolar circuit at the same time
An electronic switch circuit made into a monolithic IC by a CMOS process.