JPS63261580A - Off-track detecting circuit for read/write head of disk memory device - Google Patents

Abstract

PURPOSE:To improve the accuracy of the detected off-track value by converting once an analog signal serving as a read signal of the servo information into a level value signal showing the relevant level value via a level value detecting circuit and comparing the level value signal with a reference signal of a ramp- shaped waveform produced by a reference signal generating circuit via a comparator. CONSTITUTION:A level value detecting circuit 10 converts once an analog signal including plural peaks into a level value signal showing the relevant amplitude or peak value and compares this signal with a reference signal having a ram- shaped waveform, e.g., a triangular wave produced by a reference signal generating circuit 20 via a comparator 30. Thus the level value signal does not substantially suffer the influences of a fact that the peak waveform of the analog signal is considerably deformed or the peak value is varied temporarily. As a result, an off-track state can be detected with high accuracy.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention is an off-track detection circuit for a read/write head of a disk storage device. The present invention relates to an off-track detection circuit that detects an off-track with respect to a head track from an analog signal read out from a read/write head from a pair of servo information written in a pattern.

[Conventional technology]

In modern disk storage devices such as fixed disk storage devices, in order to increase storage capacity, the pinch between tracks on the disk surface has been reduced, and smaller heads have been used for reading and writing information. I came. Therefore, it is necessary to accurately control the position of the head to the correct position on the track.For this purpose, servo information is written on the disk surface and read out via the head.
The off-track amount with respect to the trunk is detected from the readout signal, and the position of the head is controlled in a closed loop to eliminate off-track.

As a means for detecting off-track from successive signals of servo information, initially the successive signals, which are AC signals, are converted into, for example, a DC signal with its peak, and then this DC signal is converted into a digital signal by an ADC. , the off-track amount was obtained as the difference between two digital signal values corresponding to servo information written on the inner diameter side and the outer diameter side of a certain trunk. However, this method requires a highly accurate ADC, which is expensive, and its operating speed is not necessarily sufficient. Therefore, we devised a way to write the servo information on the disk surface, making the servo information simple and repeating information, and writing the servo information on the inner diameter side of the trunk and the servo information on the outer diameter side in the circumferential direction of the disk. Write it in a shifted position, and from this successive signal, the ADC
It is now possible to detect off-track without going through the FIG. 5 shows an outline of a conventional off-track detection circuit corresponding to such a writing mode of servo information.

The servo information pair Sa and Sb read by the head 3 shown in the upper left of FIG. They are written on the inner diameter side and the outer diameter side with respect to the center line of the trunk shown, and are shifted from each other in the direction along the track. The front stage of this servo information output circuit is usually used for reading regular information on the trunk,
Usually, an amplifier 71 and a variable amplification factor amplifier 72 incorporated in a so-called read/write circuit are combined with an amplification factor control circuit 7.
This is an AGC amplifier circuit that combines 3. The successive signals from the amplifier 72 are of course analog signals ^S, and the sixth
When the waveform is as shown in figure (a) and the position of head 7 is off from the center of track T, two pieces of servo information S
As shown in the figure, the analog signals AS from Sb and Sb have different amplitudes.
A triangular wave ramp signal R5 as shown in FIG. The comparator 75 is connected to the analog signal AS mentioned above.
A counting pulse CP is generated by comparing the ramp signal RS and the counting pulse train CP, and the waveform of this counting pulse train CP is shown in FIG.

As can be easily understood, the difference Ca − between the number of pulses Ca in the first half of the counting pulse train CP corresponding to the servo information Sa and the number cb of pulses in the second half of the counting pulse example corresponding to the servo information sb is
The degree of off-track can be determined by Cb. Counters 77 and 78 are for counting these count values Ca and Cb,
The counting pulse train to these is switched by a changeover switch 76 which operates in synchronization with the synchronization signal SS. Count values Ca and Cb stored in counters 77 and 78
is read into the processor 9 incorporated in the disk storage device, and the difference Ca - Cb between both values is calculated. On this occasion,
The magnitude of the difference represents the off-track amount of the head, and the positive and negative signs indicate whether the off-track is on the inner diameter side or the outer diameter side.

Note that the number of repetitions of the writing pattern in the servo information pair Sa, Sb is selected to be about 100 for each servo information. The synchronization signal SS is also given to the amplification factor control circuit 73, and when the subsequent stage circuit is detecting off-track, the analog 18
so that the amplitudes of the first and second halves of the signal are not averaged.
Its AGC action is temporarily stopped.

[Problem that the invention seeks to solve]

In the conventional circuit described above, the comparator 75 plays the role of digitizing the signal, so there is no need to use an ADC, the circuit configuration is simple, and the detection operation is fast. Further, by increasing the number of repetitions of the writing pattern in the servo information, the detection accuracy can be improved. However, when this conventional circuit is actually used,
Sometimes, the off-track detection accuracy deteriorates, and head position control based on this becomes unstable. As a result of investigating the cause of this, it was found that off-track detection results may vary depending on the waveform of the peak of the analog signal, which is a successive signal of servo information. FIG. 7 shows this situation.

In the same figure (al), the peak of the analog signal AS tends to have a sharp waveform, and this peak value is the value of the ramp signal R5O.
Errors tend to occur near values that are approximately equal.

In the case shown in the figure, the comparator 75 should output four counting pulses CPI to CP4 as shown in the same figure.
As 5 approaches, the width of the counting pulse gradually becomes narrower as shown in the figure, and its height also becomes extremely small. As a result, the counting operation is no longer performed.

Another problem with the conventional means is that in order to improve off-track detection accuracy, it is necessary to increase the number of repetitions of the pattern to be recorded as each servo information. As the number of repetitions increases, the area of the servo information writing area naturally increases, and the disk surface on which regular information should be written is taken up. Furthermore,
When the peak value of the analog signal is low, as shown in Figure 6, the number of pulses in the count pulse CP decreases accordingly, so if the number is less than a few, even one error in counting will occur. If this happens, the off-track detection results will be distorted.

SUMMARY OF THE INVENTION An object of the present invention is to solve the problems of the prior art and provide an off-track detection circuit for a read/write head of a disk storage device with high detection accuracy.

[Means for solving problems]

According to the present invention, the above-mentioned object is an analog system in which pairs of servo information written on a disk surface in a simple repeating pattern offset from each other in the circumferential direction as described above are read out via a read/write head. A level value detection circuit that receives an analog signal and converts it into a level value signal that represents the amplitude of the analog signal, and a ramp-shaped reference signal that synchronizes with the rotation of the disk. a reference signal generation circuit that generates a reference signal, a comparison circuit that generates a comparison result signal that compares a level value signal value and a reference signal value and takes a state value according to the magnitude relationship between the two values, and a comparison circuit that generates a comparison result signal and a predetermined frequency. a counting pulse generation circuit that receives a clock pulse and generates a counting pulse train that is the logical product of both; and a counting pulse generation circuit that synchronizes the number of pulses in the counting pulse train with the rotation of the disk and generates a counting value corresponding to each of the pairs of servo information. and a counting means for counting the difference,
This is achieved by detecting the off-track amount and direction from the difference in count values and the magnitude relationship.

[Effect]

As mentioned above, the problem with the conventional technology was mainly due to the instability of the waveform of each peak in the analog signal as a successive signal of servo information, but the present invention focuses on this point and Instead of converting each peak directly into a digital signal, the analog signal containing multiple peaks is first converted into a level value signal representing its amplitude or peak value using the level value detection circuit of the above configuration, and then this is compared with the ramp waveform 1 generated by the reference signal generation circuit, for example, the triangular wave reference signal mentioned above, in the comparator circuit. Therefore, in the present invention as well, each servo information includes a repeating pattern, and the analog signal includes a peak waveform corresponding to each pattern.
The number of peaks it has is no longer a problem; the amplitude or height of the peaks is determined and expressed by the magnitude of the level value signal. As a specific configuration of the level value detection circuit for this purpose, for example, an analog signal including a plurality of peaks can be used as an alternating current signal, and an output voltage obtained by rectifying this can be held by a hold circuit.

In this case, since a smoothing circuit is included that removes the ripples included in the rectified waveform, the capacitors in this smoothing circuit play the role of leveling out the height of each peak, so the waveform of each peak is considerably deformed. However, the magnitude of the level value signal does not have much effect, and even if the peak height of the analog signal corresponding to the same servo information fluctuates for some reason, it will only be partially affected as long as the width of the fluctuation is not extremely large. Fluctuations are smoothed out. As another specific configuration of the level value detection circuit, it can also be configured with a so-called sample-and-hold circuit. Even in this case, it is desirable to sample the rectified output, which has been leveled at least to some extent after rectification, and hold it in a hold circuit.In any case, the magnitude of the level value signal from the level value detection circuit is It is not significantly affected by the waveform of each peak or the temporary fluctuation of its peak value.

The magnitude of the level value signal output from the above level value detection circuit has a different value for each servo information included in each servo information pair, not only when there is off-track, but these values are used by the comparison circuit. Since the magnitude is compared with the ramp-shaped signal generated from the reference signal generation circuit,
As a result, both values are converted into a time period in which the comparison result signal from the comparator circuit takes a certain state, that is, "L" or rHJ. The counting pulse generation circuit is, for example, an AND gate, which takes the AND of this comparison result signal and the clock pulse, so that the time indicating the magnitude of the level value signal mentioned above is thereby converted into the number of pulses in the counting pulse train. .

In the case of the present invention, the frequency of the clock pulse given to the above counting pulse generation circuit does not have to be the same as the frequency of the peak included in the analog signal at all, unlike the conventional case, and a higher frequency can be used as necessary. Therefore, the above-mentioned time can be converted into the number of pulses with the desired high precision. The number of pulses may be counted by a counting means such as a counter in the same way as in the past, and in this case, the number of pulses in each counting pulse train corresponding to two pieces of servo information is separately calculated in synchronization with the rotation of the disk. By having two counters count separately and then taking the difference between the counted values of both counters, or by using one up/down counter and counting the number of pulses while switching addition and subtraction in synchronization with the rotation of the disk. What is necessary is to obtain the difference in the number of pulses for two pieces of servo information.

As described above, according to the present invention, an analog signal is converted into a level value signal that is not affected by the waveform of the peak contained therein or the temporal fluctuation of the peak height, and the comparator circuit converts the level value signal By converting the magnitude into time and then converting this time into the number of counting pulses with the desired accuracy, it is possible to detect off-track with much more stable operation and higher accuracy than before. The above-mentioned intended t3 problem is solved. In addition, in the present invention, the ramp-shaped reference signal generated by the reference signal generation circuit does not necessarily have to be a triangular wave or a chevron wave as described above, but, for example, a sawtooth-shaped reference signal with two waves corresponding to both servo information. It can also be used as a wave.

As can be seen from the above description, in the present invention, it is desirable to strengthen the leveling function of the level value signal by the level value detection circuit as necessary.If the leveling function is strengthened, the analog signal will be When the amplitude of the signal changes, the ability to follow changes may drop and cause errors, so this problem can be overcome by using a reference signal that repeats the same waveform, such as a sawtooth wave. can do. Other desirable aspects of the present invention are described in the next section.

〔Example〕

Hereinafter, the present invention will be described in detail with reference to the drawings. 1st
The figure is a block circuit diagram functionally illustrating the configuration of the present invention, but before going into this, the role that the circuit of the present invention has in the disk storage device 100 will be briefly explained with reference to FIG.

A disk 1 is rotated by a spindle motor 2, and a trunk T is set on its surface, and a pair of servo information Sa and Sb is written thereon.

A plurality of pairs of servo information may be written depending on the case. A head 3 for reading servo information, etc. is supported on a carriage 4, and a stamping motor 5 mechanically connected to this head 3 via a capstan 5a rotates in forward and reverse directions. The position is controlled in the direction of the arrow in the figure. This stamping motor 5 is powered by a drive circuit 5b which receives a drive signal DS from a processor 9 built into the disk storage device, while a spindle motor 2 for driving the disk receives a clock pulse CL from the processor 9 as a speed command. Power is supplied by the drive circuit 2b. Read/write circuit 6
is connected to a plurality of heads 3 in the disk storage device,
In response to the head selection command H3 and read/write command R- from the processor 9, the designated head is placed in a writing or reading state (in this read/write circuit 6, the previous fifth
A pre-stage amplifier corresponding to the amplifier 71 in the figure is incorporated, and its amplified output ASO is given to the A'G C amplifier 7 from the read output R, and when the disk storage device reads regular information, its output is sent to the demodulation circuit 7c. The signal is outputted from the disk storage device as a continuous signal RD via.

The output from the AGC amplifier 7 described above is given to the circuit 60 of the present invention as an analog signal AS as a successive signal of servo information for detecting off-track. On the other hand, a strobe signal generation circuit 8 is provided in the disk storage device, and receives an index pulse IDX that is emitted, for example, once per rotation of the disk from a pulse generation circuit 2a built into the spindle motor 2, and A strobe signal 5SO1SS1 synchronized with the rotation is generated and applied to the circuit 60 of the present invention and the processor 9. Among these, the strobe signal SSO is a so-called mask signal indicating that the servo information pair is being read, and is also applied to the AGC amplifier 7 described above to stop its AGC operation during the reading time. The other strobe signal 551 contains two pieces of servo information Sa,
This is to distinguish the Sb reading times from each other. In order to generate these strobe signals SSO~'551 based on the index pulse I[lX, a clock pulse CL is applied to the strobe signal generation circuit 8 and also to the circuit 60 of the present invention.

The circuit 60 of the present invention shown in FIG. 1 receives an analog signal AS from the AGC amplifier 7 in its level value detection circuit 10, and receives a strobe signal SSI from the strobe signal generation circuit 8 in its reference signal generation circuit 20. These waveforms are shown in Figures 3+81 and IcI, respectively. As schematically shown in the frame, the level value detection circuit IO has a rectification function using, for example, a diode and a function of holding the rectified output using a capacitor.
As shown in l, the analog signal As is converted into a level value signal L having a level value corresponding to its amplitude or the height of its pulse.
Convert to S. The reference signal generation circuit 20 generates a ramp signal such as a triangular wave or two sawtooth waves as shown in the frame, and for example, the state of the strobe signal SS1 is switched as shown in Fig. 3+81. A triangular wave reference signal R5 whose rising and falling edges are switched at a certain point in time is generated. Figure 3 +81 shows the waveform of the level value signal LS! It is shown as one line superimposed on the reference signal R5.

The comparison circuit 30 may be a single comparator that receives the upper level value signal LS and the reference signal R3 and compares the magnitude of the two, and as a result of the comparison, as shown in FIG. 3 (1f), both the signals LS, A comparison result signal CS whose state changes at the time when R3 crosses is generated. As can be easily seen, in this embodiment, the time during which the comparison result signal C8 is in the rLJ state represents the level value of the level value signal LS. The counting pulse generating circuit 40 may be one AND gate 61 as shown in the figure, and this comparison result signal CS
and the clock pulse CL shown in FIG. It includes a counting pulse CP (negative) with a pulse number proportional to the time that C8 is in the rLJ state, and the figure shows that this pulse number corresponding to two pieces of servo information Sa and Sb is Ca
, Cb. The counting means 50 in FIG. 1 is composed of, for example, two counters 51 and 52 and one changeover switch 56 as shown in the figure, and both counters 51 and 52 have the pulse number Ca included in the above-mentioned counting pulse train CP, Separate and count Cb. The changeover switch 53 receives the strobe signal SS1, and depending on its state, switches the counter to which the counting pulse train CP is applied between the first half and the second half of the counting pulse train. Of course, this changeover switch 53 is actually composed of two logic gates. The number of pulses or the count values Ca and Cb thus counted and stored in the two counters 51 and 52, respectively, are read by the processor 9 in FIG. The off-track direction is detected from the sign of the track amount, and the processor 9 issues a drive signal OS to the drive circuit 5b of the spindle motor 5 based on the detected amount and direction to close the position of the head 3. Troop control.

FIG. 4 shows a specific embodiment of the circuit 60 of the present invention together with related circuits. The AGC amplifier 7 which supplies the analog signal AS to the level value detection circuit 10 is composed of the variable gain amplifier 7a and the gain control circuit 7b as described above, and is connected to the strobe signal generation circuit 8 which operates in synchronization with the index pulse IDX. The amplification factor control circuit 7b is controlled by the strobe signal ssO having the waveform shown in FIG. 3 (bl).
operation is stopped during the servo information reading period.

The level value detection circuit 1O is a full-wave rectifier circuit 11 that rectifies the analog signal ^S. Its output amplifier 12. The reference signal generation circuit 20 shown in FIG. 0, which is made up of a smoothing circuit made up of a reactor 13 and a capacitor 14, and a voltage follower circuit 15, is used to generate a triangular wave reference signal RS, and receives a strobe signal 551 and opens and closes according to its state. It consists of a transistor 21 and an operational amplifier 22 including a feedback capacitor 22a that receives the output of the transistor 21 and performs an integrating operation. The input side resistance circuit of the operational amplifier 22 includes a transistor 2
Based on the TTL level signal from 1, the reference signal R5
This is to create a triangular wave with the required voltage value.
When the transistor 21 is closed, the resistor 22c is connected in parallel to the resistor 22b, and the operational amplifier 22 performs a positive integral operation, and when the operational amplifier 22 is open, the operational amplifier 22 performs a negative integral operation. The reference signal generation circuit can also be a charging/discharging circuit whose operation is switched by the strobe signal S31. The comparison circuit 30 in this example consists of a comparator 31 and an AND gate 32, of which the comparator 31 receives the level value signal LS and the reference signal R5 and compares them.

As a result, only during the reading time of the servo information, the state rLJ is reached within the time representing the level value of the level value signal LS.
A comparison result signal CS, which takes

The main body of the counting pulse generation circuit 40 is an AND gate 41, but a changeover switch 42 and a clock pulse oscillator 43 are provided so that the frequency of the clock pulse applied to the AND gate 41 can be selected. When the change-over switch 42 is in the selected position shown in the figure, a counting pulse CP is generated by the clock pulse CL given from the processor 9. However, if you want to increase the accuracy even more, move the change-over switch 42 to the selected position shown in the figure. In the example of FIG. 4, the counter of the counting means 50 consists of a single up/down counter 54, and its addition/subtraction operations are The up/down counter 54 is first reset at the beginning of the servo information reading time by a one-shot circuit 55 that detects the falling edge of the strobe signal SSO.
After counting and amplifying up to the count value Ca corresponding to servo information a, the operation is switched by the strobe signal SSI and the count value cb corresponding to the servo information sb is counted down. Therefore, after the servo information reading time ends, the count value Ca - Cb is stored by the up/down counter 54, and the gate array 56 shown below stores the count value based on the command from the processor 9. The signal is read in parallel, converted into a signed serial signal, and sent to the processor 9. Of course, the count values Ca - Cb may be read into the processor 9 in parallel, but since the processor 9 is a relatively small processor, it is necessary to reduce the number of bits to be allocated to the off-track detection circuit in its input port. A gate array 56 is provided. Furthermore, as is easily understood, the counting means 50 does not necessarily need to be a hardware circuit as shown in the figure (the clock pulse CP can be directly read into the processor 9, and its software can perform the same operation as the circuit shown in the figure). It should be noted that such a count value is read into the processor 9 in synchronization with the strobe signal SSO applied thereto.

As can be seen from the above description, the present invention can be implemented in various ways in addition to the embodiments described above. For example, in the embodiments described above, off-track is detected at the same time as servo information is read. However, it is possible to shift the off-track detection time with respect to the successive occurrence time. In this case, since the level value detection circuit according to the present invention originally has a function of holding and storing the level value of the analog signal, the capacitor 14 in the level value signal 10 in FIG. 4 and the voltage follower circuit 15 are provided in duplicate. Then, the operation is switched by the strobe signal SSI within the time when the servo information is successively output, and the level value corresponding to the servo information Sa and the level value corresponding to the servo information Igsb are separately stored and read. By operating other circuits and means including the reference signal generation circuit at an appropriate time after the end of the time period, off-track can be detected at a desired timing. Especially when the peak value in the analog signal from which servo information is read is likely to fluctuate,
By selecting the sampling point of the level value to be held by the capacitor and voltage follower circuit within the above-mentioned level value, for example, at the center of the successive output time of each servo information Sa, Sb, each level value to be held can be It is possible to increase the degree of reliability and therefore improve the accuracy of the amount of off-track detected based on the degree of reliability.

〔Effect of the invention〕

As is already clear from the above description, in the present invention, the level value detection circuit once converts an analog signal as a successive signal of servo information into a level value signal indicating the level value, and then the reference signal generation circuit generates the signal. Since the comparison circuit compares the reference signal with a ramp waveform, even if the waveform of the peak in the analog signal is considerably deformed or the height of the peak fluctuates temporarily, the level value remains unchanged. Since the signal is virtually no longer affected by these influences, the reliability of off-track detection can be significantly improved compared to the conventional method. In addition, a counting pulse is generated by ANDing the comparison result signal from the comparing circuit with a clock pulse having a desired frequency by a counting pulse generating circuit,
Since the counting is carried out by the counting means, the frequency of the clock pulse can be selected to be higher than the frequency of the pulse in the analog signal, if necessary, and the accuracy of off-track detection can be increased compared to the conventional method.

As described above, the off-track detection circuit for the read/write head of a disk storage device according to the present invention is capable of detecting off-track with high accuracy without any detection errors, and will therefore be useful as the capacity of disk storage devices continues to increase. It is expected that its true value will be demonstrated.

[Brief explanation of drawings]

1 to 4 relate to the present invention, of which FIG. 1 is a block circuit diagram showing an example of the principle configuration of an off-track detection circuit for a read/write head of a disk storage device according to the present invention, and FIG. 2 is a block circuit diagram of the present invention. A block circuit diagram showing the configuration of a disk storage device in which the circuit of the invention is used, FIG. 3 is a waveform diagram of main signals in the circuit showing the operation of the circuit of the invention, and FIG. 4 is a circuit showing a specific embodiment of the invention. It is a diagram. Figure 5 and subsequent figures relate to the same type of off-track detection circuit according to the prior art. Figure 5 is a block circuit diagram showing the configuration of its main parts, Figure 6 is a waveform diagram of the main signals in the circuit, and Figure 7 is In Figure 0, which is a partially enlarged view of the waveforms of the main signals showing problems with the conventional circuit, 1: disk, 2 Niss spindle motor, 2a Niss spindle motor drive circuit, 3: head, 4: carriage, 5
Ni-temping motor, 5b Ni-temping motor drive circuit, 6: Read/write circuit, 7: AGC amplifier, 7a: Variable amplification factor amplifier, 7tz amplification factor control circuit, 8
8 strobe signal generation circuit. 9: Embedded processor of disk storage device, 10 two-level value detection circuit, 11: Full-wave rectifier circuit, 12: Amplifier, 13
: Reactor, 14: Capacitor, 15: Voltage follower circuit, 20: Reference signal generation circuit, 21: Transistor, 22: Operational amplifier, 22a, 22b, 22c: Resistor, 30: Comparison circuit, 31: Comparator, 32: AND gate ), 40 + counting pulse generation circuit, 41 AND gate, 42: changeover switch, 43: clock pulse generator, 50: counting means, 51.52: counter, 53: changeover switch, 54: amplifier down counter, 55: one-shot circuit , 56: Gate array, 60: Off-track detection circuit which is the circuit of the present invention, 71: Amplifier, 72: Variable gain amplifier, 74: Gain control circuit, 75: Resistor, 7
6: Selector switch, 77.78: Counter, AS: Analog signal, Ca, Cb: Count value corresponding to servo information Sa, Sb, CL: Clock pulse, CP, CPI to CP
4: Counting pulse, C8: Comparison result signal, DS: Drive signal, Hl hand selection command, IDX: Index pulse, LS: Level value signal, RD: Successive signal, R5: Reference signal, R-: Read/write command, Sa , Sb: servo information, ss: synchronization signal, 5SO-851 Nistro loop signal, T Nidrak. /・・- 111Figure 2Figure 3

Claims (1)

[Claims] This circuit detects off-track with respect to the track of the head from an analog signal read out via a read/write head from a pair of servo information written on the disk surface in a simple repeating pattern offset from each other in the circumferential direction. a level value detection circuit that receives the analog signal and converts it into a level value signal representing its amplitude; a reference signal generation circuit that generates a ramp-shaped reference signal in synchronization with the rotation of the disk; and a level value signal value. and a reference signal value, and a comparator circuit that generates a comparison result signal that takes a state value according to the magnitude relationship between the two values, and a counter that receives the comparison result signal and a clock pulse having a predetermined frequency and is the logical product of both. A counting pulse generating circuit that emits a pulse train; and a counting means that synchronizes the number of pulses in the counting pulse train with the rotation of the disk and counts the difference between the counted values corresponding to each of the pairs of servo information, the counted value. 1. An off-track detection circuit for a read/write head of a disk storage device, characterized in that the amount and direction of off-track are detected from the difference and magnitude relationship.