JPH07201146A - Head positioning control device of magnetic disk device and method therefor - Google Patents

Abstract

PURPOSE:To ressolve the effect due to noise and to enhance the accuracy of head positioning control in a magnetic disk device of a sector servo system by using sample-and-hold circuits for detecting an average value of amplitude values even when a burst data as information about the position of a head is influenced by noise making these amplitude values fluctuate and converting the average value into a DC voltage level. CONSTITUTION:The sample-and-hold circuits 20A-23D are circuits for sampling and holding amplitude values of the burst data read out with the head 1, and peak values of the burst data in amplitude are detected and added up in turn, and the added value is converted into a voltage level of a multiple of a predetermined number of bits. An average value of the amplitude values held in a sampling period is calculated by a servo controller 170, and based on this average value, position information of the head 1 is generated.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a head positioning control device for a magnetic disk device which employs a sector servo system.

[0002]

2. Description of the Related Art Conventionally, in a hard disk device (HDD), a sector servo system in which servo data and user data are mixedly recorded on a recording medium (disk) is well known. The servo data is data for positioning the head on a target track (target cylinder) on the disk, and is roughly classified into an address code (cylinder address) and burst data. The address code is data indicating the address of the track (cylinder) on which the head is located. The burst data is data for positioning the head at the center of the target track.

As shown in FIG. 6, the HDD is roughly divided into a head drive system and a data recording / reproducing system. The head drive system includes a head actuator 4 on which the head 1 is mounted and a voice coil motor (VCM) 3 that drives the head actuator 4. The head actuator 4 moves the head 1 in the radial direction of the disk 2 by the driving force of the VCM 3. The disk 2 is rotating at high speed by the spindle motor 5.

The data recording / reproducing system comprises a data recording circuit and a data reproducing circuit. The data recording circuit outputs write data (NRZ) output from the interface control circuit 6.
Code string) WD to RLL (Run Length Lim
It has an encoder 7 for modulating the write signal of the ited) code and a read / write (R / W) amplifier 8 for supplying a write current corresponding to the write signal to the head 1. The interface control circuit 6 is a circuit for controlling data transfer between HDC (disk controller) and HDD and exchange of various interface signals. The encoder 7 operates in response to the synchronizing pulse from the write synchronizing circuit 15, and executes the process of converting into a write signal during the period of the write gate WG.

The R / W amplifier 8 also serves as a head amplifier of the data reproducing circuit. The data reproducing circuit is an AGC (Auto Gain Cont) for maintaining the read signal of the head 1 output from the R / W amplifier 8 at a constant level.
(roll) amplifier 9, a low pass filter (LPF) 11 for removing high frequency noise, a read pulse generation circuit 12, and a decoder 13. The read pulse generation circuit 12 has a binarization circuit for generating the read pulse RP from the read signal output from the LPF 11.
The decoder 13 is a circuit that demodulates the read data RD of the NRZ code string from the read pulse RP. AGC circuit 10
Is a circuit for adjusting the gain of the AGC amplifier 9 according to the level of the output signal of the LPF 11. Decoder 1
3 operates in response to the sync pulse from the read sync circuit 14.

Further, the HDD is provided with a servo system for reproducing servo data prerecorded on the disk 2 by using a data reproducing circuit and positioning the head 1 on a target track based on the servo data. ing. The servo system includes a servo controller 17, a CPU 18, and a burst data processing circuit. CPU18 is H
It is a control circuit for controlling each constituent element of the DD and executes a part of the processing of the servo system. The servo system clock is supplied to the servo controller 17 from the oscillation circuit 16. The CPU 18 is supplied with the CPU clock from the oscillation circuit 16. The oscillating circuit 16 supplies the read / reference clock (R
RC) is being supplied.

The servo controller 17 extracts the address code AD from the read pulse RP output from the read pulse generation circuit 12 and recognizes the track (cylinder) on which the head 1 is located. The address code AD is
Usually, it is recorded in the servo area of the disk 2 by binary data such as Gray code.

The burst data processing circuit includes a full wave rectifying circuit (FWR circuit) 19 and a sample and hold circuit 20-
23, a sample gate generation circuit 24, and an A / D conversion circuit 25.

Here, the burst data is composed of, for example, 4-phase data A to D as shown in FIG. 7, and is divided and recorded at positions displaced by 1/2 track from the track center. Each of the sample and hold circuits 20 to 23 is an LPF 11 that is full-wave rectified by the FWR circuit 19.
In the output signal of, the burst data A to D sent in order are distributed, and the amplitude values A to D of each signal are D
Hold at C level. Sample and hold circuit 20
23 to 23, as shown in FIG. 7, execute the sample hold operation at the timing of the sample signals A to D output from the sample gate generation circuit 24. The sample gate generation circuit 24, based on the sample timing signal from the servo controller 17, outputs the sample gates A to D.
To generate.

The A / D conversion circuit 25 encodes each amplitude value of the burst data A to D output from the sample and hold circuits 20 to 23 into position information according to a control signal from the servo controller 17, and the servo controller 1
Output to 7. The servo controller 17 uses the position information to calculate the position error of the head 1.

Specifically, the servo controller 17 is
The burst data A, which is configured as shown in FIG.
Offset (X-Y or Y) which is an error of each position information of B
-X) is calculated and output to the CPU 18 together with the sign (+ or-). FIG. 9 shows a timing chart related to the operation of the servo controller 17. FIG. 9 shows that the hold clear signal HC and the sample timing signal are created by the count value of t1 to t10 using the sector pulse as the start signal. Hold clear signal H
C clears the output voltage of the sample and hold circuits 20 to 23 for new sampling.
The sample timing signal is the sample gate generation circuit 2
4 and is distributed to each of the sample and hold circuits 20 to 23.

The servo controller 17 stores the position information X of the burst data A output from the A / D conversion circuit 25 in the register 17g and the position information Y of the burst data B in the register 17h. The subtraction circuit 17d, based on the determination result of the even / odd determination circuit 17c, outputs "X-
The calculation process of "Y" or "Y-X" is executed, and the sign (+ or-) indicating the position error amount (offset) and the movement control direction is output to the CPU 18.

Here, the servo controller 17 displays "X-
The selection of "Y" or "Y-X" is determined depending on whether the target track number for positioning the head 1 is an odd number or an even number. A specific example will be described with reference to FIGS. 10 and 11.

As shown in FIG. 10, when the target track number is an even number, for example, "2", the servo controller 1
7 is position information X of burst data A and burst data B
The calculation processing of "Y-X" is executed from the position information Y of.
If the head 1 is located at the position P2 which is the center of the target track number 2, the LPF output value of the burst data A and B is 50% of the maximum level, and the calculation result of "Y-X" is "0. It will be. If the head 1 is located at the position P2 deviated in the direction of the track number 3 (forward direction),
The operation result of "Y-X" is "-M". CPU18
When the error amount “M” and the sign “−” are received from the servo controller 17, performs the movement control such that the head 1 is moved in the reverse direction by the off-track amount M. That is, the CPU 18 controls the VCM 3 to supply the drive current corresponding to the movement control amount M. On the other hand, the position P where the head 1 is displaced in the direction of track number 1 (reverse direction)
If it is located at 3, the operation result of "Y-X" is "+ M"
Becomes When the CPU 18 receives the error amount “M” and the sign “+” from the servo controller 17, the CPU 18 executes the movement control for moving the head 1 in the forward direction by the off-track amount M.

Further, as shown in FIG. 11, when the target track number is an odd number, for example, "5", the servo controller 17 determines "X" from the position information X of the burst data A and the position information Y of the burst data B. -Y "is executed. If the head 1 is located at the position P4 which is the center of the target track number 5, each LP of the burst data A and B
The F output value is 50% of the maximum level, and the operation result of "XY" is "0". If the head 1 is located at the position P5 deviated in the direction of the track number 6 (forward direction), the calculation result of "X-Y" is "-M". CPU1
When receiving the error amount “M” and the sign “−” from the servo controller 17, the control unit 8 executes the movement control for moving the head 1 in the reverse direction by the off-track amount M. On the other hand, head 1 is in the direction of track number 4 (reverse direction)
If it is located at the position P6 deviated from, the operation result of "X-Y" is "+ M". When the CPU 18 receives the error amount “M” and the sign “+” from the servo controller 17, the CPU 18 executes the movement control for moving the head 1 in the forward direction by the off-track amount M. It should be noted that the odd / even determination of the target track number is made by the odd / even determination circuit of the servo controller 17, but there is also a method of being performed by the CPU 18.

As shown in FIG. 12, the sample-and-hold circuits 20 to 23 are DCs corresponding to the output of the FWR circuit 19.
A CR circuit including a capacitor 202 and a resistor 201 for holding a voltage level, a charge current source 200 for charging the capacitor 202, a switch circuit 203 and a buffer circuit 20 for clearing the hold.
Have 4. The capacitor 202 is charged with the charge current from the charge current source 200 according to the output of the FWR circuit 19 by the CR time constant.

That is, as shown in FIG. 13, the output voltage of the FWR is sampled and held by the capacitor 202 (hold C voltage) while the sample gate is at the logic level "H". The output voltage is still held by the capacitor 202 even when the sampling gate is at the logical level “L” and sampling is completed. Here, the A / D conversion circuit 25 samples the hold C voltage, inputs it, and converts it into digital position information.
Since some A / D conversion circuits 25 have a low input impedance, the buffer circuit 204 is usually provided.

The sample and hold circuits 21 to 23 are released from hold by the hold clear HC from the servo controller 17. That is, as shown in FIG. 12, when the switch circuit 203 is turned on by the hold clear HC, the capacitor 202 is discharged.

By the way, when the positioning control of the head 1 with respect to the target track is performed, the amount of positional deviation (error amount "M") is determined by the sample and hold circuits 20 to 20 as described above.
It is proportional to the output voltage of 23 (buffer output). Therefore, the input amplitude (F
The linearity of the output voltage with respect to the (WR output) is extremely important.

Further, it is also important that the same output is the same for the same input value (repetition accuracy). However, particularly when the head 1 is on-track, A = B, each output voltage is the same, and both are equal to 1/2 (50%) of the total amplitude, so linearity near the 1/2 amplitude is obtained. Especially important. In other words, when the output voltages of CH-A and CH-B are 0 or close to the total amplitude (80% or more), the head 1
However, it is not necessary to be so precise because the 1/2 track is largely displaced.

In the sample and hold circuits 20-23,
As shown in FIG. 12, the CR time constant of the capacitor 202 and the resistor 201 not only determines the tracking speed of sampling, but also serves as an integral type filter for the charge current, which causes noise in the full-wave rectified waveform. Even if it is, the amplitude value is detected as an average value.

However, in the conventional sample and hold circuits 20 to 23, as shown in FIG. 14, noise (erasing noise and unnecessary noise) immediately before the sample gate is turned off.
And the DC output is highly dependent on the last sampling waveform. Therefore, as shown in FIG. 14, an output error of the sample and hold circuits 20 to 23 occurs. The occurrence of this output error causes a decrease in head positioning accuracy.

Here, if a filter with a CR time constant that does not react to high frequency noise is used, as shown in FIG. 15, this time not a mean value detection but a peak hold circuit and a sampling waveform. It is not effective because it depends on the waveform peak of.

[0024]

In the conventional sector servo type HDD, when the position control of the head 1 is performed based on the burst data of the servo data, the head 1
The amplitude value of the burst data read by is sampled / held, the amplitude value is converted into position information, and the position error is calculated. In this case, in the sample and hold circuit, when the noise whose amplitude value is large or small affects the burst data, an output error of the sample and hold circuit occurs. Conventionally, the positioning accuracy of the head has been maintained by improving the characteristics of the low-pass filter, but a large capacity and high recording density HDD
Then it's getting harder.

An object of the present invention is to detect the average value of the amplitude values in the sector servo type magnetic disk device even if the burst data, which is the position information of the head, is affected by noise of which the amplitude value is large or small. The use of a sample-and-hold circuit that converts the voltage to a DC voltage level results in eliminating the effect of noise and improving the accuracy of head positioning control.

[0026]

According to the present invention, in a sector servo type magnetic disk apparatus, a recording medium on which servo data and user data are recorded in a mixed manner, and a sample hold for sampling and holding the amplitude value of burst data. The apparatus is provided with a means, a counter means for detecting a sampling period, and a position information generating means for calculating an average value of the held amplitude values and generating position information of the head.

[0027]

According to the present invention, the sample and hold means is a circuit for sampling and holding the amplitude value of the burst data read by the head, and detecting the peak value of the amplitude of the burst data, sequentially adding the peak values, and determining in advance. Converted to a voltage level that is twice the number of bits. The position information generating means calculates the average value of the amplitude values held in the sampling period of the sample and hold means, and generates the position information of the head based on this average value.

[0028]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing a main part of an HDD according to the same embodiment, FIG. 2 is a block diagram showing a configuration of a sample and hold circuit according to the same embodiment, and FIG. 4 is a servo controller according to the same embodiment. It is a block diagram which shows a structure.

In the HDD according to the embodiment, as shown in FIG. 1, the conventional full-wave rectification circuit (FWR circuit) 19 is deleted in the burst data processing circuit of the servo system, so that the sample output can be performed at any time. Comparator 3 for detecting
Has 0.

That is, the sample and hold circuits 20A, 2
The differential outputs from the LPF 11 are directly input to 1B, 22C and 23D. The sample and hold circuit
As a specific example, as shown in FIG.
31c, transistors Tr1 to Tr6, switch circuit S
It has W1 to SW3 and capacitors C1 to C3.

Further, the servo controller 1 of the same embodiment.
Reference numeral 70 denotes a sector pulse generation circuit 17 as shown in FIG.
a, address code detection circuit 17b, even / odd number determination circuit 17c, subtraction circuit 17d, counters 17e, 17k,
A / D conversion control circuit 17f, registers 17g and 17h,
A sample timing generation circuit 17i and a hold clear generation circuit 17j are provided.

The sector pulse generation circuit 17a generates a sector pulse based on the read pulse RP output from the read pulse generation circuit 12. The sector pulse is a pulse that becomes the start timing of each sector dividing the track. The address code detection circuit 17b detects the track address code AD from the read pulse RP and outputs it to the CPU 18 as track address data. The even / odd determination circuit 17c determines the even / odd of the track number from the address code from the address code detection circuit 17b.

The counter 17e counts the servo system clock from the oscillation circuit 16 and generates timing pulses necessary for the operation of various circuits. In the embodiment, in addition to the counter 17e, a counter 17k for counting the read pulse RP is provided. Counter 17
The k operates by the output (sample gate start signal) from the counter 17e to count the read pulse RP corresponding to the peak position of the burst data.

The A / D conversion control circuit 17f has a channel selection signal (ch se) necessary for the operation of the A / D conversion circuit 25.
Lect) is output to the A / D conversion circuit 25. The registers 17g and 17h store the position information X of the burst data A and the position information Y of the burst data B output from the A / D conversion circuit 25, respectively. The subtraction circuit 17d, based on the determination result of the even / odd determination circuit 17c, outputs "X-
The calculation process of "Y" or "Y-X" is executed, and the sign (+ or-) indicating the position error amount (offset) and the movement control direction is output to the CPU 18.

The sample timing generation circuit 17i generates the sample timing based on the count value of the counter 17e or the count value of the counter 17k according to the output of the comparator 30. Hold clear generation circuit 1
7j generates hold clear HC.

In FIG. 1, the configuration of the circuit other than the above description is the same as that shown in FIG. 6, and the description thereof will be omitted.

Next, the operation of the embodiment will be described.

First, basically, the servo system executes the position control for positioning the head 1 at the center of the target track. During this position control, the sample and hold circuit 20A
23D are amplitude values A of burst data A to D, respectively.
Hold D to DC level (hold voltage value).
The A / D conversion circuit 25 encodes each amplitude value of the burst data A to D output from the sample and hold circuit into position information according to a control signal from the servo controller 170, and outputs the position information to the servo controller 170. The servo controller 170 uses the position information to detect the head 1
Position error is calculated, and the calculation result (offset value and sign +/−) is output to the CPU 18. The CPU 18 controls the movement of the head 1 so that the position error is zero, and positions the head 1 at the center of the target track.

Here, the sample and hold circuits 20A to 23D of the embodiment directly input the differential output signals (+,-) from the LPF 11. As shown in FIG. 2, when the hold clear HC is released in the state where the differential output signals (+, −) of the analog waveform LPF 11 are input, the sample and hold circuit turns off the switch circuit SW3. Become. Subsequently, when the sample gate from the sample gate generation circuit 24 becomes the logic level "H", the switch circuits SW1 and SW2 are turned off.

With the operation of the switch circuits SW1 to SW3, the potentials of the capacitors C1 to C3 (the capacitor C
3, the hold potential follows the burst data (the differential output signal + of the LPF 11 +) on the positive side, which increases from the bias voltage, and the capacitors C1 and C2 are charged with a voltage having a potential difference from the reference voltage Vref.

Next, the negative burst data (LPF11
Differential output signal −) increases toward the positive side of the bias voltage, the voltage of the potential difference from the reference voltage Vref becomes
The capacitors C1 and C2 are charged. The voltage of this potential difference is added to the hold potential of the capacitor C3 and increases.

That is, as shown in FIG. 3, the amplitude of the differential output signal of the LPF 11 for each channel (+ or −) is
The capacitors C1 and C2 are sampled by repeating charging and addition. The predetermined burst data is 10
If so, a DC level output (buffer output) corresponding to a 10-fold amplitude value can be obtained.

Here, the period of the sampling gate (sampling period) is the counter 1 of the servo controller 170.
It is created based on the count value of 7k. Counter 17
k creates a sample timing in cooperation with the counter 17e.

That is, as shown in FIG. 5, the counter 17e
Uses the sector pulse as a start signal, counts the servo system clock, turns on / off the hold clear HC, and counts the start time of the sample gate. The counter 17k operates by counting the start time of the counter 17e and counts the read pulse RP corresponding to the peak position of the burst data. As a result, sample holding is performed by the number of sample bits determined in advance.

However, since the read pulse RP is not generated when the amplitude value of the burst data is near 0, the counter 17e is used when the sample value does not increase beyond a certain value.
Count value (servo system clock count value)
The sample timing is created by, and the sampling in the burst area ends. The output selection of the counter 17e and the counter 17k is determined by the sample timing generation circuit 17i according to the output of the comparator 30.
The comparator 30 outputs an output signal for selecting the counter 17k when the output of the sample and hold circuit (amplitude value of burst data) is a certain value or more. Also,
If it is less than a certain value, an output signal for selecting the counter 17e is output.

Since the output of the sample and hold circuit only needs to have linearity in the vicinity of 1/2, the reliability in the vicinity of 0 is not so important. Therefore, the read pulse RP
In a region where the amplitude is small so that no sampling occurs, the reliability of the number of samples does not pose any problem, so the sampling period can be determined by the servo system clock.

In this way, in this embodiment, the LPF1
By repeatedly charging and adding the amplitude of each channel (+ or −) of one differential output signal, it is possible to obtain a DC level output (buffer output) that is the number of samples times the average value of the amplitude values. Therefore, even if the burst data includes noise (erasure, additional noise), the LPF outputs in the large and small consecutive samples are added and averaged, so that an output error due to noise can be prevented.

In the position control of the head 1, the position error amount calculated based on the burst data should be proportional to the output voltage of the sample and hold circuit. Therefore, the straight line of the output signal with respect to the input signal of the sample and hold circuit is used. Sex is important. If the burst data contains noise, the sample and hold circuit will follow it and output a DC level shifted by the amount of noise. Traditionally,
Since the full-wave rectification circuit (FWR circuit) 19 is used, it is determined by the peak value of the full-wave rectification waveform, and is influenced by noise immediately before the sample gate is turned off.

Therefore, in the present invention, the sample output is averaged regardless of where the noise occurs in the burst data in the sample, by using the sample hold circuit which directly inputs the differential output signal of the LPF 11. As a result, the influence of noise is suppressed.

[0051]

As described above in detail, according to the present invention, in the sector servo type magnetic disk device, even if the burst data which is the position information of the head is affected by the noise whose amplitude value is large or small, By using a sample and hold circuit that detects the average value of the amplitude values and converts it into a DC voltage level, the effect of noise can be eliminated as a result, and the accuracy of head positioning control can be improved.

[Brief description of drawings]

FIG. 1 is a block diagram showing a main part of an HDD according to an embodiment of the present invention.

FIG. 2 is a block diagram showing the configuration of a sample and hold circuit according to the first embodiment.

FIG. 3 is a timing chart for explaining the operation of the sample hold circuit of the same embodiment.

FIG. 4 is a block diagram showing the configuration of a servo controller according to the embodiment.

FIG. 5 is a timing chart for explaining the operation of the embodiment.

FIG. 6 is a block diagram showing a main part of a conventional HDD.

FIG. 7 is a timing chart for explaining a conventional operation.

FIG. 8 is a block diagram showing a configuration of a conventional servo controller.

FIG. 9 is a timing chart for explaining the operation of the conventional HDD.

FIG. 10 is a conceptual diagram for explaining the operation of a conventional HDD.

FIG. 11 is a conceptual diagram for explaining the operation of a conventional HDD.

FIG. 12 is a block diagram showing a configuration of a conventional sample hold circuit.

FIG. 13 is a timing chart for explaining the operation of the conventional sample hold circuit.

FIG. 14 is a timing chart for explaining the operation of the conventional sample hold circuit.

FIG. 15 is a timing chart for explaining the operation of the conventional sample hold circuit.

[Explanation of symbols]

1 ... Head, 2 ... Disk, 12 ... Read pulse generation circuit, 17, 170 ... Servo controller, 18 ... CP
U, 20 to 23, 20A to 23D ... Sample and hold circuit, 24 ... Sample gate circuit, 25 ... A / D conversion circuit.

Claims (4)

[Claims] 1. A magnetic disk device using a recording medium in which burst data for positioning a head at the center of a track, servo data having an address code corresponding to a track number, and user data are recorded together. Is a circuit for sampling and holding the amplitude value of the burst data read by, detecting the peak value of the amplitude of the burst data, adding them sequentially, and converting them to a voltage level that is a predetermined number of bits times. Sample and hold means, counter means for detecting a sampling period of the sample and hold means, and an average value of the amplitude values held by the sample and hold means during the sampling period detected by the counter means Then, based on this average value, A head positioning control device for a magnetic disk drive, comprising: position information generating means for generating position information. 2. A magnetic disk device using a recording medium in which burst data for positioning a head at a track center, servo data having an address code corresponding to a track number, and user data are recorded together. Sampling the amplitude value of the burst data read by, detecting and sequentially adding the peak value of the amplitude of the burst data, and adding the peak value by a predetermined number of bits of the voltage level. A step of converting and holding the amplitude value, a step of detecting the sampling period of the amplitude value, a step of calculating an average value of the amplitude values held in the detected sampling period, and the head based on the average value. Head position determination, which comprises the steps of: Control method. 3. Servo data having an address code corresponding to a track number for each track and burst data of a plurality of phases for positioning a head at the track center is recorded in advance, and the burst data of each phase is track centered. In the magnetic disk device of the sector servo system having a recording medium in which the servo data and the user data are recorded in a mixed manner with a positional deviation of 1/2 to 1, the position corresponds to the electromagnetic conversion position of the read signal of the head. Pulse generation means for detecting a waveform peak point and converting the read signal into binarized data; and pulse generator means provided independently for each burst data of each phase to detect the peak value of each burst data and sequentially add And sample and hold means for converting to a DC voltage level that is a predetermined number of bits times, and Control means for controlling the sampling and hold period of the pulse hold means according to the input timing of the burst data, and the burst during sampling of the sample hold means by counting the pulses output from the pulse generation means. A head positioning control device for a magnetic disk device, comprising: a detection unit that counts the number of bits of data and detects the sampling period of the sample and hold unit. 4. Servo data having a plurality of phases of burst data for positioning the address code corresponding to the track number and the head at the track center is recorded in advance for each track, and the burst data of each phase is track centered. In the magnetic disk device of the sector servo system having a recording medium in which the servo data and the user data are recorded in a mixed manner with a positional deviation of 1/2 to 1, the position corresponds to the electromagnetic conversion position of the read signal of the head. Pulse generation means for detecting a waveform peak point and converting the read signal into binarized data; and pulse generator means provided independently for each burst data of each phase to detect the peak value of each burst data and sequentially add And sample and hold means for converting to a DC voltage level that is a predetermined number of bits times, and Control means for controlling the sampling and hold period of the pulse-hold means according to the input timing of the burst data, and the burst during sampling of the sample-hold means by counting the pulses output from the pulse generation means. Detecting means for counting the number of bits of data and detecting the sampling period of the sample and hold means, and the amplitude value of the burst data held by the sample and hold means in the sampling period detected by the detecting means And a position information generating means for generating position information of the head based on this average value.