JPS6325991A - Optical semiconductor device - Google Patents
Optical semiconductor deviceInfo
- Publication number
- JPS6325991A JPS6325991A JP16781386A JP16781386A JPS6325991A JP S6325991 A JPS6325991 A JP S6325991A JP 16781386 A JP16781386 A JP 16781386A JP 16781386 A JP16781386 A JP 16781386A JP S6325991 A JPS6325991 A JP S6325991A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- ohmic
- grown
- inp
- type inp
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 21
- 230000003287 optical effect Effects 0.000 title claims abstract description 13
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 claims abstract description 9
- 238000005253 cladding Methods 0.000 claims description 16
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 8
- 239000000758 substrate Substances 0.000 abstract description 6
- 229910052681 coesite Inorganic materials 0.000 abstract description 4
- 229910052906 cristobalite Inorganic materials 0.000 abstract description 4
- 239000000377 silicon dioxide Substances 0.000 abstract description 4
- 235000012239 silicon dioxide Nutrition 0.000 abstract description 4
- 229910052682 stishovite Inorganic materials 0.000 abstract description 4
- 229910052905 tridymite Inorganic materials 0.000 abstract description 4
- 238000003486 chemical etching Methods 0.000 abstract description 3
- 239000000969 carrier Substances 0.000 abstract description 2
- 240000002329 Inga feuillei Species 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 239000003795 chemical substances by application Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 239000007791 liquid phase Substances 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
Abstract
Description
【発明の詳細な説明】
、〔発明の目的〕
（産業上の利用分野）
本発明は、光半導体装置に関し、特にその構造と組成を
改良した光半導体装置に関する。DETAILED DESCRIPTION OF THE INVENTION OBJECTS OF THE INVENTION (Industrial Application Field) The present invention relates to an optical semiconductor device, and particularly to an optical semiconductor device whose structure and composition are improved.
（従来の技術）
半導体レーザのような光半導体装置においては、低閾値
、基板横モードを達成するために埋め込み型構造が用い
られる。ＩｎＰ系半導体レーザの場合は、第２図に示す
ように、ストライプ状ＩｎＧａＡｓＰ活性層（２）をｐ
型ＩｎＰ埋め込み層（４）とｎ型ＩｎＰ埋め込み層（５
）とからなるｐ−ｎ逆接合半導体層で埋め込み、更にＩ
ｎＰクラッド＠ （３）を成長させ、そげ上にＩｎＧａ
ＡｓＰオーミック層（６）を成長させている。(Prior Art) In optical semiconductor devices such as semiconductor lasers, buried structures are used to achieve low threshold and substrate transverse modes. In the case of an InP-based semiconductor laser, as shown in FIG.
type InP buried layer (4) and n-type InP buried layer (5)
) is buried with a p-n reverse junction semiconductor layer consisting of
Grow nP cladding @ (3) and add InGa on top.
An AsP ohmic layer (6) is grown.
しかしながら、ＩｎＰクラッド層（３）はキャリアｉ度
を十分に高くすることができず、上述の構成では低抵抗
レーザダイオードが得られにくい。However, the InP cladding layer (3) cannot make the carrier i degree sufficiently high, and it is difficult to obtain a low resistance laser diode with the above configuration.
（発明が解決しようとする問題点）
従来技術では半導体レーザの低抵抗化が出来ず、高速化
が困難でめった。(Problems to be Solved by the Invention) Conventional techniques have not been able to reduce the resistance of semiconductor lasers, making it difficult to increase the speed.
本発明は、低抵抗で高速動作が可能な光半導体装置を提
供することを目的とする。An object of the present invention is to provide an optical semiconductor device that has low resistance and can operate at high speed.
（発明の構成〕
（問題点を解決するための手段）
本発明は、ＩｎＧａＡｓＰ層を■ｎＰクラッド層で挟み
こんだストライプ層の両側面を異なる２つの導電型のＩ
ｎＰ層で埋め込み、ＩｎＰクラッド層とＩｎＰ埋め込み
層の上にＩｎＧａＡｓまたはＩｎＧａＡｓＰオーミック
層を成長させたことを￥ｆ徴とする光半導体装置でおる
。(Structure of the Invention) (Means for Solving the Problems) The present invention provides two different conductivity type I
This is an optical semiconductor device characterized by having an nP layer buried therein and an InGaAs or InGaAsP ohmic layer grown on the InP cladding layer and the InP buried layer.
（作用）
半導体レーザのような光半導体装置においては、光変調
速度は埋め込み層の空乏層容量とオーミック層の抵抗の
積によって決まるＣＲ時定数に支配される。本発明は、
特にオーミック層を低抵抗化することにより、このＣＲ
時定数を低くする。(Function) In an optical semiconductor device such as a semiconductor laser, the optical modulation speed is controlled by the CR time constant determined by the product of the depletion layer capacitance of the buried layer and the resistance of the ohmic layer. The present invention
In particular, by lowering the resistance of the ohmic layer, this CR
Lower the time constant.
（実施例）
以下、本発明を典型的な実施例を示す第１図を参照して
説明する。第１図は本発明の光半導体装置゛の断面構造
を示す図である。なおこの実施例は、発明を埋め込み型
レーザダイオードに適用したものでおる。(Example) The present invention will be described below with reference to FIG. 1 showing a typical example. FIG. 1 is a diagram showing a cross-sectional structure of an optical semiconductor device of the present invention. In this embodiment, the invention is applied to a buried laser diode.
まず、ｎ型ＩｎＰ半導体基板（１）上にｎ型ＩｎＰクラ
ッド（９）を、クラッド（９）上にＪｎＱａ、Ａ、ＳＰ
活性層（２）を、更にその活性層（２）の上にｐ型Ｉｎ
Ｐクラッド（３）を順次成長させる。次に、ｐ型ＩｎＰ
クラッド（３）上に幅２μｍ以下のストライブ状の３ｉ
０２膜マスクを形成し、化学エツチング処理をほどこし
、このヘテロ接合構造をストライブ状に形成する。更に
、５ｉ０２膜マスクをつけた状態で、ｐ型ＩｎＰ埋め込
み層（４）とｎ型ＩｎＰ埋め込み層（５）を順次成長さ
せストライブ状へテロ接合構造を埋め込む。この成長で
は、ストライブ状へテロ接合構造の上にＳ ｉ Ｏ２膜
が形成されているため、通常使用される液相法による結
晶成長では、ＳｉＯ２の上には結晶が成長しないａなお
、この成長工程では、第１図に示すように、ｎ型ＩｎＰ
埋め込み＠（５）をｐ型ＩｎＰクラッド（３）の表面よ
りも突出させる。First, an n-type InP cladding (9) is placed on an n-type InP semiconductor substrate (1), and JnQa, A, and SP are placed on the cladding (9).
The active layer (2) is further coated with p-type In on the active layer (2).
P cladding (3) is grown sequentially. Next, p-type InP
Striped 3i with a width of 2 μm or less on the cladding (3)
A 02 film mask is formed and a chemical etching process is performed to form this heterojunction structure in the form of a stripe. Furthermore, with the 5i02 film mask attached, a p-type InP buried layer (4) and an n-type InP buried layer (5) are sequentially grown to bury a striped heterojunction structure. In this growth, a SiO2 film is formed on a striped heterojunction structure, so crystals do not grow on SiO2 in the commonly used liquid phase method. In the growth process, as shown in Figure 1, n-type InP
The buried @(5) is made to protrude beyond the surface of the p-type InP cladding (3).
埋め込み層（４）、（５）を成長後、ＳｉＯ２膜を化学
エツチング処理で除去する。その後、ｐ型ＩｎＰクラッ
ド（３）、ｎ型ＩｎＰ埋め込み＠（５）の上にＩｎＧａ
Ａｓ組成のオーミック層（６）を成長させる。次に基板
（１）とオーミック層（６）上にそれぞれの導電型に依
存したオーミック電極（７）、 （８）を形成する。な
お、半導体レーザの横モード制御のためには、ＩｎＧａ
ＡｓＰ活性層（２）の幅は２μｍ以下が望ましい。従っ
て、５ｉ０２マスクのストライブ幅で活性層（２）の幅
が正確に化学エツチングできるように、ｐ型ＩｎＰクラ
ッド、ｆｌ（３）の厚さを２μｍ以下とすることが好ま
しい。After growing the buried layers (4) and (5), the SiO2 film is removed by chemical etching. After that, InGa was placed on the p-type InP cladding (3) and the n-type InP embedding@(5).
An ohmic layer (6) having an As composition is grown. Next, ohmic electrodes (7) and (8) depending on their respective conductivity types are formed on the substrate (1) and the ohmic layer (6). Note that for transverse mode control of semiconductor lasers, InGa
The width of the AsP active layer (2) is preferably 2 μm or less. Therefore, it is preferable that the thickness of the p-type InP cladding, fl(3), be 2 μm or less so that the width of the active layer (2) can be chemically etched accurately with the stripe width of the 5i02 mask.
半導体レーザのオーミック抵抗は、電極（７）とｐ型オ
ーミック層（６）との接合抵抗とｐ型オーミック層（６
）の比抵抗できまる。接合抵抗を小さくするにはｐ型オ
ーミック層（６）への不純物高濃度添加によるキャリア
濃度増加が必要であるが、ＩｎＰ組成では１０１９ｃＩ
ｎ−３以上のキャリア濃度にするには困難である。これ
に対して、ＩｎＧａＡｓ組成では容易に高濃度添加が可
能であり、低抵抗とできる。The ohmic resistance of a semiconductor laser is determined by the junction resistance between the electrode (7) and the p-type ohmic layer (6) and the p-type ohmic layer (6).
) is determined by the specific resistance. To reduce the junction resistance, it is necessary to increase the carrier concentration by adding a high concentration of impurity to the p-type ohmic layer (6), but with the InP composition, the carrier concentration is 1019cI.
It is difficult to achieve a carrier concentration of n-3 or higher. On the other hand, the InGaAs composition can easily be doped at a high concentration, resulting in low resistance.
更にバンドギャップがＩｎＰの場合１．３５ ｅＶで必
るのに対し、Ｉｒ１ＧａＡＳの場合０．７５ｅＶと約１
７２と小さく、オーミック接合が極めて容易でおる。Furthermore, the band gap is 1.35 eV for InP, whereas it is 0.75 eV for Ir1GaAS, which is about 1
72, making ohmic connection extremely easy.
即ち、ＩｎＧａＡｓをオーミック層とすることにより、
高濃度キャリアによる低抵抗層とでき、更にバンドギャ
ップが小ざく、レーザダイオード抵抗を小さくできる。That is, by using InGaAs as an ohmic layer,
A low-resistance layer with a high concentration of carriers can be obtained, and the band gap is small, making it possible to reduce the laser diode resistance.
また更に、レーザダイオードの高速化のためには、埋め
込み層（４）、（５）のｐ−ｎ接合の空乏層の容量を低
減することが好ましい。ｎ型ＩｎＰ埋め込み層（５）の
空乏層容量低減にはキャリア濃度低減と層厚の増大が必
要であるが、本実施例の如り５１０２被覆による埋め込
み層（４）、（５）の成長では、十分な厚さのｎ型Ｉｎ
Ｐ埋め込み層（５）の成長が可能でおる。特に、埋め込
み層の容量を小さくするためには、ｎ型ＩｎＰ埋め込み
層（５）のキャリア濃度は２Ｘ１０１６ｃｍ″′３以下
にすると効果的で必る。またｎ型ＩｎＰ埋め込み層（５
）の厚さを１μｍ以上にすることで容量の低減はより容
易になる。Furthermore, in order to increase the speed of the laser diode, it is preferable to reduce the capacitance of the depletion layer of the pn junction of the buried layers (4) and (5). To reduce the depletion layer capacitance of the n-type InP buried layer (5), it is necessary to reduce the carrier concentration and increase the layer thickness, but the growth of the buried layers (4) and (5) by coating with 5102 as in this example , a sufficiently thick n-type In
It is possible to grow a P buried layer (5). In particular, in order to reduce the capacitance of the buried layer, it is effective to keep the carrier concentration of the n-type InP buried layer (5) below 2X1016 cm'''3.
) The capacitance can be more easily reduced by setting the thickness of the layer to 1 μm or more.
従って本発明による光半導体装置では、低抵抗で且つ低
容量のレーザダイオードが得られ、基本モードで高速な
変調が可能となる。Therefore, in the optical semiconductor device according to the present invention, a laser diode with low resistance and low capacity can be obtained, and high-speed modulation in the fundamental mode is possible.
（発明の他の実施例）
上述実施例で用いたＩｎＧａＡｓからなるオーミック層
（６）はＩｎＧａＡｓＰ層を用いても同等の効果が得ら
れる。またＩｎＧａＡｓＰとＩ ｒｌＧａＡｓの積層に
しても同等の効果が得られる。更に、活性層（２）とク
ラッド層（３）との間、または活性層（２）とクドッド
（９）との間にＩｎＧａＡｓＰ先導波路層を形成するこ
とで発振モードの制御が可能となるが、このような＠造
においても本発明は適応できる。(Other Embodiments of the Invention) Similar effects can be obtained even if an InGaAsP layer is used as the ohmic layer (6) made of InGaAs used in the above embodiments. Furthermore, the same effect can be obtained by stacking InGaAsP and IrlGaAs. Furthermore, by forming an InGaAsP guiding waveguide layer between the active layer (2) and the cladding layer (3) or between the active layer (2) and the cladding layer (9), the oscillation mode can be controlled. , the present invention can also be applied to such @ structures.
以上のように本発明によれば、低抵抗、低容量で基本横
モードで発撮する光半導体装置が得られる。As described above, according to the present invention, it is possible to obtain an optical semiconductor device that has low resistance and low capacitance and that emits images in the fundamental transverse mode.
第１図は本発明の一実施例を示す断面図、第２図は従来
例を説明する断面図でおる。
（１）・・・ｎ型ＩｎＰ基板、
（２）−Ｉ ｎ Ｇ ａ Ａ Ｓ Ｐ活性層、（３）・
・・ｐ型１ｎＰクラッド層、
（４）・・・ｐ型１ｎＰ埋め込み層、
（５）・・・ｐ型ＩｎＰ埋め込み層、
（６）−Ｄ型ＩｎＧａＡｓ層、
（７）・・・ｎ−オーミック電極、
（８）・・・ｐ−オーミック電極、
（９）・・・ｎ型ＩｎＰクラッド層。
代理人 弁理士 則 近 憲 佑
同 大胡典夫
第１図
第２図FIG. 1 is a sectional view showing one embodiment of the present invention, and FIG. 2 is a sectional view illustrating a conventional example. (1)...n-type InP substrate, (2)-InGaASP active layer, (3)...
...p-type 1nP cladding layer, (4)...p-type 1nP buried layer, (5)...p-type InP buried layer, (6)-D-type InGaAs layer, (7)...n-ohmic electrode, (8)... p-ohmic electrode, (9)... n-type InP cladding layer. Agent Patent Attorney Norio Chika Yudo Norio Ogo Figure 1 Figure 2
Claims (1)
ストライプ層の両側面を異なる２つの導電型のＩｎＰ埋
め込み層で埋め込み、前記ＩｎＰクラッド層と前記Ｉｎ
Ｐ埋め込み層の上にＩｎＧａＡｓまたはＩｎＧａＡｓＰ
オーミック層を成長させたことを特徴とする光半導体装
置。Both sides of a stripe layer in which an InGaAsP active layer is sandwiched between InP cladding layers are buried with two InP buried layers of different conductivity types, and the InP cladding layer and the InP cladding layer are
InGaAs or InGaAsP on the P buried layer
An optical semiconductor device characterized by growing an ohmic layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16781386A JPS6325991A (en) | 1986-07-18 | 1986-07-18 | Optical semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16781386A JPS6325991A (en) | 1986-07-18 | 1986-07-18 | Optical semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6325991A true JPS6325991A (en) | 1988-02-03 |
Family
ID=15856580
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16781386A Pending JPS6325991A (en) | 1986-07-18 | 1986-07-18 | Optical semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6325991A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07202333A (en) * | 1993-12-28 | 1995-08-04 | Nec Corp | Manufacture of semiconductor optical waveguide element of buried structure |
| US5721751A (en) * | 1993-10-28 | 1998-02-24 | Nippon Telegraph & Telephone Corporation | Semiconductor laser |
-
1986
- 1986-07-18 JP JP16781386A patent/JPS6325991A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5721751A (en) * | 1993-10-28 | 1998-02-24 | Nippon Telegraph & Telephone Corporation | Semiconductor laser |
| JPH07202333A (en) * | 1993-12-28 | 1995-08-04 | Nec Corp | Manufacture of semiconductor optical waveguide element of buried structure |
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