JPS6325919A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS6325919A
JPS6325919A JP16925086A JP16925086A JPS6325919A JP S6325919 A JPS6325919 A JP S6325919A JP 16925086 A JP16925086 A JP 16925086A JP 16925086 A JP16925086 A JP 16925086A JP S6325919 A JPS6325919 A JP S6325919A
Authority
JP
Japan
Prior art keywords
semiconductor substrate
cathode
electrode
semiconductor
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16925086A
Other languages
Japanese (ja)
Other versions
JPH07105366B2 (en
Inventor
Takashi Jinbo
神保 隆
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Components Co Ltd
Original Assignee
Toshiba Components Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Components Co Ltd filed Critical Toshiba Components Co Ltd
Priority to JP16925086A priority Critical patent/JPH07105366B2/en
Publication of JPS6325919A publication Critical patent/JPS6325919A/en
Publication of JPH07105366B2 publication Critical patent/JPH07105366B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

PURPOSE:To form an electrode onto a semiconductor substrate in extremely uniform film thickness, and to obtain a semiconductor device having excellent mechanical characteristics and electrical characteristics by concentrically arranging an auxiliary electrode to the semiconductor substrate as a cathode in an electrolytic plating tank and applying fixed voltage between anodes. CONSTITUTION:A ring-shaped auxiliary cathode 15 is dipped in a plane including a semiconductor substrate 11 in arrangement concentric to the semiconductor substrate 11 in an electrolyte 13. The auxiliary cathode 15 is formed by silicon having the same quality as the semiconductor substrate 11 and resistivity of 15-20OMEGA-cm, thickness (t) is set to 1mm, an inside diameter D1 to 66mm and an outside diameter to 76mm, and the cathode 15 is dipped, shaping a clearance of approximately 2mm between the cathode 15 and the semiconductor substrate 11. Fixed voltage is applied among the semiconductor substarte 11 and the auxiliary cathode 15 and anodes 14 by power supplies 16a, 16b. 1-4A currents are conducted among the anodes 14 and the semiconductor substrate 11 for approximately two min., and Ni in thickness of 0.5mum is precipitated on the surfaces of the semiconductor substrate 11 through electrolytic plating, thus shaping electrode plating films. The semiconductor substrate 11 is taken but of an electrolytic plating tank 12, and the electrode plating films are patterned through a photoetching method and an electrode is formed, thus acquiring a semiconductor device.

Description

【発明の詳細な説明】 [産業上の利用分野コ 本発明は、半導体装置の製造方法に関する。[Detailed description of the invention] [Industrial application fields] The present invention relates to a method for manufacturing a semiconductor device.

[従来の技術] 従来、半導体装置は、例えば第4図に示すような電解メ
ッキ槽を用いて半導体基板1の面に電極メッキ膜を形成
し、この電極メッキ膜をパターニングして所定の電極と
することによシ製造されている。半導体基板Jは、電解
メッキ槽2内の′に屏液3中に陰極として浸漬されてい
る。電解液3内には、半導体基板1の面に対向するよう
にして陽極4が浸漬されている。
[Prior Art] Conventionally, in a semiconductor device, an electrode plating film is formed on the surface of a semiconductor substrate 1 using, for example, an electrolytic plating bath as shown in FIG. 4, and this electrode plating film is patterned to form a predetermined electrode. It is manufactured by A semiconductor substrate J is immersed in a liquid 3 in an electrolytic plating bath 2 as a cathode. An anode 4 is immersed in the electrolytic solution 3 so as to face the surface of the semiconductor substrate 1 .

而して、クリップ5を介して電源6により半導体基板1
と陽極4間に所定の電圧を印加し、電解メッキによって
半導体基板1の面に金属を析出させて電極メッキ膜を形
成する。次いで、電極メッキ膜をパターニングして所定
の電極を形成することにより半導体装置を得る。
Thus, the semiconductor substrate 1 is connected to the power source 6 via the clip 5.
A predetermined voltage is applied between the anode 4 and the anode 4, and metal is deposited on the surface of the semiconductor substrate 1 by electrolytic plating to form an electrode plating film. Next, a semiconductor device is obtained by patterning the electrode plating film to form predetermined electrodes.

[発明が解決しようとする問題点] しかしながら、上述のようにして半導体装置を得るもの
では、半導体基板1の周辺領域で電流密度が大きくなり
、他の領域に比べて電極メッキ膜の膜厚゛が著しく大き
くなる。このような電極メッキ膜から作られた電極は、
当然その厚さが不均一である。また、このようにして形
成された電極と半導体基板1の膨張係数が異なるため、
電極が剥れたシ或は半導体基板1に欠陥が発生したりし
易い。その結果、半導体装置の機械的特性及び電気的特
性を十分に向上できない問題があった。
[Problems to be Solved by the Invention] However, in the semiconductor device obtained as described above, the current density is large in the peripheral region of the semiconductor substrate 1, and the thickness of the electrode plating film is smaller than that in other regions. becomes significantly larger. Electrodes made from such electrode plating films are
Naturally, the thickness is non-uniform. Moreover, since the expansion coefficients of the electrode formed in this way and the semiconductor substrate 1 are different,
The electrodes are likely to peel off or defects may occur in the semiconductor substrate 1. As a result, there was a problem in that the mechanical properties and electrical properties of the semiconductor device could not be sufficiently improved.

[問題点を解決するための手段コ 本発明は、所定の電解液中に半導体基板を陰極として浸
漬し、該半導体基板の面に対向するようにして陽極を浸
漬すると共に、該半導体基板を含む平面内に該半導体基
板と同心円状の配置で補助陰極を浸漬し、前記陽極と該
補助陰極及び該半導体基板間に所定の電圧を印加して該
半導体基板の面に電極メッキ膜を形成することを特徴と
する半導体装置の製造方法である。
[Means for Solving the Problems] The present invention involves immersing a semiconductor substrate as a cathode in a predetermined electrolytic solution, immersing an anode so as to face the surface of the semiconductor substrate, and including the semiconductor substrate. An auxiliary cathode is immersed in a plane concentrically with the semiconductor substrate, and a predetermined voltage is applied between the anode, the auxiliary cathode, and the semiconductor substrate to form an electrode plating film on the surface of the semiconductor substrate. A method of manufacturing a semiconductor device is characterized in that:

[作用] 本発明に係る半導体装置の製造方法によれば、1!屏メ
ツキ槽内に陰極である半導体基板と同心円状に補助陰極
を配置して陽極間に所定の電圧を印加し、半導体基板の
面に電極メッキ膜を形成する。
[Function] According to the method for manufacturing a semiconductor device according to the present invention, 1! An auxiliary cathode is arranged concentrically with the semiconductor substrate serving as a cathode in the plating bath, and a predetermined voltage is applied between the anodes to form an electrode plating film on the surface of the semiconductor substrate.

この電極メッキ膜を・fターニングして所定の電極とす
るので、得られた電極は極めて均一な膜厚を有する。そ
の結果、機械的特性及び電気的特性に優れた半導体装置
を容易に得ることができる。
Since this electrode plating film is turned into a predetermined electrode, the obtained electrode has an extremely uniform film thickness. As a result, a semiconductor device with excellent mechanical and electrical properties can be easily obtained.

[実施例コ 以下、本発明の実施例について図面を参照して説明する
。第1図は、本発明方法にて使用する電解メッキ槽の構
成を示す説明図である。なお、この実施例は、本発明を
整流素子からなる半導体装置の製造に適用したものであ
る。図中11は、電解メッキ槽12内の電解液13中に
陰極として浸漬された半導体基板である。半導体基板1
1は、直径2.5インチ、比抵抗15〜20Ω−口、厚
さ250μのN形シリコン基板で形成されている。半導
体基板11内には所定の深さで接合が形成されている。
[Embodiments] Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is an explanatory diagram showing the structure of an electrolytic plating bath used in the method of the present invention. In this example, the present invention is applied to the manufacture of a semiconductor device comprising a rectifying element. In the figure, 11 is a semiconductor substrate immersed as a cathode in an electrolytic solution 13 in an electrolytic plating bath 12. Semiconductor substrate 1
1 is formed of an N-type silicon substrate having a diameter of 2.5 inches, a specific resistance of 15 to 20 Ω, and a thickness of 250 μm. A junction is formed within the semiconductor substrate 11 at a predetermined depth.

電解液13は、硫酸ニッケルアンモニウム10重量部、
ホウ酸1重量部、塩化アンモニウム1重量部に純水88
重量部の比率で混合した水溶液から構成されている。t
wI液1液内3内、半導体基板11の面に対向してNi
板からなる陽極14が浸漬されている。また、電解液1
3内には、第2図に示すようなリング状の補助陰極15
が、半導体基板11を含む平面内に半導体基板11を同
心円状の配置で浸漬されている。補助陰極J5は、半導
体基板11と同質の比抵抗が15〜20Ω−αのシリコ
ンで形成され、肉厚tが1閣、内径DIが66闇、外径
D2が76聾に設定され、半導体基板I)との間に約2
鰭の隙間を設けて浸漬されている。半導体基板J1及び
補助陰極15と陽極14間には、電源16m、16bに
よシ所定の電圧が印加されるようになっている。
The electrolytic solution 13 includes 10 parts by weight of nickel ammonium sulfate,
1 part by weight of boric acid, 1 part by weight of ammonium chloride, 88 parts by weight of pure water
It consists of an aqueous solution mixed in parts by weight. t
Inside the wI solution 1, Ni is placed opposite the surface of the semiconductor substrate 11.
An anode 14 made of a plate is immersed. In addition, electrolyte 1
3 includes a ring-shaped auxiliary cathode 15 as shown in FIG.
However, the semiconductor substrates 11 are immersed in a concentric arrangement within a plane including the semiconductor substrates 11. The auxiliary cathode J5 is made of silicon having a specific resistance of 15 to 20 Ω-α, which is the same as that of the semiconductor substrate 11, and has a wall thickness t of 1 mm, an inner diameter DI of 66 mm, an outer diameter D2 of 76 mm, and a semiconductor substrate 11. I) about 2
It is immersed with gaps between the fins. A predetermined voltage is applied between the semiconductor substrate J1 and the auxiliary cathode 15 and anode 14 by power supplies 16m and 16b.

而して、陽極14と半導体基板11間に1〜4Aの電流
を約2分間通電し、半導体基板11の面に電解メッキに
よp厚さ0.5μのN1を析出させX極メッキ膜を形成
した。次いで、電極メッキ膜を形成した半導体基板1ノ
を電解メッキ槽12から取出し、周知の写真食刻法にて
電極メッキ膜をパターニングして電極を形成し、半導体
装置を得た。
Then, a current of 1 to 4 A is passed between the anode 14 and the semiconductor substrate 11 for about 2 minutes, and N1 with a thickness of 0.5 μm is deposited on the surface of the semiconductor substrate 11 by electrolytic plating to form an X-electrode plating film. Formed. Next, the semiconductor substrate 1 on which the electrode plating film was formed was taken out from the electrolytic plating bath 12, and the electrode plating film was patterned by a well-known photolithography method to form electrodes, thereby obtaining a semiconductor device.

この場合、電極メッキ膜の膜厚は第3図に特性線■にて
示す如く、半導体基板11の面金面に亘って極めて均一
なものであった。得られた半導体装置の電極の厚さも均
一なものでちゃ、半導体装置は機械的特性及び電気的特
性に優れたものであることが実験的に確認された。
In this case, the thickness of the electrode plating film was extremely uniform over the metal surface of the semiconductor substrate 11, as shown by the characteristic line (2) in FIG. It has been experimentally confirmed that if the thickness of the electrodes of the obtained semiconductor device is uniform, the semiconductor device will have excellent mechanical and electrical properties.

因みに、第4図に示した従来の方法にて形成された電極
メッキ膜の膜厚は第3図に特性線■にて併記したように
、半導体基板10周辺領域で著しく厚肉のものになって
いることが判った。
Incidentally, the film thickness of the electrode plating film formed by the conventional method shown in FIG. 4 is significantly thicker in the area around the semiconductor substrate 10, as shown in FIG. 3 by the characteristic line (■). It turns out that there is.

なお、補助陰極15は、銅や二、ケル等の金属で形成し
ても良く、又、その形状は半導体基板11の性状等に応
じて適宜設定するのが好ましい。
Note that the auxiliary cathode 15 may be formed of metal such as copper or copper, and its shape is preferably set appropriately depending on the properties of the semiconductor substrate 11 and the like.

[発明の効果コ 以上説明した如く、本発明に係る半導体装置の製造方法
によれば、半導体基板上に極めて均一な膜厚でt極を形
成して機械的特性及び電気的特性に優れた半導体装置を
容易に得ることができるものである。
[Effects of the Invention] As explained above, according to the method for manufacturing a semiconductor device according to the present invention, a t-pole is formed on a semiconductor substrate with an extremely uniform film thickness, thereby producing a semiconductor with excellent mechanical and electrical properties. The device can be easily obtained.

【図面の簡単な説明】 第1図は、本発明方法にて使用する電解メッキ槽の構成
を示す説明図、第2図は、補助陰極を示す説明図、第3
図は、電極メッキ膜の厚さと半導体基板上の位置との関
係を示す特性図、第4図は、従来の方法にて使用する電
解メッキ槽の構成を示す説明図である。 11・・・半導体基板、12・・・電解メッキ槽、ノ3
・・・電解液、14・・・陽極、15・・・補助陰極、
16m。 16b・・・電源。 出願人代理人  弁理士 鈴 江 武 彦第1図 (A)(B) 第2図
[Brief Description of the Drawings] Fig. 1 is an explanatory diagram showing the configuration of an electrolytic plating bath used in the method of the present invention, Fig. 2 is an explanatory diagram showing an auxiliary cathode, and Fig.
The figure is a characteristic diagram showing the relationship between the thickness of the electrode plating film and the position on the semiconductor substrate, and FIG. 4 is an explanatory diagram showing the configuration of an electrolytic plating bath used in the conventional method. 11... Semiconductor substrate, 12... Electrolytic plating tank, No. 3
... Electrolyte, 14... Anode, 15... Auxiliary cathode,
16m. 16b...Power supply. Applicant's agent Patent attorney Takehiko Suzue Figure 1 (A) (B) Figure 2

Claims (1)

【特許請求の範囲】[Claims]  所定の電解液中に半導体基板を陰極として浸漬し、該
半導体基板の面に対向するようにして陽極を浸漬すると
共に、該半導体基板を含む平面内に該半導体基板と同心
円状の配置で補助陰極を浸漬し、前記陽極と該補助陰極
及び該半導体基板間に所定の電圧を印加して該半導体基
板の面に電極メッキ膜を形成することを特徴とする半導
体装置の製造方法。
A semiconductor substrate is immersed as a cathode in a predetermined electrolytic solution, an anode is immersed so as to face the surface of the semiconductor substrate, and an auxiliary cathode is arranged concentrically with the semiconductor substrate within a plane containing the semiconductor substrate. 1. A method of manufacturing a semiconductor device, comprising: immersing the anode, the auxiliary cathode, and the semiconductor substrate, and applying a predetermined voltage between the anode, the auxiliary cathode, and the semiconductor substrate to form an electrode plating film on the surface of the semiconductor substrate.
JP16925086A 1986-07-18 1986-07-18 Method for manufacturing semiconductor device Expired - Lifetime JPH07105366B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16925086A JPH07105366B2 (en) 1986-07-18 1986-07-18 Method for manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16925086A JPH07105366B2 (en) 1986-07-18 1986-07-18 Method for manufacturing semiconductor device

Publications (2)

Publication Number Publication Date
JPS6325919A true JPS6325919A (en) 1988-02-03
JPH07105366B2 JPH07105366B2 (en) 1995-11-13

Family

ID=15883026

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16925086A Expired - Lifetime JPH07105366B2 (en) 1986-07-18 1986-07-18 Method for manufacturing semiconductor device

Country Status (1)

Country Link
JP (1) JPH07105366B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008023113A (en) * 2006-07-21 2008-02-07 Nippon Shikizai Inc Molding apparatus and molding method of cosmetic

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008023113A (en) * 2006-07-21 2008-02-07 Nippon Shikizai Inc Molding apparatus and molding method of cosmetic

Also Published As

Publication number Publication date
JPH07105366B2 (en) 1995-11-13

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