JPS6325390B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a form detection circuit for detecting a form in an optical character reading device or the like.

Generally, in an optical character reading device, since reading is performed while the form is running, it is necessary to control the form within the running path. To this end, the vehicle includes a form detection circuit that outputs a signal that optically detects a form when the form passes a predetermined location on the travel path. To detect the length and position of the form,
This form detection circuit needs to accurately determine the leading and trailing edges of the form.

Conventional form detection circuits simply generate a signal that becomes logic "0" when the form covers a light-receiving element installed at a predetermined location on the travel path, and becomes logic "1" otherwise (and vice versa). The circuit was designed to do this.

However, when a document with a file punch hole is detected, depending on the position of the hole, the hole often passes over the light receiving element and the file punch hole is detected, resulting in a malfunction. For this reason, most devices limit the punch hole positions on forms. Therefore, it is not possible to apply the optical reading device to existing slips, it is necessary to create new slips, etc., which is troublesome, and there is a drawback that the method lacks versatility.

The present invention has been made in view of the above-mentioned conventional circumstances, and an object of the present invention is to add a waveform correction circuit so that even if the light-receiving element detects a file punch hole, the leading edge and rear edge of the form can be fixed. It outputs a signal that corresponds only to the edges, does not malfunction due to holes in the form, and is not limited in application by the position of the hole in the form.
This provides a versatile form detection circuit.

According to the present invention, there is provided a detection element for detecting a relatively moving form; a first flip-flop that is reset to a second state in response to a hole detection end signal; an inverter circuit that inverts the detection signal from the detection element; and an inverter circuit that inverts the detection signal from the detection element through the inverter circuit. The output of the first flip-flop is set in response to a detection start signal for a hole provided in a form, and the output of the first flip-flop is reset in response to a trailing edge detection signal of the form provided from the detection element via the inverter circuit. 2
There is obtained a form detection circuit characterized in that it includes a flip-flop, and a gate circuit that takes the logical sum of negative outputs from the first and second flip-flops.

Next, the present invention will be explained with reference to drawings of embodiments.

FIG. 1 is a block diagram of an embodiment of the present invention, in which a photoamplifier AMP amplifies a signal from a light receiving element 2 that receives light from a light source 1 and outputs a logic signal PH. (The conventional form detection circuit was composed of the light source 1, the light receiving element 2, and the photoamplifier AMP.) The form 3 runs between the light source 1 and the light receiving element 2,
The logic signal PH is input to the selection circuit SEL as a signal that becomes "1" when the form 3 covers the light receiving element 2, and "0" otherwise. The waveform correction circuit COR inputs the logic signal PH, corrects the distortion of the waveform due to the punched hole, and the output becomes the other input of the selection circuit SEL.

Further, the switching circuit SW outputs a selection signal for selecting one of the two inputs of the selection circuit SEL and taking it out as an output in accordance with the form 3. This consists of a manual changeover switch circuit and a circuit that automatically outputs a changeover signal using a program.
When the punched hole 4 provided in the form 3' sent in the traveling direction 5 passes over the light receiving element 2 as shown in the figure, the signal from the waveform correction circuit COR is selected and the punched hole 4 passes over the light receiving element 2. When the punch hole 4 does not pass through the punch hole 4, or when the form 1 does not have the punch hole 4, the logic signal PH is selected and each is outputted from the selection circuit SEL.

FIG. 2 is a block diagram showing details of the waveform correction circuit COR. The flip-flop F1 has its clock input terminal CP1 supplied with a logic signal PH, its input terminal D1 connected to its inverted output, and its reset terminal MR1 supplied with a reset signal R1. The inverter circuit INV is connected to the logic signal PH, and the flip-flop F2 is connected to the clock input terminal.
The inverter circuit INV is connected to CP2, the output of the flip-flop F1 is connected to the input terminal D2, and the inverted outputs of the inverter circuit INV and the flip-flop F1 are connected to the reset terminal MR2 via an AND gate G2. Flip-flop F1, F2
NAND gate G3 inputting each inverted output
The output A of is supplied to the selection circuit SEL.

The operation of the waveform correction circuit COR when a punch hole provided in a form is detected by passing over the light receiving element 2 will be explained using the time chart shown in FIG.

The two flip-flops F1 and F2 operate when no form is detected and the logic signal PH is "0".
It has been reset in advance by a reset signal R1. At time b when the leading edge of the form is detected by the light receiving element 2, the logic signal PH rises to "1" and the flip-flop F1 is set. Next, at time C when the punch hole reaches the light receiving element 2 and begins to be detected, the logic signal PH temporarily drops to "0", and at this time, since the output of the flip-flop F1 is "1", the output of the flip-flop F2 is is set. Subsequently, at time d when the panty hole passes over the light receiving element 2 and is no longer detected, the logic signal PH rises to "1" again, and since the signal at the input terminal D1 is "0" at this time, the flip-flop F1 is reset. Furthermore, when the trailing edge of the form is detected by the light receiving element 2, the logic signal PH falls to "0" again, and the AND gate G2 is output and the flip-flop F2 is reset. Therefore, the NAND gate G3 rises to "1" at the time b when the leading edge of the form is detected, and falls to "0" at the time e when the trailing edge is detected, producing an output A that is not affected by the punched hole. Supplies to selection circuit SEL.

As explained above, by providing a waveform correction circuit, the present invention outputs a signal corresponding only to the leading edge and trailing edge of a form, and detects the position of the hole in the form without causing a malfunction due to the hole in the form. It has a versatile effect without being limited in its application.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of one embodiment of the present invention, and FIG.
The figure is a block diagram showing details of the waveform correction circuit COR shown in Fig. 1, Fig. 3 is a waveform diagram for explaining the operation of the waveform correction circuit COR shown in Fig. 2, and Fig. 4 is a block diagram showing the details of the waveform correction circuit COR shown in Fig. 2. FIG. 3 is a plan view of an example of a form 3'. 1... Light source, 2... Light receiving element, 3... Form, 4
...Punch hole, AMP...Photoamplifier circuit, COR
...Waveform correction circuit, SEL...Selection circuit, SW...
Switching circuit, F1, F2...Flip-flop.

Claims (1)

[Scope of Claims] 1. A detection element that detects a relatively moving form; and a detection element that is set to a first state in response to a detection signal of the leading edge of the form from this detection element, and a detection element that detects a relatively moving form; a first flip-flop that is reset to a second state in response to a detection completion signal for holes provided in the form; an inverter circuit that inverts the detection signal from the detection element; In response to the hole detection start signal given from the element, the first
a second flip-flop which sets the output of the flip-flop and is reset in response to the trailing edge detection signal of the form applied from the detection element via the inverter circuit; 1. A form detection circuit comprising: a gate circuit that performs an OR operation with the negative output of a flip-flop.