JPS63249059A - Abnormality detector of contactless contactor - Google Patents

Abnormality detector of contactless contactor

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Publication number
JPS63249059A
JPS63249059A JP62084131A JP8413187A JPS63249059A JP S63249059 A JPS63249059 A JP S63249059A JP 62084131 A JP62084131 A JP 62084131A JP 8413187 A JP8413187 A JP 8413187A JP S63249059 A JPS63249059 A JP S63249059A
Authority
JP
Japan
Prior art keywords
circuit
abnormality detection
output
phase
detection device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62084131A
Other languages
Japanese (ja)
Other versions
JPH0763206B2 (en
Inventor
Kazuo Itoga
糸賀 一穂
Junzo Tanaka
順造 田中
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP62084131A priority Critical patent/JPH0763206B2/en
Publication of JPS63249059A publication Critical patent/JPS63249059A/en
Publication of JPH0763206B2 publication Critical patent/JPH0763206B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Testing Electric Properties And Detecting Electric Faults (AREA)
  • Protection Of Static Devices (AREA)

Abstract

PURPOSE:To detect open trouble and continuity trouble regardless of the phase of trouble, by judging whether a three-phase contactless contactor SSC is normal or abnormal on the basis of the operation signal of SSC and an interpole voltage signal. CONSTITUTION:When a switch 10 and SSC 2 are closed, for example, it is assumed that an R-phase thyristor 2b generates open trouble. Herein, points A, B are H and points C, D are L and, since a switch 80 is opened, a point E is also L. As a result, the output of an OR circuit 87 is L, that of a NAND circuit 86 is H and that of an inverter 88 is L and, therefore, the output of an AND circuit 89 becomes L. Since the output of an OR circuit 90 is H and that of an AND circuit 91 is H, the output of an OR circuit 92 becomes H and a breaker 12 is closed. When the switch 10 and SSC 2 are opened, for example, it is assumed that the R-phase thyristor 2b generates power continuity trouble. At this time, the points A, B are L and the points C, D are H and, when the switch 80 is opened, the point E becomes L. Whereupon, the breaker 12 is closed and a power source RST is connected to SSC 2 and the output H of the circuit 92 shuts off the breaker 12 through a delay circuit 8.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 −本発明はサイリ・メタをスイッチング素子とする三相
無接点接触器(以下この無接点接触器をSSCと略称す
る)の異常を検出するSSCの異常検出装置に関する。
[Detailed Description of the Invention] [Industrial Application Field] - The present invention detects an abnormality in a three-phase non-contact contactor (hereinafter this non-contact contactor will be abbreviated as SSC) using Saili-Meta as a switching element. The present invention relates to an abnormality detection device for SSC.

〔従来の技術〕[Conventional technology]

SSCは複数のサイリスタとそのそれぞれの制御回路を
1個のケースに収納して三相電気回路を開閉するために
用いる。このSSCは電気的機械的損耗部が壜<、頻繁
な開閉に耐えるから三相モータをはじめ各種三相負荷の
開閉に用いられているが、各相に挿入されたサイリスタ
はそれぞれゼロクロス回路を有する点弧回路で閉じるの
でそのうちの一部の点弧回路やサイリスタが故障を起こ
すことがあると負荷が不平衡になったり、三相モータの
場合単相で運転されて焼損するような事故が発生する。
The SSC is used to open and close a three-phase electric circuit by housing a plurality of thyristors and their respective control circuits in one case. This SSC is used for switching various three-phase loads including three-phase motors because the electrical and mechanical wear parts are resistant to frequent opening and closing, but the thyristors inserted in each phase each have a zero-cross circuit. Since the motor is closed by the ignition circuit, if some of the ignition circuits or thyristors fail, the load may become unbalanced, or if a three-phase motor is operated on a single phase, an accident may occur such as burnout. do.

そこで従来第6図に示すような異常検出装置を設けてS
SCの異常を検出し、早期に処理する方法がとられてい
る0ここで三相モータ1は5SC2を介して電源R8T
相に接続されている。異常検出装置3は操作入力検出回
路4、整流回路6、平滑回路7、遅延回路8、リレー回
路9を備え、操作入力検出回路4は補助リレー5を有し
操作スイッチ10を介して電源R8相に接続された5S
C2の点弧回路2aと並列に接続されている。SSCの
出力側UVW相には三相全波整流回路6が接続され、こ
の整流回路6の直流出力電圧は出力リレー5の常閉接点
5aを介して平滑回路7で平滑化され、遅延回路8で遅
延されてリレー回路9に入力する。リレー回路9は切換
接点11aを有する出力リレー11を備え、この出力リ
レー11の接点11aを例えばこの5SC2と直列にこ
の5SC2の電源側に接続された図示しない配線用遮断
器の引外しコイルに接続し、5SC2が異常のときこの
引、外しコイルで配線用遮断器を遮断するように構成す
る。勿論接点11aで光や音響による告知装置を動作さ
せることもできる08SC2が健全のときスイッチ10
を閉じるとこの操作入力で点弧回路2aが動作して5S
C2が閉じ、モータ1が始動する0このとき操作入力検
出回路4にも操作入力が与えられるから検出回路4の出
力、リレー5が動作し、常閉接点5aを開き、異常検出
装置3は動作せず出力リレー11は動作しない〇 勿論操作スイッチ10を開いていれば5SC2は閉じな
いからモータIKは電圧は印加されない筈である。しか
しもし、このとき5SC2のサイリスクが破損したシ、
点弧回路2aの故障でサイリスタが導通状態になると各
相サイリスタが同時に導通した場合は操作スイッチ10
を閉じないのにモータ1が始動し、二相のサイリスタが
導通した場合はモータ1は始動しないが焼損するおそれ
もあって、何れにしても危険である。しかし、このとき
出力リレー5は動作していないから接点5aは閉じてい
る・したがって負荷側UVW相に現れる電圧は整流回路
6で整流され、平滑回路7で平滑にされ、遅延回路8で
5SC2の異常か否か確認して5SC2の異常が事実で
あれば出力回路9で出力リレー11を動作させて、例え
ば配線用遮断器を引外す。
Therefore, conventionally, an abnormality detection device as shown in Fig. 6 was installed.
A method is used to detect SC abnormalities and handle them at an early stage.0Here, three-phase motor 1 is connected to power supply R8T via 5SC2.
connected to the phase. The abnormality detection device 3 includes an operation input detection circuit 4, a rectification circuit 6, a smoothing circuit 7, a delay circuit 8, and a relay circuit 9. 5S connected to
It is connected in parallel with the ignition circuit 2a of C2. A three-phase full-wave rectifier circuit 6 is connected to the output side UVW phase of the SSC, and the DC output voltage of this rectifier circuit 6 is smoothed by a smoothing circuit 7 via a normally closed contact 5a of an output relay 5, and a delay circuit 8 The signal is delayed and input to the relay circuit 9. The relay circuit 9 includes an output relay 11 having a switching contact 11a, and the contact 11a of this output relay 11 is connected, for example, to a tripping coil of a molded case circuit breaker (not shown) connected in series with this 5SC2 to the power supply side of this 5SC2. However, when 5SC2 is abnormal, the circuit breaker is configured to be shut off by this pull/release coil. Of course, the contact 11a can also operate a light or acoustic notification device.When 08SC2 is healthy, the switch 10
When closed, the ignition circuit 2a is operated by this operation input and 5S is activated.
C2 closes and the motor 1 starts. At this time, the operation input is also given to the operation input detection circuit 4, so the output of the detection circuit 4 and the relay 5 are activated, opening the normally closed contact 5a, and the abnormality detection device 3 is activated. If the operation switch 10 is open, 5SC2 will not close, so no voltage will be applied to the motor IK. However, if 5SC2's Sairisk is damaged at this time,
When the thyristor becomes conductive due to a failure in the ignition circuit 2a, if the thyristors of each phase become conductive at the same time, the operation switch 10
If the motor 1 starts without closing the thyristor and the two-phase thyristor becomes conductive, the motor 1 will not start but there is a risk of burnout, which is dangerous in any case. However, at this time, the output relay 5 is not operating, so the contact 5a is closed. Therefore, the voltage appearing on the UVW phase on the load side is rectified by the rectifier circuit 6, smoothed by the smoothing circuit 7, and then by the delay circuit 8 of 5SC2. It is confirmed whether or not there is an abnormality, and if it is true that the 5SC2 is abnormal, the output relay 11 is operated in the output circuit 9, and, for example, a molded circuit breaker is tripped.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

この異常検出装置では、操作スイッチ10を閉じたどき
、入力検出回路4が動作し、出力リレー5の動作で接点
5aは開いているから、もし点弧回路2aの故障やサイ
リスタが破損して不導通状態になり、例えば負荷側W相
に電圧が印加されないと、モータ1は単相電圧の印加で
始動せず焼損のおそれがある。言い換えればこのSSC
の異常検出装置はサイリスタの短絡異常だけが検出され
、投入不能異常は検出できないという欠点がある。
In this abnormality detection device, when the operation switch 10 is closed, the input detection circuit 4 is activated and the contact 5a is opened due to the operation of the output relay 5. Therefore, if the ignition circuit 2a fails or the thyristor is damaged, the malfunction occurs. If the motor 1 is in a conductive state and no voltage is applied to the load-side W phase, for example, the motor 1 will not start due to the application of a single-phase voltage, and there is a risk of burnout. In other words, this SSC
This abnormality detection device has the disadvantage that only short-circuit abnormalities in the thyristor can be detected, and failures that cannot be turned on cannot be detected.

またSSCの3個のサイリスタのうち1個が導通故障を
起こした場合にはSSCの出力側には線間電圧が発生し
ないからこの異常検出装置は動作しない。す々わち三相
SSCの故障の最も多い一相導通故障の検出が不可能で
あり、2個のSSCを用いて三相モータなどを可逆運転
するときに相間短絡を起こすおそれがある。また同じ可
逆運転をするときに、この異常検出装置を使用すると、
開いている筈の一方のSSCに取付けた異常検出装置に
は操作入力が印加されないKもかかわらずこのSSCの
出力端には他方のSSCの相間電圧が現われているから
この異常検出装置は一方のSSCの導通故障と見なして
誤って異常検出してしまう。
Further, if one of the three thyristors of the SSC causes a conduction failure, no line voltage is generated on the output side of the SSC, so this abnormality detection device does not operate. In other words, it is impossible to detect one-phase conduction failure, which is the most common failure of three-phase SSCs, and there is a risk of short-circuiting between phases when two SSCs are used to operate a three-phase motor or the like reversibly. Also, if you use this abnormality detection device when performing the same reversible operation,
Although no operational input is applied to the abnormality detection device attached to one SSC, which is supposed to be open, the phase-to-phase voltage of the other SSC appears at the output terminal of this SSC, so this abnormality detection device is connected to one SSC. An abnormality is mistakenly detected as a continuity failure of the SSC.

このためこの異常検出装置はSSCの可逆運転装置には
使用不可であるという問題がある〇本発明の目的は三相
SSCのサイリスタが1個でも異常があるとこれを検出
するととが可能で、かつ可逆運転装置のSSCにも利用
できるSSCの異常検出装置を提供することにある〇〔
問題点を解決するための手段〕 上述の問題点を解決するため本発明は、各相にスイッチ
ング素子を備え三相電気回路を幽閉するSSCの異常を
検出するSSCの異常検出装置において、前記SSCの
操作入力を検出して操作信号を発する操作入力検出回路
と、前記各スイッチング素子の極間電圧を検出して極間
電圧信号を発する極間電圧検出回路と、前記操作僅号、
極間電圧信号に基づいて動作信号を発する異常検出論理
回路と、前記動作信号を所定時間遅らせる遅延回路と、
前記遅延回路からの動作信号により動作するリレー回路
とを備えているものである◎なお異常検出論理回路は極
間電圧検出回路の一相の導通故障を検出しないようにす
るスイッチ回路を備えることができ、さらに無接点接触
器は電源電圧が印加されているか否かを判別して電源電
圧信号を発する電源電圧判別回路を備え、異常検出論理
回路は操作信号、極間電圧信号、電源電圧信号に基づい
て動作信号を発することもできる。なおこの異常検出装
置はこのSSCを収納するケース内に一体に組込まれて
いるとよい。
For this reason, there is a problem that this abnormality detection device cannot be used in the reversible operation device of SSC.The purpose of the present invention is to detect an abnormality in even one thyristor of a three-phase SSC. The purpose is to provide an SSC abnormality detection device that can also be used for SSC of reversible operation equipment.
Means for Solving the Problems] In order to solve the above-mentioned problems, the present invention provides an SSC abnormality detection device that detects an abnormality in an SSC that includes a switching element in each phase and confines a three-phase electric circuit. an operation input detection circuit that detects an operation input and issues an operation signal; an inter-electrode voltage detection circuit that detects an inter-electrode voltage of each of the switching elements and issues an inter-electrode voltage signal;
an abnormality detection logic circuit that issues an operation signal based on the inter-electrode voltage signal; and a delay circuit that delays the operation signal for a predetermined period of time.
The abnormality detection logic circuit may include a switch circuit that prevents a continuity failure of one phase of the electrode-to-electrode voltage detection circuit from being detected. Furthermore, the non-contact contactor is equipped with a power supply voltage discrimination circuit that determines whether or not the power supply voltage is applied and issues a power supply voltage signal, and an abnormality detection logic circuit that detects the operation signal, interpolation voltage signal, and power supply voltage signal. It is also possible to issue an operating signal based on this. Note that it is preferable that this abnormality detection device is integrated into a case that houses this SSC.

〔作 用〕[For production]

上述の構成により異常検出論理回路は操作信号と極間電
圧信号に基づいてSSCに故障があると判断すると動作
信号を発して遅延回路で確認し、リレー回路で警報装置
を動作させるとか電源側の回路遮断器を遮断するなどの
動作をする。さらに2個のSSCが可逆運転装置として
接続されているときは、異常検出論理回路は極間電圧検
出回路が一相の導通故障を検出しないようにしたスイッ
チ回路を閉じて可逆運転の際に誤検出しないようにする
。ま九電源電圧判別回路を設け、SSCの電源側に三相
電圧が印加されているか否かを判別し、否のときKは動
作信号を停止しSSCが誤検出することを防止する。こ
のような異常検出装置は5SCVc一体に組込むと取扱
い易い。
With the above configuration, when the abnormality detection logic circuit determines that there is a failure in the SSC based on the operation signal and the voltage signal between poles, it issues an operation signal, confirms it with the delay circuit, and activates the alarm device with the relay circuit or controls the power supply side. Performs actions such as turning off a circuit breaker. Furthermore, when two SSCs are connected as a reversible operation device, the abnormality detection logic circuit closes the switch circuit that prevents the interpolation voltage detection circuit from detecting a continuity failure of one phase, and prevents the error detection logic circuit from detecting a continuity failure in one phase. Avoid detection. A power supply voltage determination circuit is provided to determine whether or not a three-phase voltage is applied to the power supply side of the SSC, and when it is not, K stops the operation signal to prevent the SSC from erroneously detecting it. Such an abnormality detection device is easy to handle when integrated into the 5SCVc.

〔実施例〕〔Example〕

第1図は本発明によるSSCの異常検出装置の一実施例
をブロック図で示し、第6図と同一のものには第6図と
同一の符号を付した。第1図においてモータ1は5SC
2と回路遮断器12の直列回路を介して電源R8TK接
続されている。異常検出装置3は操作入力検出回路4、
電源電圧判別回路50、極間電圧検出回路60、異常検
出論理回路70.遅延回路8、リレー回路9を備え、操
作入力検出回路4は5SC2の操作入力を検出する回路
で操作スイッチ10を介して電源R8相に接続された5
SC2の点弧回路2aと並列に接続され、第2図に示す
ように電源R8相の電圧を分圧抵抗41.42で分圧し
て、この分圧電圧をホトカプラの発光ダイオード43a
に印加している◇電源電圧判別回路50は5SC2に:
電源電圧が印加されているか否か判別するもので第3図
に示すように三相全波整流回路51の入力端が5SC2
の電源側のR8T相に接続され、整流回路51の直流出
力端は分圧抵抗52.53で分圧されて、この分圧電圧
がホトカプラの発光ダイオード54aに接続されている
。極間電圧検出回路60はSSCの各サイリスタの極間
電圧を検出するもので第4図に示すように各抵抗61.
62.63に各ホトカプラの各発光ダイオード64a、
 65a、 66aと、極性を互いに逆に接続した各2
個1組のツェナダイオード67.68.69がすべて直
列に接続された3組の回路が1組ずつ5SC2の各サイ
リスタ2b、2c、2dの極間に接続されている。異常
検出論理回路7゜は第5図に示すように操作入力検出回
路4oの発光ダイオード43aK対するホトトランジス
タ43bと極間電圧検出回路60の各発光ダイオード6
1a。
FIG. 1 shows a block diagram of an embodiment of an SSC abnormality detection device according to the present invention, and the same components as in FIG. 6 are given the same reference numerals as in FIG. 6. In Figure 1, motor 1 is 5SC
2 and the circuit breaker 12 are connected to the power supply R8TK through a series circuit. The abnormality detection device 3 includes an operation input detection circuit 4,
Power supply voltage discrimination circuit 50, electrode voltage detection circuit 60, abnormality detection logic circuit 70. The operation input detection circuit 4 includes a delay circuit 8 and a relay circuit 9, and the operation input detection circuit 4 is a circuit for detecting the operation input of the 5SC2, and is connected to the power supply R8 phase via the operation switch 10.
It is connected in parallel with the ignition circuit 2a of the SC2, and as shown in FIG. 2, the voltage of the R8 phase of the power supply is divided by a voltage dividing resistor 41.
◇The power supply voltage discrimination circuit 50 applied to 5SC2:
This is to determine whether the power supply voltage is applied or not, and as shown in FIG. 3, the input terminal of the three-phase full-wave rectifier circuit 51 is
The DC output end of the rectifier circuit 51 is voltage-divided by voltage-dividing resistors 52 and 53, and this divided voltage is connected to the light-emitting diode 54a of the photocoupler. The electrode-to-electrode voltage detection circuit 60 detects the electrode-to-electrode voltage of each thyristor of the SSC, and as shown in FIG.
At 62.63, each light emitting diode 64a of each photocoupler,
65a, 66a, and each 2 with opposite polarities connected to each other.
Three sets of circuits in which Zener diodes 67, 68, and 69 are all connected in series are connected between the poles of each thyristor 2b, 2c, and 2d of 5SC2. The abnormality detection logic circuit 7°, as shown in FIG.
1a.

62 L 63 aに対する各ホトトランジス、/ 6
1b、 62b。
Each phototransistor for 62 L 63 a / 6
1b, 62b.

63bとがそれぞれ各抵抗71.72,73.74と、
抵抗、コンデンサからなる各平滑回路75.76、77
゜78に接続されて4組の直列回路を形成している。
63b are the respective resistors 71.72, 73.74,
Smoothing circuits 75, 76, 77 consisting of resistors and capacitors
78 to form four series circuits.

各平滑回路75.76.77.78は、各発光ダイオー
ド43a、61a、62a+ 63aが交流で駆動され
るからホトトランジスタ側の信号の脈動を除くものであ
り、各抵抗71.72,73.74は各ホトカプラに進
入するノイズを除くものである0この回路のほかにさら
にスイッチ80と抵抗79を直列に接続したスインチ回
路が設けられSSC2個を可逆運転装置に利用するとき
くこのスイッチ80が閉じられる@これら5組の直列回
路が制御電源VCCK接続されている。抵抗72.平滑
回路76の接続点(仁の点をB点という)と、抵抗74
.平滑回路78の接続点(この点をD点という)とはそ
れぞれ抵抗81.82を介してナンド回路86のそれぞ
れの入力端に接続されている0また抵抗73.平滑回路
77の接続点(この点を0点という)と、スイッチ80
.抵抗79の接続点(この点をE点という)とはそれぞ
れ抵抗8−3.84を介してオア回路87のそれぞれの
入力端に接続されオア回路87の出力端はナンド回路8
6のもう一つの入力端に接続されている0ナンド回路8
6の出力端はアンド回路89の一方の入力端に接続され
、このアンド回路89の他方の入力端には抵抗85とイ
ンバータ88の直列回路を介して抵抗71.平滑回路7
5の接続点(この点をA点という)が接続されている。
Each smoothing circuit 75, 76, 77, 78 removes signal pulsation on the phototransistor side since each light emitting diode 43a, 61a, 62a+ 63a is driven by alternating current, and each resistor 71, 72, 73, 74 In addition to this circuit, a switch 80 and a resistor 79 are connected in series to remove noise that enters each photocoupler. When the two SSCs are used as a reversible operation device, this switch 80 is closed. @These five series circuits are connected to the control power supply VCCK. Resistance 72. The connection point of the smoothing circuit 76 (the point at the bottom is called point B) and the resistor 74
.. The connection point of the smoothing circuit 78 (this point is referred to as point D) is connected to the input terminals of the NAND circuit 86 via resistors 81 and 82, respectively, and resistors 73 and 73, respectively. The connection point of the smoothing circuit 77 (this point is referred to as the 0 point) and the switch 80
.. The connection point of the resistor 79 (this point is referred to as point E) is connected to each input terminal of the OR circuit 87 via the resistor 8-3.84, and the output terminal of the OR circuit 87 is connected to the NAND circuit 8.
0 NAND circuit 8 connected to the other input terminal of 6
6 is connected to one input terminal of an AND circuit 89, and the other input terminal of this AND circuit 89 is connected to a resistor 71.6 through a series circuit of a resistor 85 and an inverter 88. Smoothing circuit 7
5 connection points (this point will be referred to as point A) are connected.

さらにナンド回路86の2つの入力端とオア回路871
つの入力端はそれぞれオア回路90のそれぞれの入力端
に接続され、とのオア回路90の出力端がアンド回路9
1の一方の入力端に接続され、このアンド回路91の他
方の入力端には抵抗85とインバータ88の接続点に接
続されている。このアンド回路91の出力端とアンド回
路89の出力端はオア回路92のそれぞれの入力端に接
続され、とのオア回路92の出力端は抵抗93を介して
、この異常検出論理回路70の出力端として次の遅延回
路8に接続されているOとの異常検出論理回路70出力
端と電源vCCの負極側との間にはトランジスタ94の
コレクタ。
Furthermore, the two input terminals of the NAND circuit 86 and the OR circuit 871
The two input terminals are respectively connected to the respective input terminals of the OR circuit 90, and the output terminal of the OR circuit 90 is connected to the AND circuit 9.
1, and the other input terminal of the AND circuit 91 is connected to a connection point between the resistor 85 and the inverter 88. The output terminal of the AND circuit 91 and the output terminal of the AND circuit 89 are connected to respective input terminals of an OR circuit 92, and the output terminal of the OR circuit 92 is connected to the output terminal of the abnormality detection logic circuit 70 via a resistor 93. A collector of a transistor 94 is connected between the output terminal of the abnormality detection logic circuit 70 and the negative terminal of the power supply vCC, which is connected to the next delay circuit 8 as its terminal.

エミッタが接続され、このベースには抵抗95を介して
電源vCCが接続され、さらにこのペースと電源VCC
の負極側との間に判別回路500発光ダイオード54a
に対するホトトランジスタ54bが接続されている。
The emitter is connected to the base, and the power supply VCC is connected to this base through a resistor 95.
A light emitting diode 54a of the discrimination circuit 500 is connected between the negative electrode side of the
A phototransistor 54b is connected to the phototransistor 54b.

次にこの異常検出回路の動作を示すOまず5S02が正
常の場合スイッチ10を閉じると5SC2が閉じるから
5SC2の極間電圧はほぼ0になり、各ホトトランジス
タ61b、 62b、 63bは不導通状態にある。し
かし発光ダイオード43aには操作入力が印加されるか
らホトトランジスタ43bは閉じる。したがって第5図
のA点がハイレベル(以下このハイレベルをHという)
、B、C,D点がローレベル(以下このローレベルをL
という)になり、スイッチ80が開いていればE点もL
なのでオア回路87の出力はLでナンド回路86の出力
はHになる。またインバータ88の出力はLKなり、ア
ンド回路89の出力はLになる0マ九オア回路90の出
力はしてあり、アンド回路91の出力はLになる。した
がってオア回路92の出力はLであり、トランジスタ9
40オン、オフにかかわらずリレー回路9は動作せず回
路遮断器12が遮断されることはない。次にスイッチ1
0を開いたときSSC2は開くがこのとき各サイリスタ
2b。
Next, we will show the operation of this abnormality detection circuit. First, when 5S02 is normal, when switch 10 is closed, 5SC2 is closed, so the voltage between electrodes of 5SC2 becomes almost 0, and each phototransistor 61b, 62b, 63b becomes non-conductive. be. However, since the operation input is applied to the light emitting diode 43a, the phototransistor 43b is closed. Therefore, point A in Figure 5 is at a high level (hereinafter this high level will be referred to as H).
, B, C, and D points are low level (hereinafter, this low level is referred to as L
), and if switch 80 is open, point E will also be L.
Therefore, the output of the OR circuit 87 is L and the output of the NAND circuit 86 is H. Further, the output of the inverter 88 becomes LK, the output of the AND circuit 89 becomes L, the output of the 0/M9 OR circuit 90 becomes L, and the output of the AND circuit 91 becomes L. Therefore, the output of OR circuit 92 is L, and transistor 9
40 is on or off, the relay circuit 9 does not operate and the circuit breaker 12 is not cut off. Next switch 1
When 0 is opened, SSC2 is opened, but at this time each thyristor 2b.

2c、2dには図示しないスナバ回路が接続されている
からモータ1を介し各サイリスタ2b、2c、2dの極
間に電圧が現われるから、B、C,D点はHになり、こ
のとき操作入力が印加されないからA点はLであり、ス
イッチ80が開いていればE点もLである。したがって
オア回路87の出力はH1ナンド回路86の出力はL1
アンド回路89の出力はL1オア回路90の出力はH1
アンド回路91の出力はLになり、オア回路92の出力
はLである。したがってトランジスタ94のオン、オフ
にかかわらずリレー回路9は動作せず回路遮断器は遮断
しない。
Since a snubber circuit (not shown) is connected to thyristors 2c and 2d, a voltage appears between the poles of each thyristor 2b, 2c, and 2d via the motor 1, so points B, C, and D become H, and at this time, the operation input Since no voltage is applied, point A is at L, and if switch 80 is open, point E is also at L. Therefore, the output of the OR circuit 87 is H1, and the output of the NAND circuit 86 is L1.
The output of the AND circuit 89 is L1 and the output of the OR circuit 90 is H1.
The output of the AND circuit 91 becomes L, and the output of the OR circuit 92 becomes L. Therefore, regardless of whether transistor 94 is on or off, relay circuit 9 does not operate and the circuit breaker does not shut off.

次にSSC2が異常の場合について述べる。スイッチ1
0を閉じて5SC2を閉じたときに例えばR相のサイリ
スタ2bが開放故障を起こしていたとすると、A、B点
は共にHSC,D点は共にLで、スイッチ80が開いて
いるからE点もLである。したがってオア回路87の出
力はLlす/ド回路86の出力はH1インバータ88の
出力はLであるからアンド回路89の出力はLになる。
Next, a case where SSC2 is abnormal will be described. switch 1
For example, if the R-phase thyristor 2b has an open failure when 0 is closed and 5SC2 is closed, points A and B are both HSC, point D is both L, and since switch 80 is open, point E is also closed. It is L. Therefore, the output of the OR circuit 87 is L, the output of the /do circuit 86 is H1, and the output of the inverter 88 is L, so the output of the AND circuit 89 is L.

またオア回路90の出力はHになり、アンド回路91の
出力がHになるからオア回路92の出力はHKなるO8
相、T相のサイリスタ2b、2dがそれぞれ単独に開放
故障を起こしたとき、まえは2つ以上の相が同時に開放
故障を起こしたときも同様にオア回路92の出力はHに
なる0そしてこのとき回路遮断器12が閉じて電源電圧
が健全なら発光ダイオード54aに対するホトトランジ
スタ54bが閉じているからトランジスタ94はオフ状
態にあり、オア回路92の出力Hで遅延回路8を介して
リレー回路9を動作させ、回路遮断器12を遮断する0
またスイッチ10を開いて5SC2を開いたときR相が
導通故障を起こしていたとするとA、B点は共にり、C
,D点が共KHKなる。
Also, the output of the OR circuit 90 becomes H, and the output of the AND circuit 91 becomes H, so the output of the OR circuit 92 becomes HK.
When the phase and T phase thyristors 2b and 2d each individually cause an open failure, or when two or more phases simultaneously cause an open failure, the output of the OR circuit 92 becomes H. When the circuit breaker 12 is closed and the power supply voltage is healthy, the phototransistor 54b for the light emitting diode 54a is closed, so the transistor 94 is in the off state, and the output H of the OR circuit 92 connects the relay circuit 9 via the delay circuit 8. 0 to operate and shut off the circuit breaker 12
Also, if the R phase has caused a continuity failure when switch 10 is opened and 5SC2 is opened, points A and B will be together, and C
, D points are both KHK.

そしてスイッチ80を開いているとE点はLになる。す
ると上述の要領に従ってオア回路92の出力はHKなハ
、S相、T相がそれぞれ単独に導通故障を起こしたとき
も2つ以上の相が同時に導通故障を起こしたときも同様
にオア回路92の出力はHになる。勿論このとき回路遮
断器12が閉じて電源R8Tが健全で5SC2に接続さ
れていればホトトランジスタ54bは閉じているからト
ランジスタ94はオフ状態にあり、オア回路92の出力
Hは遅延回路8.リレ、−回路9を介して回路遮断器1
2を遮断する0 SSC2個を用いて七−夕などの可逆運転をする場合は
2個のSSCの例えばS相が並列接続されるから、可逆
運転中はこの並列運転されたS相のサイリスタ2cは常
に導通状態になる。このため開いている側のSSCに接
続された異常検出装置がこのサイリスタ2cを導通故障
と判定し、異常検出してしまうおそれがある。このため
第5図に示すように可逆運転用のスイッチ80と抵抗7
9からなるスイッチ回路が設けられている。すなわちス
イッチ80を閉じるとE点は常KMになるからS相すイ
リスタが閉じて0点がLになってもオア回路87の出力
は常KHであり、オア回路92の出力はHにならない0
すなわちSSC2個を用いて可逆運転装置とするときは
スイッチ80を閉じるととKより並列接続されたサイリ
スタを導通故障として検出せず回路遮断器12を遮断し
ないようKすることができる。
When the switch 80 is open, the E point becomes L. Then, in accordance with the above-mentioned procedure, the output of the OR circuit 92 is output from the OR circuit 92 in the same way when the HK phase, S phase, and T phase each cause a conduction failure individually, or when two or more phases simultaneously cause a conduction failure. The output of becomes H. Of course, at this time, if the circuit breaker 12 is closed and the power source R8T is healthy and connected to 5SC2, the phototransistor 54b is closed, so the transistor 94 is in the off state, and the output H of the OR circuit 92 is sent to the delay circuit 8. relay, - circuit breaker 1 via circuit 9
When performing reversible operation such as Tanabata using two SSCs, the S-phase of the two SSCs are connected in parallel, so during reversible operation, the parallel-operated S-phase thyristor 2c is always conductive. Therefore, there is a risk that the abnormality detection device connected to the SSC on the open side may determine that the thyristor 2c has a conduction failure and detect an abnormality. Therefore, as shown in FIG. 5, a switch 80 for reversible operation and a resistor 7 are used.
A switch circuit consisting of 9 is provided. That is, when the switch 80 is closed, the E point always becomes KM, so even if the S phase iris closes and the 0 point becomes L, the output of the OR circuit 87 is always KH, and the output of the OR circuit 92 does not become H.
That is, when two SSCs are used to form a reversible operation device, when the switch 80 is closed, the thyristor connected in parallel can be set so as not to be detected as a conduction failure and the circuit breaker 12 not to be cut off.

〔発明の効果〕〔Effect of the invention〕

以上述べたように本発明によれば、SSCの正常と異常
とをSSCの操作信号と極間電圧信号とに基づいて判断
する構成としたのでSSCが閉じているべきときの開放
故障も、SSCが開いているべきときの導通故障も、そ
の故障の相数によらず検出することができる。また2個
のSSCを用いてモータなどを可逆運転する場合は並列
相を導通故障として検出しないようにするスイッチ回路
を設けたから可逆運転時にも誤検出なく対応でき応用範
囲が広くなり、効果は大きい0
As described above, according to the present invention, since the normality or abnormality of the SSC is determined based on the SSC operation signal and the voltage signal between electrodes, an open failure when the SSC should be closed can be prevented. Continuity faults when should be open can also be detected regardless of the number of phases in which the fault occurs. In addition, when two SSCs are used to operate a motor etc. in a reversible manner, a switch circuit is provided to prevent parallel phases from being detected as continuity failures, so it can be used without false detection even during reversible operation, which widens the range of applications and is highly effective. 0

【図面の簡単な説明】[Brief explanation of the drawing]

第1図ないし第5図はそれぞれ本発明によるSSCの異
常検出装置の一実施例を示し、第1図は異常検出装置を
示すブロック図、第2図は操作入力検出回路の結線図、
第3図は電源電圧判別回路の結線図、第4図は極間電圧
検出回路の結線図、第5図は異常検出論理回路の結線図
、第6図は従来のSSCの異常検出回路の一例を示すブ
ロック図である。 2 : SSC,4:操作入力検出回路、8:遅延回路
、9:リレー回路、50:電源電圧判別回路、60:極
間電圧検出回路、70:異常検出論理回路。 第2図     第3図
1 to 5 each show an embodiment of the SSC abnormality detection device according to the present invention, FIG. 1 is a block diagram showing the abnormality detection device, FIG. 2 is a wiring diagram of an operation input detection circuit,
Fig. 3 is a wiring diagram of the power supply voltage discrimination circuit, Fig. 4 is a wiring diagram of the voltage between poles detection circuit, Fig. 5 is a wiring diagram of the abnormality detection logic circuit, and Fig. 6 is an example of the conventional SSC abnormality detection circuit. FIG. 2: SSC, 4: Operation input detection circuit, 8: Delay circuit, 9: Relay circuit, 50: Power supply voltage discrimination circuit, 60: Electrode voltage detection circuit, 70: Abnormality detection logic circuit. Figure 2 Figure 3

Claims (1)

【特許請求の範囲】 1)各相にスイツチング素子を備え三相電気回路を開閉
する無接点接触器の異常を検出する無接点接触器の異常
検出装置において、前記無接点接触器の操作入力を検出
して操作信号を発する操作入力検出回路と、前記各スイ
ツチング素子の極間電圧を検出して極間電圧信号を発す
る極間電圧検出回路と、前記操作信号、極間電圧信号に
基づいて動作信号を発する異常検出論理回路と、前記動
作信号を所定時間遅らせる遅延回路と、前記遅延回路か
らの動作信号により動作するリレー回路とを備えている
ことを特徴とする無接点接触器の異常検出装置。 2)特許請求の範囲第1項記載の無接点接触器の異常検
出装置において、異常検出論理回路は極間電圧検出回路
が一相の導通故障を検出しないようにするスイツチ回路
を備えていることを特徴とする無接点接触器の異常検出
装置。 3)特許請求の範囲第1項記載の無接点接触器の異常検
出装置において、前記無接点接触器は電源電圧が印加さ
れているか否かを判別して電源電圧信号を発する電源電
圧判別回路を備え、異常検出論理回路は操作信号、極間
電圧信号、電源電圧信号に基づいて動作信号を発するこ
とを特徴とする無接点接触器の異常検出装置。 4)特許請求の範囲第1項ないし第3項のいずれかの項
に記載した無接点接触器の異常検出装置において、この
異常検出装置がこの無接点接触器を収納するケース内に
一体に組込まれていることを特徴とする無接点接触器の
異常検出装置。
[Scope of Claims] 1) An abnormality detection device for a non-contact contactor that detects an abnormality in a non-contact contactor that has a switching element in each phase and opens and closes a three-phase electric circuit, in which an operation input of the non-contact contactor is detected. an operation input detection circuit that detects and issues an operation signal; an inter-electrode voltage detection circuit that detects an inter-electrode voltage of each switching element and issues an inter-electrode voltage signal; and operates based on the operation signal and the inter-electrode voltage signal. An abnormality detection device for a non-contact contactor, comprising an abnormality detection logic circuit that emits a signal, a delay circuit that delays the operation signal for a predetermined period of time, and a relay circuit that operates according to the operation signal from the delay circuit. . 2) In the abnormality detection device for a non-contact contactor according to claim 1, the abnormality detection logic circuit includes a switch circuit that prevents the electrode-to-electrode voltage detection circuit from detecting a continuity failure in one phase. An abnormality detection device for a non-contact contactor. 3) In the non-contact contactor abnormality detection device according to claim 1, the non-contact contactor includes a power supply voltage discrimination circuit that determines whether or not a power supply voltage is applied and issues a power supply voltage signal. An abnormality detection device for a non-contact contactor, characterized in that the abnormality detection logic circuit emits an operation signal based on an operation signal, an inter-electrode voltage signal, and a power supply voltage signal. 4) In the abnormality detection device for a non-contact contactor according to any one of claims 1 to 3, the abnormality detection device is integrated into a case housing the non-contact contactor. An abnormality detection device for a non-contact contactor, characterized in that:
JP62084131A 1987-04-06 1987-04-06 Abnormality detection device for contactless contactor Expired - Lifetime JPH0763206B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62084131A JPH0763206B2 (en) 1987-04-06 1987-04-06 Abnormality detection device for contactless contactor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62084131A JPH0763206B2 (en) 1987-04-06 1987-04-06 Abnormality detection device for contactless contactor

Publications (2)

Publication Number Publication Date
JPS63249059A true JPS63249059A (en) 1988-10-17
JPH0763206B2 JPH0763206B2 (en) 1995-07-05

Family

ID=13821950

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62084131A Expired - Lifetime JPH0763206B2 (en) 1987-04-06 1987-04-06 Abnormality detection device for contactless contactor

Country Status (1)

Country Link
JP (1) JPH0763206B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107329031A (en) * 2017-07-14 2017-11-07 北京送变电公司 Contact sequencing device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100929898B1 (en) * 2009-05-20 2009-12-08 주식회사유성계전 System for non-contacting of distributing board and controlling board

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56100039U (en) * 1979-12-27 1981-08-06

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56100039U (en) * 1979-12-27 1981-08-06

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107329031A (en) * 2017-07-14 2017-11-07 北京送变电公司 Contact sequencing device
CN107329031B (en) * 2017-07-14 2023-08-04 北京送变电公司 Contact sequencing device

Also Published As

Publication number Publication date
JPH0763206B2 (en) 1995-07-05

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