JPS63246729A - Two terminal type active matrix liquid crystal display device - Google Patents

Two terminal type active matrix liquid crystal display device

Info

Publication number
JPS63246729A
JPS63246729A JP62080736A JP8073687A JPS63246729A JP S63246729 A JPS63246729 A JP S63246729A JP 62080736 A JP62080736 A JP 62080736A JP 8073687 A JP8073687 A JP 8073687A JP S63246729 A JPS63246729 A JP S63246729A
Authority
JP
Japan
Prior art keywords
liquid crystal
picture elements
crystal display
display device
additive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62080736A
Other languages
Japanese (ja)
Inventor
Shigeyuki Takahashi
重之 高橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Citizen Watch Co Ltd
Original Assignee
Citizen Watch Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Citizen Watch Co Ltd filed Critical Citizen Watch Co Ltd
Priority to JP62080736A priority Critical patent/JPS63246729A/en
Publication of JPS63246729A publication Critical patent/JPS63246729A/en
Pending legal-status Critical Current

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  • Liquid Crystal (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

PURPOSE:To minimize a decrease in the opening rate of picture elements even if the picture elements are formed to high accuracy by constituting both upper and lower electrodes of transparent conductive films. CONSTITUTION:The transparent conductive films are used for both the two electrodes; the upper and lower electrodes 4, 2 of an additive capacity 23 of an active matrix liquid crystal display device using a two-element terminal having the additive capacity formed of the lower electrode, insulator layer and upper electrode for each of the picture elements. The additive capacity parts are transparent and, therefore, even if the additive capacities 23 are formed over the entire surfaces of the picture elements, the decrease in the opening rate of the picture elements and the deterioration in the display performance of the liquid crystal display device are obviated and since the additive capacities can be formed over the entire surface of the picture elements, the formation of the insulator layers 3 of the additive capacities to a larger film thickness is possible. Easy formation of the pinhole-free insulating films 6 is permitted as well.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、二端子素子を用いたアクティブマトリクス液
晶表示装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an active matrix liquid crystal display device using two-terminal elements.

〔従来の技術〕[Conventional technology]

近年、液晶表示装置の大容量化に伴い、コントラスト等
の表示性能向上のために、アクティブマトリクス液晶表
示装置の研究開発が進められている。
In recent years, as the capacity of liquid crystal display devices has increased, research and development of active matrix liquid crystal display devices has been progressing in order to improve display performance such as contrast.

この中で、製造方法、・構造が簡単な二端子素子を用い
た液晶表示装置が注目を集めている。
Among these, liquid crystal display devices using two-terminal elements with simple manufacturing methods and structures are attracting attention.

しかし、二端子素子特に金属−絶縁体−金属素子におい
て、構造上の寄生容量が太きいため、画素の高精細化に
おいて、画素と二端子素子の容量比が十分に取れず、結
果として表示特性の劣化を招く。
However, two-terminal elements, especially metal-insulator-metal elements, have a large structural parasitic capacitance, so when pixel definition is increased, the capacitance ratio between the pixel and the two-terminal element cannot be maintained sufficiently, resulting in display characteristics leading to deterioration.

そこで、各画素に付加容量を形成し、表示特性の劣化を
抑えることが、例えば下記の文献に記載されている。
Therefore, for example, the following document describes that an additional capacitor is formed in each pixel to suppress the deterioration of display characteristics.

平井長音、加藤裕司、苗村省平、谷千束「蓄積コンデン
サ・マ) IJクス構造を用いた高精細MIM−LCD
Jテレビジョン学会技術報告Vo1.10. lI&L
47 pp、 1〜6  昭和62年2月発行〔発明が
解決しようとする問題点〕 しかしながら、これらの付加容量形成に当り、従来技術
では、付加容量の上部および下部電極の一方K例えばタ
ンタル(Ta )等陽極酸化により酸化膜が形成可能で
不透明な金属を導電膜として用いている。
Nagone Hirai, Yuji Kato, Shohei Naemura, Chizoku Tani "Storage capacitor" High-definition MIM-LCD using IJ structure
J Television Society Technical Report Vol. 1.10. lI&L
47 pp, 1-6 Published February 1988 [Problems to be Solved by the Invention] However, in forming these additional capacitors, in the prior art, one of the upper and lower electrodes of the additional capacitors is made of K, for example, tantalum (Ta). ) An opaque metal that can form an oxide film through anodic oxidation is used as the conductive film.

そのため、画素の高精細化に従い、画素面積に対し、付
加容量形成面積の割合が増加し、開口率を著しく低下さ
せてしまう。
Therefore, as the definition of pixels becomes higher, the ratio of the additional capacitance formation area to the pixel area increases, resulting in a significant decrease in the aperture ratio.

このことは、透過型液晶表示装置において、表示性能を
著しく低下させる結果となる。
This results in a significant reduction in display performance in a transmissive liquid crystal display device.

本発明の目的は、画素の高精細化においても、画素の開
口率の低下を最小限に抑える付加容量構造を提供するも
のである。
An object of the present invention is to provide an additional capacitance structure that minimizes a decrease in the aperture ratio of pixels even when pixels have higher definition.

〔問題点を解決するための手段〕[Means for solving problems]

そこで、本発明においては、付加容量形成によって画素
開口率の低下を起こさないために、付加容量の上部およ
び下部電極の二電極ともに透明導電膜を用いることを特
徴とする。
Therefore, the present invention is characterized in that a transparent conductive film is used for both the upper and lower electrodes of the additional capacitor in order to prevent the pixel aperture ratio from decreasing due to the formation of the additional capacitor.

〔実施例〕〔Example〕

本発明は、リングダイオード、バリスタ等の二端子素子
に対し適用できるが、ここでは、金層−絶縁体−金属(
以下MIMと記す)素子を例にとって本発明の実施例を
図面に基づいて詳述する。
The present invention can be applied to two-terminal elements such as ring diodes and varistors, but here, the gold layer-insulator-metal (
Embodiments of the present invention will be described in detail with reference to the drawings, taking a device (hereinafter referred to as MIM) as an example.

第1図は、本発明における実施例のMIM素子、画素及
び付加容量を示す斜視図である。
FIG. 1 is a perspective view showing an MIM element, a pixel, and an additional capacitor according to an embodiment of the present invention.

第1図において、まず、下部ガラス基板1の上に、蒸着
もしくはスパッタリング法によりITO1SnO□等の
透明導電膜を形成し、この透明導電膜を通常のフォトリ
ソグラフィ技術によりパターン化して、下部電極2を形
成する。次に下部電極2の上に、絶縁体層3として五酸
化タンタル(Ta205)を形成する。この絶縁体層3
として、今回はTa206膜をスパッタリング法により
形成したが、透明な絶縁体であれば、Sin、、SiN
 、ポリイミド樹脂等を用いても良く、また形成方法も
、CVD法、蒸着、スピンコーティング法等を用いても
かまわない。次に絶縁体層6の上に、Taをスパッタリ
ング法により膜付し、フォトリングラフィ技術により第
1図の様にパターンニングし、データ線5を形成する。
In FIG. 1, first, a transparent conductive film such as ITO1SnO□ is formed on a lower glass substrate 1 by vapor deposition or sputtering, and this transparent conductive film is patterned by ordinary photolithography technology to form a lower electrode 2. Form. Next, tantalum pentoxide (Ta205) is formed on the lower electrode 2 as an insulating layer 3. This insulator layer 3
In this case, a Ta206 film was formed by sputtering, but if it is a transparent insulator, it can be made of Sin, SiN.
, polyimide resin, etc. may be used, and the forming method may be a CVD method, vapor deposition, spin coating method, or the like. Next, a film of Ta is deposited on the insulator layer 6 by sputtering, and patterned by photolithography as shown in FIG. 1 to form data lines 5.

パターン化されたデータ線5のTaを陽極酸化すること
により、M I M素子の絶縁膜6を形成する。陽極酸
化は、0.1wt%クエン酸水溶液中で30Vの電圧印
加により行い、約50nmの絶縁膜6を形成する。
By anodizing the Ta of the patterned data line 5, an insulating film 6 of the MIM element is formed. The anodic oxidation is performed in a 0.1 wt % citric acid aqueous solution by applying a voltage of 30 V to form an insulating film 6 with a thickness of about 50 nm.

次に、ITO,SnO,等の透明導電膜をスパッタリン
グ法により膜付し、通常のフォトリソグラフィ技術によ
り、画素電極(MIM素子の対向電極を含む)である上
部電極4を形成する。上部電極4の材料および形成方法
は下部電極2と同じである。下部電極2と絶縁体層3と
上部電極4により付加容量23を構成する。
Next, a transparent conductive film such as ITO, SnO, etc. is deposited by sputtering, and the upper electrode 4, which is the pixel electrode (including the counter electrode of the MIM element), is formed by ordinary photolithography. The material and formation method of the upper electrode 4 are the same as those of the lower electrode 2. The lower electrode 2, the insulator layer 3, and the upper electrode 4 constitute an additional capacitor 23.

以上の工程により形成された下部基板21と上部ガラス
基板7と透明電極8により構成される上部基板22との
間に液晶10を形成し、第2図に示す断面図の様に、配
向膜9により配向処理し、シール材11により封止する
通常の液晶セル製造工程に従い液晶セル化する。
A liquid crystal 10 is formed between the lower substrate 21 formed by the above steps and the upper substrate 22 constituted by the upper glass substrate 7 and the transparent electrode 8, and as shown in the cross-sectional view in FIG. 2, an alignment film 9 is formed. A liquid crystal cell is formed according to the usual liquid crystal cell manufacturing process of performing an alignment treatment by using a sealing material 11 and sealing with a sealing material 11.

上記液晶セルにおいて、形成されるマトリックスの等価
回路図を第3図に示す。
FIG. 3 shows an equivalent circuit diagram of the matrix formed in the liquid crystal cell.

データ線26とタイミング線27との間に、二端子素子
25と付加容量26を直列に接続し、まず付加容量23
の充放電状態を制御し、それKより決定された電圧を液
晶24に印加する。液晶240対極は上部ガラス基板7
の透明電極8に接続される。このため付加容量23は液
晶24の容量に対して十分大きいことが必要である。
The two-terminal element 25 and the additional capacitor 26 are connected in series between the data line 26 and the timing line 27.
A voltage determined from K is applied to the liquid crystal 24. The counter electrode of the liquid crystal 240 is the upper glass substrate 7
It is connected to the transparent electrode 8 of. Therefore, the additional capacitance 23 needs to be sufficiently larger than the capacitance of the liquid crystal 24.

上記実施例において、画素寸法は、230μm×135
μm付加容量の寸法は、150μm×120μm、絶縁
体層3の膜厚1μm、また、MIM素子寸法は、88m
X8μm、Ta205の絶縁膜6の膜厚は、約50nm
とした。その結果、各々の容量は、画素容量:約0.3
pF、付加容量:、3.4pF、素子容量:0.24p
Fとなる。
In the above example, the pixel dimensions are 230 μm x 135
The dimensions of the μm additional capacitance are 150 μm x 120 μm, the thickness of the insulating layer 3 is 1 μm, and the MIM element size is 88 μm.
The thickness of the insulating film 6 made of Ta205 is approximately 50 nm.
And so. As a result, each capacitance is pixel capacitance: approximately 0.3
pF, additional capacitance:, 3.4pF, element capacitance: 0.24p
It becomes F.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、画素全面に付加容量を形成しても、付
加容量部分が透明であるため、画素開口率を低下させ、
液晶表示装置の表示性能を劣化させることがない。また
、画素全面に付加容量を形成できるため、付加容量の絶
縁体層の膜厚を厚くすることが可能となり、容易にピン
ホールフリーの絶縁膜を形成出来る( ’I’a2 o
sを用いた場合1〜2μ厚で良い)。
According to the present invention, even if the additional capacitance is formed over the entire surface of the pixel, since the additional capacitance portion is transparent, the pixel aperture ratio is reduced.
The display performance of the liquid crystal display device is not deteriorated. In addition, since the additional capacitor can be formed over the entire surface of the pixel, it is possible to increase the thickness of the insulating layer of the additional capacitor, and it is possible to easily form a pinhole-free insulating film ('I'a2 o
When using s, the thickness may be 1 to 2 μm).

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明における二端子素子、画素電極及び付加
容量の一実施例を示す斜視図、第2図は本発明の実施例
の液晶セル化を示す断面図、第3図は液晶セルのモデル
化した回路図である。 2・・・・・・下部電極、 3・・・・・・絶縁体層、 4・・・・・・上部電極、 23・・・・・・付加容量。 第1図 ム 弓 6絶ル稟 す−タ末良
Fig. 1 is a perspective view showing an embodiment of a two-terminal element, pixel electrode, and additional capacitance according to the present invention, Fig. 2 is a sectional view showing a liquid crystal cell according to an embodiment of the present invention, and Fig. 3 is a perspective view showing an embodiment of a liquid crystal cell according to the present invention. It is a modeled circuit diagram. 2...Lower electrode, 3...Insulator layer, 4...Upper electrode, 23...Additional capacitance. Fig. 1 Mu bow 6

Claims (1)

【特許請求の範囲】[Claims] 各画素に下部電極と絶縁体層と上部電極とで形成される
付加容量を有する二端子型アクティブマトリクス液晶表
示装置において、前記上部電極および下部電極は、とも
に透明導電膜より構成することを特徴とする二端子型ア
クティブマトリクス液晶表示装置。
A two-terminal active matrix liquid crystal display device in which each pixel has an additional capacitance formed by a lower electrode, an insulator layer, and an upper electrode, characterized in that the upper electrode and the lower electrode are both made of a transparent conductive film. A two-terminal active matrix liquid crystal display device.
JP62080736A 1987-03-31 1987-03-31 Two terminal type active matrix liquid crystal display device Pending JPS63246729A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62080736A JPS63246729A (en) 1987-03-31 1987-03-31 Two terminal type active matrix liquid crystal display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62080736A JPS63246729A (en) 1987-03-31 1987-03-31 Two terminal type active matrix liquid crystal display device

Publications (1)

Publication Number Publication Date
JPS63246729A true JPS63246729A (en) 1988-10-13

Family

ID=13726673

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62080736A Pending JPS63246729A (en) 1987-03-31 1987-03-31 Two terminal type active matrix liquid crystal display device

Country Status (1)

Country Link
JP (1) JPS63246729A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03127031A (en) * 1989-10-13 1991-05-30 Matsushita Electric Ind Co Ltd Production of two-terminal active matrix substrate

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03127031A (en) * 1989-10-13 1991-05-30 Matsushita Electric Ind Co Ltd Production of two-terminal active matrix substrate

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