JPS63246027A - Circuit for driving electromagnetic relay - Google Patents
Circuit for driving electromagnetic relayInfo
- Publication number
- JPS63246027A JPS63246027A JP8022887A JP8022887A JPS63246027A JP S63246027 A JPS63246027 A JP S63246027A JP 8022887 A JP8022887 A JP 8022887A JP 8022887 A JP8022887 A JP 8022887A JP S63246027 A JPS63246027 A JP S63246027A
- Authority
- JP
- Japan
- Prior art keywords
- coil
- relay
- capacitor
- winding self
- switching element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004804 winding Methods 0.000 claims abstract description 18
- 239000003990 capacitor Substances 0.000 claims abstract description 10
- 238000010586 diagram Methods 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 1
Landscapes
- Electronic Switches (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は電磁リレーの駆動回路に関し、特に−巻線自己
保持形リレーの駆動回路に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a drive circuit for an electromagnetic relay, and more particularly to a drive circuit for a winding self-holding type relay.
従来、−巻線自己保持形リレーの駆動回路は第3図に示
す方式によっていた。第3図は従来の電磁リレーの駆動
回路の一例を示す回路図、第4図はその動作を説明する
ためのタイミングチャートである。第3図と第4図を併
せ参照すると、互いに直列接続されたNPN型トランジ
スタ(以下QN)101とPNP型トランジスタ(以下
Qp)のコレクタはそれぞれリレー駆動電源子Vと一■
に接続される。共通接続された2ケのトランジスタQN
IOIとQp102のエミッタ端子は一巻線自己保持型
リレーのコイル100の一方の端子に接続される。この
コイル100の他端子は接地される。このような構成の
電磁リレーの駆動回路においてQNIOIのベース入力
端子103ヘハイレベル(接地レベルより高レベル)の
パルスを加え、Qp102のベース入力端子104を接
地レベルに保つと、QNIOIはオン、Qp102はオ
フとなり、コイル100には矢印105の方向で駆動電
流パルスが印加されて一巻線自己保持形リレーはセット
される。逆にベース入力端子103を接地レベルに保ち
ながらベース入力端子104にローレベル(接地レベル
より低レベル)のパルスを加えると、QNIOIはオフ
、Qp102はオフとなり、コイル100には矢印10
5とは逆方向の矢印106の方向で駆動電流パルスが印
加されて一巻線自己保持形リレーはリセットされる。Conventionally, a drive circuit for a negative winding self-holding relay has been based on the system shown in FIG. FIG. 3 is a circuit diagram showing an example of a conventional electromagnetic relay drive circuit, and FIG. 4 is a timing chart for explaining its operation. Referring to FIG. 3 and FIG. 4, the collectors of the NPN transistor (hereinafter referred to as QN) 101 and the PNP type transistor (hereinafter referred to as Qp) connected in series are connected to the relay drive power supply element V and one
connected to. Two commonly connected transistors QN
The emitter terminals of IOI and Qp 102 are connected to one terminal of a coil 100 of a single winding self-holding relay. The other terminal of this coil 100 is grounded. In an electromagnetic relay drive circuit with such a configuration, if a high level pulse (a level higher than the ground level) is applied to the base input terminal 103 of QNIOI and the base input terminal 104 of Qp102 is kept at the ground level, QNIOI is turned on and Qp102 is turned off. Therefore, a driving current pulse is applied to the coil 100 in the direction of the arrow 105, and the one-winding self-holding relay is set. Conversely, if a low-level pulse (lower than the ground level) is applied to the base input terminal 104 while keeping the base input terminal 103 at the ground level, QNIOI turns off, Qp102 turns off, and the coil 100 shows the arrow 10.
A drive current pulse is applied in the direction of arrow 106 opposite to 5 to reset the single winding self-holding relay.
上述した従来の一巻線自己保持形リレーの駆動回路では
、2種(正及び負)のリレー駆動電源を要すると共に、
電力消゛費を小さくするために一巻線自己保持形リレー
のコイルに印加する駆動パルスのパルス幅をリレー駆動
回路の前段の制御回路で生成しなければならないという
欠点があった。The drive circuit for the conventional single-winding self-holding relay described above requires two types of relay drive power supplies (positive and negative), and
In order to reduce power consumption, the pulse width of the drive pulse applied to the coil of the single-winding self-holding relay has to be generated by a control circuit in the preceding stage of the relay drive circuit.
本発明の電磁リレーの駆動回路は、1つのリレー駆動電
源と、このリレー駆動電源と地気との間に直列接続され
た一巻線自己保持形リレーのコイルとコンデンサ及び第
1のスイッチング素子と、この第1のスイッチング素子
のオン/オフ電位を検出して前記直列接続された一巻線
自己保持形リレーのコイルとコンデンサの両端を短絡す
るように接続された第2のスイッチング素子と、この第
2のスイッチング素子をオン/オフするA/Dコンバー
タとを備えている。The electromagnetic relay drive circuit of the present invention includes one relay drive power source, a coil, a capacitor, and a first switching element of a one-winding self-holding relay connected in series between the relay drive power source and the earth. , a second switching element connected to detect the on/off potential of the first switching element and short-circuit both ends of the coil and the capacitor of the series-connected one-winding self-holding relay; and an A/D converter that turns on/off the second switching element.
〔実施例〕 ′
次に本発明について第1図、第2図を参照して説明する
。[Example] ' Next, the present invention will be explained with reference to FIGS. 1 and 2.
第1図は本発明の電磁リレーの駆動回路の一実施例を示
す回路図、第2図は第1図の動作を説明するためのタイ
ミングチャートである。FIG. 1 is a circuit diagram showing an embodiment of an electromagnetic relay drive circuit of the present invention, and FIG. 2 is a timing chart for explaining the operation of FIG. 1.
第1図において、QNIOのベースは入力端子1からの
入力信号により直接制御される。QNIOのエミッタは
接地され、コレクタはコンデンサ(以下C)4と一巻線
自己保持形リレーのコイル(以下RL)9を介してリレ
ー駆動電源+Vに接続される。QNllは直列接続され
たRL9と04に並列接続され、QNIOのコレクタ電
位を検出するA/Dコンバータ(以下Z)5により制御
される。第1図に第2図を併せ参照すると、入力端子1
に印加されるハイレベル信号によりQNloがオンする
と、そのコレクタ電位6は地気レベルとなり、Z5の十
入力端子電位は抵抗2.3により分圧されたリレー駆動
電源が印加される一入力端子電位より低くなる。Z5の
出力はローレベルとなりQNIIにベース電流を印加し
ないため、QNIIはオフする。従ってRL9には矢印
7の方向に駆動電流が流れて一巻線自己保持形リレーは
セットされる。これによって04がチャージアップされ
ると、矢印7の駆動電流は消滅し、RL9はパルス励磁
される。In FIG. 1, the base of QNIO is directly controlled by an input signal from input terminal 1. The emitter of QNIO is grounded, and the collector is connected to a relay drive power supply +V via a capacitor (hereinafter referred to as C) 4 and a single-winding self-holding relay coil (hereinafter referred to as RL) 9. QNll is connected in parallel to RL9 and RL04 which are connected in series, and is controlled by an A/D converter (hereinafter referred to as Z) 5 that detects the collector potential of QNIO. Referring to FIG. 1 and FIG. 2, input terminal 1
When QNlo is turned on by a high level signal applied to QNlo, its collector potential 6 becomes the earth level, and the ten input terminal potential of Z5 becomes the one input terminal potential to which the relay drive power voltage divided by the resistor 2.3 is applied. becomes lower. Since the output of Z5 is at a low level and no base current is applied to QNII, QNII is turned off. Therefore, a drive current flows through RL9 in the direction of arrow 7, and the one-winding self-holding relay is set. When 04 is thereby charged up, the drive current indicated by arrow 7 disappears, and RL9 is pulse excited.
次に入力端子1にローレベル信号が印加されると、QN
IOはオフし、そのコレクタ電位6はリレー駆動電源+
V電位に上昇する。Z5の十入力端子電位は一入力端子
電位より高電位となるため、その出力はハイレベルとな
りQNIIはオンする。Next, when a low level signal is applied to input terminal 1, QN
IO is turned off and its collector potential 6 is relay drive power supply +
The potential increases to V. Since the tenth input terminal potential of Z5 is higher than the one input terminal potential, its output becomes high level and QNII is turned on.
即ち、RL9.C4,QN 11による閉回路が形成さ
れ、C4にチャージアップされた電気エネルギーは放電
される。この放電によりRL9には矢印8方向に駆動電
流が印加されて一巻線自己保持形リレーはリセットされ
る。この矢印8の駆動電流はC4の放電が終了すると消
滅しパルスとなる。That is, RL9. A closed circuit is formed by C4 and QN 11, and the electrical energy charged up in C4 is discharged. Due to this discharge, a drive current is applied to RL9 in the direction of arrow 8, and the one-winding self-holding relay is reset. This drive current indicated by arrow 8 disappears and becomes a pulse when the discharge of C4 ends.
以上説明したように本発明は、−巻線自己保持形リレー
の駆動回路を1つの電源で構成することができ、且つリ
レー駆動回路の前段でパルスを生成しなくても良いとい
う効果がある。As described above, the present invention has the advantage that the drive circuit for a -winding self-holding relay can be configured with one power supply, and there is no need to generate pulses at the front stage of the relay drive circuit.
第1図は本発明の電磁リレーの駆動回路の一実施例を示
す回路図、第2図は第1図の動作を説明するためのタイ
ミングチャート、第3図は本発明の電磁リレーの駆動回
路の一実施例を示す回路図、第4図は第3図の動作を説
明するためのタイミングチャートである。
1・・・入力端子、2.3・・・抵抗、4・・・コンデ
ンサ(C)、5・・・A/Dコンバータ(Z)、9・・
・コイル、10.11・・・NPN型トランジスタ(Q
N)、十■・・・リレー駆動電源。
棄 I 図
芽2図Fig. 1 is a circuit diagram showing an embodiment of the electromagnetic relay drive circuit of the present invention, Fig. 2 is a timing chart for explaining the operation of Fig. 1, and Fig. 3 is the electromagnetic relay drive circuit of the present invention. FIG. 4 is a circuit diagram showing one embodiment of the present invention, and FIG. 4 is a timing chart for explaining the operation of FIG. 1... Input terminal, 2.3... Resistor, 4... Capacitor (C), 5... A/D converter (Z), 9...
・Coil, 10.11...NPN type transistor (Q
N), 10■... Relay drive power supply. Abandoned I Utsume 2
Claims (1)
の間に直列接続された一巻線自己保持形リレーのコイル
とコンデンサ及び第1のスイッチング素子と、この第1
のスイッチング素子のオン/オフ電位を検出して前記直
列接続された一巻線自己保持形リレーのコイルとコンデ
ンサの両端を短絡するように接続された第2のスイッチ
ング素子と、この第2のスイッチング素子をオン/オフ
するA/Dコンバータとを備えることを特徴とする電磁
リレーの駆動回路。one relay driving power source, a coil and a capacitor of a one-winding self-holding relay connected in series between the relay driving power source and the earth, and a first switching element;
a second switching element connected to detect the on/off potential of the switching element and short-circuit both ends of the coil and the capacitor of the series-connected one-winding self-holding relay; An electromagnetic relay drive circuit characterized by comprising an A/D converter that turns on/off an element.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8022887A JPS63246027A (en) | 1987-03-31 | 1987-03-31 | Circuit for driving electromagnetic relay |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8022887A JPS63246027A (en) | 1987-03-31 | 1987-03-31 | Circuit for driving electromagnetic relay |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63246027A true JPS63246027A (en) | 1988-10-13 |
Family
ID=13712493
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8022887A Pending JPS63246027A (en) | 1987-03-31 | 1987-03-31 | Circuit for driving electromagnetic relay |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63246027A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4994694A (en) * | 1989-08-23 | 1991-02-19 | Tektronix, Inc. | Complementary composite PNP transistor |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54163667A (en) * | 1978-06-15 | 1979-12-26 | Matsushita Electric Works Ltd | Bistable relay control circuit |
JPS58121521A (en) * | 1982-01-13 | 1983-07-19 | オムロン株式会社 | Electronic timer unit |
-
1987
- 1987-03-31 JP JP8022887A patent/JPS63246027A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54163667A (en) * | 1978-06-15 | 1979-12-26 | Matsushita Electric Works Ltd | Bistable relay control circuit |
JPS58121521A (en) * | 1982-01-13 | 1983-07-19 | オムロン株式会社 | Electronic timer unit |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4994694A (en) * | 1989-08-23 | 1991-02-19 | Tektronix, Inc. | Complementary composite PNP transistor |
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