JPS63245197A - Liquid crystal display device - Google Patents

Abstract

PURPOSE:To improve a picture quality without increasing a flicker by supplying the respective 2n fields of a signal obtained by switching the polarity of a video signal at every field to a signal line during one field scanning period and scanning all scanning lines during the one field period. CONSTITUTION:Three primary color signals in which the polarities are switched for every field in a polarity switching circuit 2 are divided by switches SVR, SVG, SVB, the signal (positive polarity signal) from an end A is sampled in sampling circuits 15A, 16A and inputted to memories 17A, 18A. The three primary color signals of the one field are respectively guided to the input ends (a) of switches SV1, SV2, SV3... through switches SRB-1A, SGR-2A, SBG-3A.... The SV1, SV2, SV3... are switched by a signal 14a and an output is guided to the signal lines SG1, SG2... of a liquid crystal panel 7. Similarly, a signal (negative polarity signal) from an end B divided by the switches SVR, SVG, SVB is guided to the liquid crystal panel 7 and the signal of the positive polarity and the signal of the negative polarity are displayed at one frame cycle.

Description

[Detailed Description of the Invention] [Objective of the Invention] (Industrial Application Field) The present invention relates to a liquid crystal display device that displays images by arranging transparent electrodes in a matrix, and in particular, the present invention relates to a liquid crystal display device that displays images by arranging transparent electrodes in a matrix. The present invention relates to a liquid crystal display device that has an increased number of scanning lines and is capable of displaying higher quality images.

(Prior Art) Recently, attempts have been made to increase the number of pixels of liquid crystal televisions to the same level as or even more than that of ordinary television receivers to make the screen easier to view.

FIG. 3 shows a liquid crystal driving method conventionally applied to small-sized liquid crystal display devices. In FIG. 3, the video signal 1 is first supplied to a polarity switching circuit 2, where the polarity is switched every one field scanning period. This is because the number of liquid crystal scanning lines is arranged for only one field of the video signal and scanned sequentially, so unless the polarity is reversed for each field, the same voltage polarity will always be applied to the liquid crystal layer, causing deterioration of the liquid crystal. This is to speed up the process. For the video signal whose polarity has been switched, the primary color signal is switched by the color switching circuit 3 for each scanning line. This switching is done because the arrangement of the three primary color filters is different between the odd-numbered scanning line and the even-numbered scanning line.
In the next even scanning line in which the primary color signals are output in the order of B, -R...

R, G, B... are switched to output primary color signals in order.

The switch 4 is a sampling switch whose switching is controlled at the timing of the number of pixels in the horizontal direction, and stores the video signal from the color switching circuit 3 in the memory function section 5 when it is turned on. The signals held in the memory function section 5 are displayed on the liquid crystal panel 7 at the timing of the scanning signal from the vertical drive circuit 6. Note that the switch 4 is driven by the output of the shift register 8. The shift register 8 is a circuit that generates a timing control signal for the number of pixels in the horizontal direction.

When interlace is adopted by increasing the number of scanning lines in such a liquid crystal display device, if the polarity is reversed every field period as in the sequential scanning method described above, the signal displayed on each scanning line will be as shown in Figure 4. The timing will be as shown.

FIG. 4(a) shows a video signal whose polarity is switched every one field scanning period. In this example, the polarity is switched to positive in the first field, and the polarity is switched to negative in the second field. Since the polarity of the video signal is switched in this way, as shown in FIG. 4(b), the scanning line indicated by the solid line always displays a positive polarity signal, and the scanning line indicated by the dotted line always displays a negative polarity signal. A signal is displayed. Incidentally, FIG. 4(b) is an enlarged view of the scanning lines of the screen.

In order to send signals with different polarities to each scanning line for each field scanning line, the polarity switching circuit 2 may be switched and controlled every one frame scanning time. However, in that case, for example, considering the solid scanning line in FIG. 4(b), after the pixel signal voltage is applied, conventionally, the next signal voltage is sent after one field scanning time, but in this case, the next signal voltage is sent after one field scanning time. The next signal is not sent until one frame scanning time has elapsed. In other words, each pixel must hold the signal voltage sent to it for twice as long as before.

As shown in FIG. 5, the liquid crystal pixel maintains a signal voltage by the equivalent capacitance of the liquid crystal layer and performs liquid crystal driving. FIG. 5 shows the configuration of a liquid crystal pixel 10. One pixel 10 is arranged between a scanning line L and a signal line SG, and includes a thin film transistor TPT for switching operation, and a transparent electrode 7.
1. It has a liquid crystal layer LD sandwiched between T2, and TP
The scan line L is connected to the scan electrode P1 connected to the gate G of T.
A scanning signal is supplied via a signal line SG, and a primary color signal is supplied via a signal line SG to a signal electrode P2 connected to a drain D of the TPT. The source S of the TPT is connected to one transparent electrode T1, and the other transparent electrode T2 is connected to a common potential point (earth). The equivalent capacitance C of the liquid crystal layer LD is loosely connected to the source of the TPT and the common potential point. This capacitor C holds the signal from the memory function section 5.

Since one liquid crystal pixel is configured in this way, if a signal voltage is held for two frames, a predetermined difference will occur between the signal voltage and the next signal voltage. This difference varies depending on the capacity, but it has been measured that, for example, when the field is held for one field time, it drops by 1%.

Under the conditions we are currently considering, the time that the capacitor C holds the voltage is doubled, so the voltage drops by about 2% during that time. For this reason, flicker is more noticeable than in a system in which the next signal voltage is sent after one field time has elapsed.

Flicker due to the characteristics of TPT also poses a problem. This is because the characteristics of the TPT in a pixel change slightly depending on whether the signal is of positive polarity or the signal of negative polarity, so if the polarity is switched every frame, the flicker period will become longer.
This is because flicker is more easily perceived by the human eye.

FIG. 6 is an explanatory diagram for explaining the above phenomenon.
(a) is an explanatory diagram showing the flicker phenomenon when the polarity is changed for each field, and (b) is an explanatory diagram showing the same phenomenon when the polarity is changed for each frame. The axis represents time.

According to the figure (a), since the positive polarity signal and the negative polarity signal are displayed alternately for each field, the flicker fluctuation curve indicated by the symbol F1 becomes a wave with a period of one frame scanning period. When the polarity is switched at one frame period, two positive and two negative signals alternate, so a flicker wave with two frame periods is generated, as shown by curve F2. can.

Therefore, it is not preferable to switch the polarity in one frame.

Furthermore, when the number of scanning lines is increased, there is a problem in that the color switching circuit must also increase in circuit scale in order to perform color switching operations for that many signals.

(Problems to be Solved by the Invention) When trying to increase the number of pixels in a liquid crystal display device by increasing the number of scanning lines than that of a normal television receiver, switching to prevent liquid crystal deterioration must be performed once per frame. This switching must be done at regular intervals, and such switching may cause flicker.
The period of 1 frame becomes one frame, and there is a problem in that the brightness fluctuations given to the human eye become large.

In view of the above-mentioned problems, the present invention aims to provide a liquid crystal display device which increases the number of scanning lines more than the number of ordinary television scanning lines and realizes higher image quality.

[Structure of the Invention] (Means for Solving the Problems) This invention provides two
Using a liquid crystal display means set to be able to display a video signal for n fields (n is a positive integer), two sets of signals obtained by switching the polarity of the video signal for each field are held, each for 2n fields. Flicker can be eliminated by supplying signals for each 2n fields to the signal line during one field scanning period, and simultaneously scanning every predetermined zero line so that all scanning lines are scanned during one field period. without increasing
We are trying to improve the image quality.

(Operation) According to the present invention, all the scanning lines are scanned in one field period, so there is no need to change the authority switching of one field, the problem of flicker period is solved, and the scanning is performed n times. The number of lines can be increased. Moreover, it can also serve as a color switching function.

(Example) Hereinafter, an example in which the present invention is applied to a color liquid crystal display device will be described.

FIG. 1 is a circuit diagram showing an embodiment of a liquid crystal display device according to the present invention.

In FIG. 1, the same parts as in FIG. 3 are given the same reference numerals, and three primary color signals are respectively guided to the polarity switching circuit 2. In FIG. The polarity switching circuit 2 sends the three primary color signals whose polarities are switched for each field to switches SVR and SV.
G, is led out to the input terminal of SVB. switch svr
, SVG, and SVB selectively output the RG3 primary color signals from the polarity switching circuit 2 to the respective terminals A and B using the frame period control signal 11a from the terminal 11.

The signals from terminal A distributed by these switches SVR, SVG, and SVB (assumed to be positive polarity signals) are supplied to the R, G, and B signal input terminals of sampling circuit 15A and sampling circuit 16A, respectively, and from terminal 12. The signal is sampled by the sampling pulse 38C. Outputs from sampling circuits 15A and 1B8 are input to memories 17A and 18A. Note that the sampling pulse SHC is a signal that outputs a pulse at pixel timing in the horizontal direction, and is supplied from the cyst register 8 described in FIG. 3.

From the memories 17A and 18A, the three primary color signals for each field are RlG, B, and R for each horizontal scanning period.
... and B, R, G, B... are output in order, and the switches S RB-IA, S GR-2A, SB
Guided by G-3A... To switch 5RB-1,
an R signal from memory 178 is introduced into the first input;
Eight signals from memory 188 are introduced to the second input. Switch S GR-28 is G from memory 178.
A signal is introduced into the first input, R from memory 18A.
A signal is introduced into the second input. Switch S BG-3
For A, the B signal from the memory 17A is introduced into the first input terminal, and the G signal from the memory 18A is introduced into the second input terminal. Similar switches (not shown) are also supplied with the primary color signals from the memories 17A and 18A by repeating this process. Also, switch 5RB-IA, 5GR-2^
.

SBG-3A... is the signal 1 supplied to the terminal 13.
Switching is controlled by switch 3a, and its output terminals are connected to the first input terminals a of switches SV1, SV2.5V3-, respectively. And each of these switches svi.

The output terminals C of SV2, SV3... are formed on the liquid crystal panel 7, and the signal lines SGI, SG2, SG3, S
G4, SG5... end P11. PI3. PI3
．． PI3. P15... are connected to each other.

On the other hand, the signals from the terminals B of the switches SVR, SVG, and SVB rJ1 (assumed to be negative polarity signals) are transmitted to the signal lines SG1, SG2, SG3, and SG4,
Guided by SG5... That is, the sampling circuit 15
B, 16B is a sampling circuit 15A.

16A, memory 17B, 18B is memory 17
^, 188, switch S RB-IB, S GR
-2B, 38G-3B... is switch 5RB-I
A, 5GR-2A, 38G-38... respectively, and each switch 5RB-IB, 5GR-2
8.

The output terminals of S BG-38... are connected to switches S.
VI.

It is connected to the second human power rb of SV2, SV3...

The switches SVI, SV2, SV3, . . . are controlled by a field cycle signal 14a from the terminal 14.

Further, in the liquid crystal panel 7, the horizontal pixel rows driven by the scanning line L1 form a color filter array of R, G, B, R, . . . , and the pixel rows driven by the adjacent line L2 form 8. It forms an array of R, G, B... Moreover, the scanning lines L1, L2, 13 of the liquid crystal panel 7
．． The number of L4 . . . is set to be enough to display two fields of three primary color signals. Also, each scanning line L1. L2. L3, L4, . . . are a predetermined set of scanning lines, for example, Ll, and the set of 2 and L4 is simultaneously scanned by a scanning signal from the vertical drive circuit 6.

The present embodiment is configured as described above, and the operation will be explained next.

FIG. 2 is a time chart showing the timing of signals supplied to each terminal 11, 13, and 14 in FIG.
Each lock divided by dotted lines indicates one field scanning period. Furthermore, T1 indicates the first field period in the video signal, and period T2 indicates the second field period. Furthermore,
(a) shows the video signal before polarity switching, (b) shows terminal 1
1, (C) shows the signal 13a supplied to the terminal 13, and (d) shows the signal 14a supplied to the terminal 14. Note that the symbol H represents the high level of each signal, and the symbol L represents the low level.

Now, in period T1, each switch SVR, SVG, S
Assuming that VB is in the state shown in Figure 1, the sampling circuits 15^, 16A and memories 17A, 18A
The circuit consisting of the sampling circuit 15B (hereinafter referred to as the A-side circuit) is in sampling operation.

A circuit consisting of 16B and memories 17B and 18B (
The copper circuit (hereinafter referred to as B copper circuit) is in a state of supplying a signal to the liquid crystal panel 7. Further, in the period T2, contrary to the above, the A side circuit supplies the primary color signal to the liquid crystal panel 7, and the B copper circuit samples the primary color signal.

As a result, each memory 17A, 18A and memory 17
B.

The signals held in 18B each hold three primary color signals for a total of two fields.

The operation of the B copper circuit during period T1 will be described below.

Switches 5RB-IB, 5GR- in the B-side circuit
2B.

38G-38... are subjected to switching control by the signal 13a in FIG. 2(C). As shown in the figure, the signal 13a has an H level period and an L level period each divided by a 1/2 field period. For example, during the H level period, each switch 5RB-18, 5GR-2B, 5BG-
3B... is switched to the state shown in FIG.
Selected by RB-18, 5GR-28, 5BG-3B... This signal is a primary color signal held before the period T1, and is selectively output in the order of R, G, B, R, . . . .

On the other hand, the switches SVI, SV2, SV3...
Since switching is controlled by the signal 14a shown in FIG. 2(d), if the connection state shown in FIG. 1 is maintained during the L level period T1, the switches 5RB-IB and 5GR-28.

The primary color signals in the order of R, G, B, R... from 5BG-3B... are the R signal to the signal line SG1, the G signal to SG2, the B signal to SG3, and the R signal to SG4.・
...is supplied as follows.

Further, in the latter half of the period T1 when the signal 13a is at L level, the switches SRB-IB, SGR-28,
Since SBG-3B... selects the signal from the memory 188, it selects and outputs the primary color signals in the order of B, R, G, B, etc., respectively. Therefore, in the second half of period T1, each signal line SG1, SG2, SG3, SG4...
・niB.

Primary color signals are supplied in the order of R, G, B, . . . .

By the way, the scanning signal from the vertical drive circuit 6 is applied to all scanning lines Ll, L2 . L3. L4..., for example, two lines are scanned at the same time every other line, so Ll, 13
At the same time, the pairs in the relationship are scanned.

As a result, in the first half of period T1, R, G, B.

R... pixels are in a display state, and in the second half of the period T1, B, R, G, B... pixels are in a display state.

As a result, a color image is constructed using all the scanning lines in one field period.

Next, in period T2, the signal 11ah (at L level) switches SVR, SVG, SVB to the end B side, and the B side circuit performs a sampling operation.
The signal held by the A-side circuit during period T1 is transferred to switch 5RB-
Lead to IA, 5GR-2A, 5BG-3A...

In the first half of period T2, since the signal 13a is at H level, each switch 3RB-1A, 5GR-2A
.

The SBG-3A... are respectively connected to the first input terminals and output primary color signals from the memory 17A in the order of R, G, B, R.... Also, switches SV1 and SV2
.

SV3... is switched and connected to the first input terminal a side when the signal 14a is at H level, so the above R, G
, B, R, . . . are supplied to signal lines SG1, SG2, SG3, . Also, in the latter half of the period T2, the signal 13a becomes L level, so the signals from the memory 18A, ie, B, R, G.

The primary color signals are selected in the order of B, and the signal line SG1.

It is supplied to SG2, SG3, SG4, SG5...

This is the same as when the B-side circuit was supplying signals, and a color image is displayed on the liquid crystal panel 7 using all the scanning lines.

The signal displayed in period T1 is a positive polarity signal, and the period T
2 is a negative polarity signal, the liquid crystal panel 7 according to this embodiment will display a positive polarity signal and a negative polarity signal in one frame period, which will cause flicker. The curve can have the same period as before.

In this way, the image quality is improved by increasing the number of conventional scanning lines,
In addition, the flicker period remains one frame, so there is no problem.

It can be kept constant.

In addition, memory 17A in the A side circuit and the B side circuit,
Since 18A, 17B, and 18B output the primary color signals in different orders, they perform the same function as a conventional color switching circuit, and there is no need to perform special color switching.

Note that the above embodiment is just an example, and the signal holding means consisting of a sampling circuit and a memory may hold signals for n (positive integer) fields, and the number of scanning lines may be further increased.

[Effects of the Invention] As described above, according to the present invention, the number of scanning lines can be increased compared to conventional liquid crystal panels, high quality images can be displayed, and an increase in flicker can be prevented.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing an embodiment of a liquid crystal display device according to the present invention, FIG. 2 is a time chart for explaining the operation of FIG. 1, and FIG. 3 is an overview of a conventional liquid crystal display device. Block diagram, Figure 4 is an explanatory diagram to explain the polarity switching peculiar to liquid crystal display devices, Figure 5 is a reference diagram for explaining liquid crystal pixels, and Figure 6 explains the flicker phenomenon in liquid crystal display devices. FIG. 2... Polarity switching signal, 6... Vertical direction drive circuit, 7
...Liquid crystal panel, 15A, 15B, 168,
16B...Sampling circuit, 17A, 17B
, 18A, 18B...Memory, SVR, SV
G, SVB, 5RB-IA, 5GR-2A
. S BG-38..., S RB-18, 3GR
-2B, -8BG-3B... SVl, SV2.8V3-, ・), Iychi, Ll. L2, L3, L4...scanning line, SGI, S
G2. o G 3 Figure 2 Figure 3 Figure 4 Field A Seven Things Toshu

Claims (2)

[Claims] (1) 2n (n
is a positive integer); and polarity switching means for switching the polarity of the video signal for each field and outputting the video signal as a positive polarity signal and a negative polarity signal, respectively. a first signal holding means comprising n memories each holding a positive polarity signal from the polarity switching means; and n memories each holding a negative polarity signal from the polarity switching means. a second signal holding means consisting of; a signal supplying means for supplying the signals for each 2n fields from the first and second signal holding means to the signal line during one field scanning period; 1. A liquid crystal display device comprising: scanning means for simultaneously scanning every n predetermined scanning lines so as to scan every n scanning lines. (2) the liquid crystal display means can display color R (red);
G (green) and B (blue) primary color pixels are arranged, and the first
, and the second signal holding means, the n memories output three primary color signals in different orders according to the arrangement of the pixels, thereby enabling color switching. The liquid crystal display device described.