JPS63240615A - Interface circuit - Google Patents

Abstract

PURPOSE:To avoid the erroneous writing of a memory circuit as well as the breakdown of an internal semiconductor by turning on a power supply circuit and then a three-state buffer when a memory circuit is inserted and turning off the three-state buffer and then the power supply circuit when the memory circuit is pulled out respectively. CONSTITUTION:When a memory card 1 is connected to a terminal of an interface 24 set at the equipment side, two terminals of a short pin terminal 21 are connected to each other and a put-in/put-out signal 10 is set at an earth potential for the first time. Thus, the output side of a buffer 14 is set at 'L' and a power supply circuit 20 works. Then, the power supply input of the circuit 20 serves as the power supply for the card 1 via a transistor Trs. The power supplied to the card 1 is applied to an input terminal of an OR circuit 16 via an inverting circuit 15 as a power supply ON signal 12. At the same time, the signal 10 is sent to the other input terminal of the circuit 16 and the output 13 of the circuit 16 is set at 'L' to turn on a unidirectional buffer 17 and a bidirectional buffer 7. When the card 1 is pulled out, a three-state buffer and then the circuit 20 are turned off.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an interface circuit between a memory card or an IC card and a device.

[Conventional technology]

FIG. 2 is a circuit diagram showing a conventional interface circuit between a memory card and a device. In the figure, reference numeral 9 is an interface circuit, and memory card 1 is connected to address bus signals 2. Data bus signal 3° and chip enable signal 4, which is a control bus. Write enable signal5. Interface with output enable signal 6. A 3-state bidirectional buffer 7 reads/writes the data bus. The interface circuit 9 is normally pulled up to the "H" level by the pull-up resistor 8 when the device does not access the memory card 1.

Next, the actuator 2 will be explained. The interface circuit 9 shown in FIG. 2 is a basic circuit for accessing the memory card 1 using a well-known technology. The basic timing with the memory built into the memory card 1 is the same as the timing with the memory itself, and is a publicly known technique, so a detailed explanation will be omitted. When the memory card 1 is connected to the connector on the device side, the interface circuit 9 shown in FIG. 2 operates at the well-known basic timing described above.

The memory card 1 and the device side are currently connected via the interface circuit 9, and the memory card 1 is being accessed or access is suspended (however, the memory card 1 and the interface circuit 9 are in an active state and power is applied). If the memory card 1 is removed from the connector in a state where the bus is in a state where the memory card 1 is removed from the connector, all bus signals including the power supply always generate chattering.

FIG. 3 is a timing diagram showing chattering at the σE, WE terminals, etc.

In other words, due to this chattering, in order to satisfy the write conditions of the memory card 1, a matching data bus is erroneously written to an address bus that matches the timing to satisfy the write conditions. The above chattering also occurs when the memory card 1 is inserted into the connector. memory card l
are often inserted and removed while the interface circuit 9 is active, and it is impossible to prevent this type of erroneous writing with the conventional interface circuit 9.

Here, as a method for connecting the memory card 1 and the interface circuit 9, there are generally methods using a card edge connector, a method using a two-piece connector, and a method using a ZIF (zero insertion hose). Prevention is impossible.

[Problem that the invention seeks to solve]

Since the conventional interface circuit is constructed as described above, it is difficult to prevent erroneous writing to the memory card or destruction of semiconductor elements within the memory card due to chattering that occurs when the memory card is inserted or removed.

Changing the data content of a memory card means that it is no longer useful as a memory card and is completely unusable.
This is a big problem.

This invention was made in order to solve the above-mentioned problems, and provides an interface circuit that can completely prevent erroneous writing to the memory of a memory card and destruction of semiconductor elements in the memory card due to chattering during insertion and removal. With the goal.

[Means for solving problems]

The interface circuit according to the present invention is an interface circuit between a memory card or an IC card and a device, and includes a power supply circuit that can turn on/off power supply to the card, and a unidirectional bus signal that can turn on/off all bus signals to the card. and a bidirectional 3-state buffer, an insertion/extraction detection signal generation means for pulling down an insertion/extraction detection signal line for detecting insertion or removal of the card when the card is inserted and pulls it up when the card is removed; A buffer that outputs a signal that turns the power supply circuit on or off after a certain period of time has passed when pulled down or pulled up, and when either the output of the power supply circuit that has passed through the inversion delay circuit or the insertion/removal detection signal is at a high level. and an OR means for turning off the unidirectional and bidirectional three-state buffers.

[Effect]

The interface circuit in the present invention is an interface circuit between a memory card or an IC card and a device, and includes a power supply circuit that can turn on/off the power supply to the card, and a unidirectional and bidirectional circuit that can turn on/off all bus signals to the card. an insertion/extraction detection signal generating means that pulls down an insertion/extraction detection signal line for detecting insertion or removal of the card when the card is inserted and pulls it up when the card is removed; A buffer that outputs a signal to turn on or off the power supply circuit after a certain period of time when it is pulled up; When inserting a memory card, first turn on the power supply circuit and then turn on the 3-state buffer, and when removing a memory card, first turn off the 3-state buffer and then turn off the power. Since the configuration is configured to turn off the circuit, all interfaces are pulled down (0■
), which prevents erroneous writing to the memory of the memory card and destruction of semiconductors within the memory card.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a circuit diagram showing an interface circuit between a memory card and a device according to an embodiment of the present invention. In the figure, the same reference numerals as in FIG. 2 are the same or equivalent parts, 20 is a power supply circuit that can turn on/off the power supply to the memory card 1, 17 and 7 are the power supply circuits for supplying power to and from the memory card 1, respectively. 3-state unidirectional buffer and 3-state bidirectional buffer that can turn on/off bus signals? It is Kutufa. On/off of the power supply circuit 20 is controlled via the buffer 14 by an insertion/removal detection signal 10 which is an output signal of the ground loop 22 of the memory card 1 corresponding to the short pin terminal 21 of the connector. The 3-state unidirectional buffer 17 and the 3-state bidirectional buffer 7 are turned on/off by a buffer on/off signal 13 which is the output of the OR circuit 16 of the insertion/removal detection signal 10 and the power-on inversion signal 1). The input of the inverting circuit 15 is applied with the output signal of the power supply circuit 20, that is, the supply 'in' of the memory card 1. i source circuit 20° 3-state desk buffer 17. When the 3-state bidirectional buffer 7 is off, all terminals of the memory card 1 are connected to the pull-down resistor 19. A pull-down state is achieved by the pull-amp down resistor 18. Reference numeral 23 denotes an insertion/removal detection pull-up resistor which has a ground potential when the memory card 1 is connected to the connector, and is pulled up to the power input side when the short pin terminal 21 is disconnected. 24 is the entire circuit of the interface.

Next, the operation will be explained. First, the operation when inserting the memory card 1 will be explained. FIG. 4 shows the insertion/removal detection signal 10° and the power-on inversion signal 1) when the memory card 1 is in possession and portable, and is inserted into the connector on the device side. 5 is a timing diagram showing the state of each signal of a power-on signal 12 and a buffer on/off signal 13. FIG. In this case, each signal line between the interface 24 and the memory card l is turned off because the power supply circuit 20, unidirectional buffer 17, and bidirectional buffer 7 are pulled up to the power supply input side by the insertion/removal detection pull-up resistor 23. Yes, pull up/down resistor 1
8. It is pulled down by the pull-down resistor 19 and is in a low impedance state.

If the memory card 1 is now connected to the connector on the device side, that is, the terminal of the interface 24, the short bin terminal 21
The insertion/removal detection signal 10 is not output until both terminals are connected.
becomes the ground potential' (OV). Therefore buffer 14
Since the output side of is "L", the power supply circuit 20 is activated.

The power input of the power supply circuit 20 becomes the power supply to the memory card l via the series transistor T□. This power supply is applied as a power-on signal 12 to an input terminal of an OR circuit 16 via an inversion circuit 15. On the other hand, the insertion/removal detection signal 10 is also applied to the other input terminal of the OR circuit 16, and the buffer on/off signal 13, which is the OR output, is "L".
level unidirectional buffer17. Turn on the bidirectional buffer 7. In FIG. 4, T1 indicates a delay time including the delay time of the buffer 14 and the response time of the power supply circuit 20.

Further, T't indicates the delay time of the inverting circuit 15.

From FIG. 4, the activation procedure for each part of the memory card 1 is as follows.

First, the power supply is applied, and after a delay, the unidirectional buffer 17.
Bidirectional buffer 7 is turned on. Therefore memory card 1
This is the best activation procedure for internal semiconductor devices, and latch-up does not occur.

Furthermore, the data stored in the built-in memory of the memory card 1 can be completely retained and there is no erroneous writing. Furthermore, chattering of the short pin connector during insertion can be eliminated by the action of the OR circuit 16 as shown in FIG.

Regarding chattering of other connector pins, unless unidirectional buffer 1 and bidirectional buffer 7 are turned on, the impedance is low (pull-down shape B) and the ground level (O
V) is maintained, so there is no problem. The reason why the pin 21 is made shorter than the other pins is to make it the last one to make contact during insertion, and the first to leave when removed. In other words, the target pin at the timing in Figure 4 is short pin 2.
Only 1 needs to be considered.

Here, the short pin terminals 21 are provided at two locations on the outermost edge of the memory card 1. It is a common practice to provide the short pin terminal at the outermost end of the memory card, but this is because diagonal insertion is taken into account. Due to such a short pin arrangement, the interface circuit of the present invention can operate normally even if the card is inserted diagonally, since the short pin terminal 21 comes into contact with the connector last, without causing any functional failure due to the diagonal insertion.

Next, the operation when removing the memory card 1 will be explained.

FIG. 5 is a timing diagram showing the state of each signal at the time when the memory card 1 is removed. Since the interface 24 is in an active state, the semiconductor element built into the memory card l is likely to be destroyed and erroneous data writing to the memory may easily occur. If you remove the memory card 1 now, the insertion/removal detection signal 10 will change from the ground level (0■) to the insertion/removal detection pull-up resistor 2.
Due to the action of 3, it is pulled up to the power input side.

Therefore, the output of the buffer 14 becomes "H" level, and the power supply circuit 20 is turned off. Prior to the above operation, the insertion/removal detection signal 1
0 is connected to one side of the OR circuit 16, the buffer on/off signal 13 immediately goes to "H" level due to the OR operation with the power-on inverted signal 1), and the unidirectional buffer 17
．． Bidirectional buffer 7 is turned off. Therefore, the procedure for changing each terminal of the memory card 1 from an active state to a pull-down state (ground level=OV) is as follows. First, unidirectional buffer 17. With the bidirectional buffer 7 turned off, the data bus signal goes to the ground level, the address bus signal, and the control bus signal go to the "H" level during T2, and then go to the ground level.

The reason why the control bus is kept at "H" during the period T2 is to prevent erroneous writing. The above procedure is the best procedure for preventing damage to semiconductor elements and memory, and erroneous writing.

FIG. 6 shows an example of the basic configuration of the internal circuit of the memory card 1 that is compatible with the interface circuit of the present invention shown in FIG. The basic configuration is to apply the GE and WE' signals to the σE and WE° terminals of the memory via a 3-state buffer or switch circuit. FIG. 6 shows an example of a 3-state buffer. Turn on/off the above 3-state buffer 33
Turning off is performed using a gate on/off signal 31, which is an output signal of the control transistor 25, which is turned on/off according to the dark voltage determined by the Zener diode 26. When power is applied to the memory card 1, the three-step buffer 33
is turned on, and access to the interface 24 in FIG.
Pull-up resistor 3 through 9-series diode 28
2, CE and WE are pulled up and the data in the memory is held.

Here, the pull-up state of the memory τE and WE signal in FIG. 6 and the power-on signal 12° buffer on/in FIG.
The relationship between the off signal 13 is shown in FIG. 7. The delay time of the inverting circuit 15 in FIG. 1 and the delay time of the control transistor 25 in FIG. 6 are generally related to the delay time of the inverting circuit 15 and the delay of the control transistor σπ of the memory in Figure 6, W
The E signal remains pulled up until the unidirectional buffer 17 of FIG. 1 is turned on, ie, can be accessed.

Next, the memory σE in FIG. 6, the W page signal and the power-on signal 12 in FIG. The relationship between the buffer on/off signals 13 is shown in FIG. As shown in FIG. 5, when the card is removed, the buffer on/off signal 13 becomes "H" level, and the unidirectional buffer 17 shown in FIG. 1 is turned off.
The power-on signal 12 in the figure is H″ in the T7 section, so the 6th
The στ and WE signals of the memory shown in the figure maintain “H”. T2
Immediately before the end of the section, the Zener diode 26 in the memory card is activated, and in order to turn off the 3-state buffer 33, the pull-up resistor 32 is activated via the memory's Cr, WE scratch signal battery 30-series resistor 29-series diode 28. It is pulled up by

With the above operation, memory card 1 and interface 2
4 is in the active state and the memory card 1 is removed, and in both cases when the memory card 1 is inserted into the active interface 24 while the memory card 1 is in the possession or portable state, the memory σE of FIG. Interface 2 pulls the W lower signal and protects the data.
4 is activated, the semiconductor element of the memory card 1 is not destroyed when the memory card 1 is inserted or removed, and the memory data of the memory card 1 can be completely retained and protected.

Note that the buffer 1) in FIG. 1 can be handled freely, such as by prohibiting access by using it as an interrupt signal for the CPU on the device side.

〔Effect of the invention〕

As described above, according to the present invention, memory cards or 1.
In the interface circuit between the C card and the device, a power supply circuit that can turn on/off the power supply to the card;
A unidirectional and bidirectional 3-state buffer that can turn on/off all bus signals to the above card, and an insertion/removal detection signal line that detects the insertion or removal of the above card, which is pulled down when the above card is inserted, and a pull amplifier when the above card is removed. a buffer that outputs a signal that turns the power supply circuit on or off after a certain period of time when the insertion/extraction detection signal is pulled down or pulled up;
and an OR means for turning off the unidirectional and bidirectional three-state buffer when either the output of the power supply circuit that has passed through the inversion delay circuit or the insertion/removal detection signal is at a high level, and when the memory card is inserted. First, the power supply circuit is turned on, then the 3-state buffer is turned on, and when removing the memory card, the 3-state buffer is first turned off, and then the power supply circuit is turned off.This prevents erroneous writing to the memory card's memory when the memory card is inserted or removed. Also, it is possible to prevent the semiconductor elements in the memory card from being destroyed, and there is an effect that a highly reliable product can be obtained.

[Brief explanation of drawings]

FIG. 1 is a diagram showing an interface circuit between a memory card and a device according to an embodiment of the present invention, FIG. 2 is a diagram showing a conventional interface circuit between a memory card and a device, and FIG. 3 is a diagram showing a conventional interface circuit. FIG. 4 is a timing diagram showing each signal state when a card is inserted and removed in the interface circuit of the present invention, and FIG. 5 is a timing diagram showing each signal state when the card is inserted and removed. , FIG. 6 is a circuit diagram showing an example of a memory card used in the interface circuit of the present invention, and FIG. 7 is a circuit diagram showing the CE and W of the memory card when inserted into the interface circuit of the present invention.
FIG. 8 is a timing diagram showing the state of the E signal, and FIG. 8 is a timing chart showing the state of the WE signal of the memory card at the time of extraction. 1 is a memory card, 2 is an address bus signal, 3 is a data bus signal, 4 is a chimbu enable signal (σB), 5 is a write enable signal (WE), 6 is an output enable signal (σ100), 7 is a 3-state bidirectional buffer,
10 is an insertion/extraction detection signal, 1) is a power-on inversion signal, 12 is a power-on signal, 13 is a buffer on/off signal, 14 is a buffer, 15 is an inversion circuit, 16 is an OR circuit, 17 is a 3
18 is a pull-up/down resistor, 19 is a pull-down resistor, 20 is a power supply circuit, 21 is a short pin terminal, 22 is a ground loop, 23 is an insertion/extraction detection pull-up resistor, and 24 is an interface circuit.

Claims (1)

[Claims] (1) In the interface circuit between the memory card or IC card and the device, there is a power supply circuit that can turn on/off the power supply to the above card, and a unidirectional and bidirectional circuit that can turn on/off all bus signals to the above card. a state buffer; an insertion/extraction detection signal generation means for pulling down an insertion/extraction detection signal line for detecting insertion or removal of the card when the card is inserted and pulling it up when the card is removed; a buffer that outputs a signal to turn on or off the power supply circuit after a certain period of time has elapsed; 1. An interface circuit comprising: OR means for turning off a 3-state buffer in a direction.