JPS63238635A - System controller - Google Patents

Abstract

PURPOSE:To avoid such a danger as a system-down is generated after an information processor has been recovered, by replacing address information from the information processor with address information to a diagnostic area provided in advance in a main storage device, when it has been decided to be an access by a diagnostic operation. CONSTITUTION:When it has been decided that an access to a main storage device 13 from information processors 10, 11 is an access by a diagnostic operation, a host part of a main storage access address from the information processors 10, 11 is stored in a diagnostic address display register 5, and also, replaced with address information to a diagnostic area provided in advance in the main storage device 13, by address replacing circuits 3, 4. Accordingly, a system test of recovered information processors 10, 11 can be executed, while continuing a regular operation by normal information processors 10, 11, therefore, such a danger as a system-down is generated after the recovered information processors 10, 11 have been offered to a regular operation can be avoided.

Description

TECHNICAL FIELD The present invention relates to a system control device, and more particularly to a system control device that controls access to a main storage device from a plurality of information processing devices.

[In general, in a multiple information processing device system, as shown in FIG.
[The main storage device 13 is shared via the I device 12.

In this multi-use information processing device system, if some of the information processing devices, for example, the information processing device rflO, breaks down, this information processing device 10 can be disconnected from the system and the information processing device 11 can operate only. It is now possible to continue the process and prevent the system from going down.

While the information processing device 11 alone continues to operate, the faulty information processing device 10 uses a service processor (not shown) or a built-in fault diagnosis microprogram to analyze the failure details and proceed with repair work. ,ir! The repair has been confirmed through a downtime test. After confirming this repair,
Normal operation has started without performing a system test.

When the repair of the information processing device 10 is completed, the information processing device 10 that has been repaired is
Incorporate 0. At this time, the system control device! Configuration in 112 1. The bit corresponding to the information processing device 10 in the II control register is set to "1".

Since the pin corresponding to the information processing device 10 in this configuration control register is '1'', when the information processing device 10 sends a main memory access request to the main storage device 13, the main memory access request is is accepted.

In such a conventional system control device 12, repair confirmation is only performed by a unit test of the information processing device 10.11 that has been repaired;
Because the system was suddenly subjected to normal operation without performing system tests, unit tests were performed under test conditions different from tests on actual multiple information processing equipment systems, so only incomplete simulations could be performed. (
(For example, shared memory access buses are not fully tested.)

Therefore, there is a drawback that a failure may occur due to failure of repair after normal operation begins, and there is a risk of system failure depending on the location and timing of occurrence of this failure.

Purpose of the Invention The present invention has been made to eliminate the above-mentioned drawbacks of the conventional system, and to avoid the risk of system failure after a repaired information processing device is put into normal operation. The purpose is to provide a system control device that can.

Structure of the Invention The system control device η according to the present invention is a system control device η that controls access to a main storage device from a plurality of information processing devices.
1 device, the determining means for determining whether the access from the information processing device to the main storage device is a normal operation or a diagnostic operation; When it is determined that the access to the device is due to the diagnostic operation,
The information processing apparatus is characterized in that it includes address replacement means for replacing address information from the information processing device with address information for a diagnosis area provided in advance in the main storage device.

Next, one embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. In the figure, the system control device according to the embodiment of the present invention includes a real memory address register 1.2, an address replacement circuit 3.4, a diagnostic address display register 5, a diagnostic control register 6, and a request arbitration circuit 7. , an address switching circuit 8, and a physical memory address register 9.

A system control device according to an embodiment of the present invention has a plurality of information processing devices 10, 11, similar to the conventional example shown in FIG.
It controls access to and the main storage device 13, and together constitutes a multiple information processing device system.

Real memory address registers 1.2 are connected to data lines 100, respectively.
．． The main memory access addresses from the information processing device 10.11 to the main memory device 13 are stored through the data lines 104 to 107, respectively.
The data is sent to the address replacement circuit 3.4 via the address replacement circuit 3.

The address replacement circuit 3.4 sets the bit corresponding to each information processing device @10.11 stored in the diagnostic control register 6 to “1”.
'', part of the main memory access address from the real memory address registers 1 and 2 is replaced with the address information stored in the diagnostic address display register 5.

That is, the diagnostic address display register 5 stores address information specifying a diagnostic area preset in the main storage device 13, that is, address information to a storage area in the main storage device 13 that is to be subjected to diagnosis.

In addition, the diagnostic control register 6 includes each information processing device 1o, i.
A bit corresponding to i is provided, and when this bit is 0', it indicates that each information processing device fifflO, 11 is accessing by normal operation, and this bit is set to "1".
'' indicates that each information processing device 10.11 is accessing for diagnostic operation, so the address direct conversion circuit 3.4 performs replacement using the information from this diagnostic control register 6.

The request arbitration circuit 7 arbitrates main memory access requests from the information processing device ff110.11. However, when main memory access requests arrive from the information processing devices 10 and 11 at the same time, one of the main memory access requests is selected using a certain algorithm.

The address switching circuit 8 switches the outputs from the address replacement circuits 3 and 4 according to the result of the determination by the request arbitration circuit 7, and sends the output to the physical memory address register 9. The physical memory address register 9 receives the output from the address switching circuit 8 as an input, and holds the physical memory address for the main storage device 13 .

Next, the operation of one embodiment of the present invention will be explained using FIG. 1 and FIG. 2. In the system control device 12 according to an embodiment of the present invention, the operations in response to requests from the information processing devices 10 and 11 are the same, so the operations in response to requests from the information processing device 10 will be described here.

When a main memory access address is input from the information processing device 10 to the system control device 12 via the data ri 1100 and a main memory access request is input via the signal line 102, the main memory access address is stored in the real memory address register 1. The main memory access request is input to the request arbitration circuit 7.

The main memory access address stored in the real memory address register 1 is sent to the address replacement circuit 3 via data lines 104 and 106. Furthermore, address replacement circuit 3
Address information stored in the diagnostic address display register 5 is input to the data line 108, and the data line 11
Bit information of the bit corresponding to the information processing device 10 in the diagnostic control register 6 is inputted via 0.

When the bit information from the diagnostic control register 6 is 0'', the address substitution circuit 3 selects the main memory access address inputted from the real memory address register 1 via the data line 104 and transfers the address via the data line 113. It is sent to the address switching circuit 8.

Further, when the bit information from the diagnostic control register 6 is 1'', the address information of the diagnostic address display register 5 that is input via the data line 108 to the upper part of the address sent to the address switching circuit 8 is selected, The lower part of the main memory access address from the real memory address register 1 input via the data line 106 is selected and sent to the address switching circuit 8 via the data line 113.

That is, when the information processing device 10 is operating in a normal operation, the main memory access address from the information processing device 10 is selected as is, and when the information processing device 10 is operating in a diagnostic operation, the upper part of the main memory access address is selected for diagnosis. It is replaced with address information that specifies a storage area to be used for diagnosis in the main storage device 13, which is stored in the address display register 5 and set in advance by another information processing device or service processor (not shown). This memory? jI
The area is an area that is logically managed in advance so that there is no access from the operational information processing devices 10 and 11 of the multiple information processing device system.

On the other hand, the main memory access request from the information processing device 10.11 is input to the request arbitration circuit 7 via the signal line 102.103, and the request arbitration circuit 7 selects the main memory access request according to a certain algorithm, and A main memory access request is sent to the main memory device 13 via 112. Here, a main memory access request from the information processing device 10 is sent to the main memory device 13.

Roughly speaking, a signal indicating which main memory access request of information processing device 10.11 is to be selected is sent to address switching circuit 8 via signal $1115.

Here, a signal indicating that the main memory access request from the information processing Vt2710 has been selected is transmitted to the address switching circuit 8.
will be sent to.

In response to the signal from the request arbitration circuit 7, the address switching circuit 8 selects between the address information input from the address substitution circuit 3 via the data line 113 and the address information input from the address substitution circuit 4 via the data line 114. One of them is selected and the selected main memory access address is sent to the physical memory address register 9 via data $3116. Here, the information processing device 10
The main memory access address from is selected and sent to the physical memory address register 9.

The main storage access address stored in the physical memory address register 9 is sent to the main storage device 13 via data tiQ117. In the main memory vl113, data is read and written using this main memory access address.

In this way, the main 21! from the information processing device 10.11! When it is determined that the access to the device 13 is due to a diagnostic operation, the address substitution circuit 3.4 stores the upper part of the main memory access address from the information processing device 10.11 in the diagnostic address display register 5. , and by replacing the address information with the address information for a diagnostic area provided in advance in the main memory 13, it is possible to use only a specific area of the main memory 13 for the diagnostic operation of the information processing device 10.11. can. Therefore, if the information processing device 10.11 breaks down, the information processing bag ff1 after repair
10. Information processing device 10 with normal system test in 11
．． 11 while continuing normal operation, it is possible to avoid the risk of system failure after the repaired information processing device 10.11 is put into normal operation.

DETAILED DESCRIPTION OF THE INVENTION According to the present invention, when it is determined that an access from an information processing device to a main storage device is an access by a diagnostic operation, address information from the information processing device is stored in the main storage device. By replacing the address information with a predetermined diagnosis area, it is possible to avoid the risk of system failure after the repaired information processing device is put into normal operation. There is.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention, and FIG. 2 is a block diagram showing a conventional multiple information processing device system. Explanation of symbols of main parts

Claims (1)

[Claims] A system control device that controls access from a plurality of information processing devices to a main storage device, the system control device determining whether the access from the information processing device to the main storage device is by normal operation or diagnostic operation. a determining unit; when the determining unit determines that an access from the information processing device to the main storage device is an access by the diagnostic operation, address information from the information processing device is stored in the main storage device in advance; A system control device comprising address replacement means for replacing address information to a provided diagnostic area.