JPS63237591A - Manufacture of compound semiconductor device - Google Patents

Abstract

PURPOSE:To form a stripe trench of a required form with excellent reproducibility by a method wherein an InGaAsP layer, which is a four-element layer, is selectively etched by dry-etching. CONSTITUTION:A P-type InP layer 21, an N-type InP layer 22 and a P-type InP layer 23 are successively built up by an LPE method on a P-type InP substrate 20 and then an InGaAsP layer 24 is made to grow on the P-type InP layer 23 and a resist film 25 with an aperture 26 is formed on the InGaAsP layer 24. An aperture 27 is formed in the InGaAsP layer 24 by dry-etching with the resist film 25 as a mask. Then, with the InGaAsP layer 24 as a mask, the two-element layers 23...21 directly below the aperture 27 are selectively etched to form a stripe shape aperture 28 with an approximately arrowhead- shape cross section. With this constitution, a stripe trench 29 with an arrowhead- shape cross section can be formed with excellent reproducibility.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a method for manufacturing a compound semiconductor device.

[Prior art] Generally, long wavelength band B
nt) A compound semiconductor device consisting of a laser is made of P of InP.
It has a double hetero structure in which stripe-shaped grooves with a cross section of approximately arrowhead shape are formed in the blocking layer forming the -N-P structure, and the active layer is buried within the grooves, resulting in low leakage current and low threshold. It has the advantage of being stable in the fundamental transverse mode at a certain value. FIG. 2 shows the main steps of the method for manufacturing such a compound semiconductor device. First, as shown in the same figure (A), L P E (Llq
P-I by the uld Phase Epitaxy method
An nP layer 2, an N-InP layer 3, and a P-InPn seed layer are laminated. Next, lattice-matched InG is deposited on the P-In layer 4.
Grow an aAsP layer 5. Next, as shown in FIG. 5B, a resist film 7 having stripe-shaped openings 6 with a width of about 2 μm is formed on the InGaAsP layer 5.

Next, using this resist film 7 as a mask, the InG directly below
IHC only aAsP layer 5, l':2CH3c o o
H: L Etching solution consisting of H202 (hereinafter referred to as K
KI-121 solution) to form an opening 8 as shown in FIG. After that, using the quaternary layer of the InGaAsP layer 5 in which the opening 8 was formed as a mask, the underlying binary InP layer 4...2 is coated with Co.
Selective etching is performed using neHe to form an opening 9 (for example, IEEE JOURNAL OF QUANTL
IMELECTRONIC8, VOL, QE-20, N
o8.1984 P868~).

These openings 8.9 constitute a groove 10 having a substantially arrowhead-shaped cross section.

[Problems to be Solved by the Invention] However, in the method for manufacturing a compound semiconductor device described above, when the InGaAsP layer 5 is etched with the KKI-121 solution, the etching rate changes depending on the temperature of the solution, and the InGaAsP layer 5 InGaA
There may be cases where the sP layer 5 is not completely removed. Also, K
The KI-121 solution easily penetrates between the quaternary layer and the resist film 7. As a result, side etching occurs and the final groove width (stripe width) of the groove 10 becomes wide, making it impossible to obtain good reproducibility. When the stripe width of the groove 10 becomes wider, the width of the active layer constituting the laser probe becomes wider, which increases the threshold current and makes it difficult to obtain oscillation in the fundamental transverse mode, leading to a decrease in device performance. .

The present invention has been made in view of the above points, and provides a compound semiconductor device in which stripe grooves of a predetermined shape are formed with good reproducibility to easily obtain a compound semiconductor device that achieves a low threshold voltage. A manufacturing method is provided.

[Means for Solving the Problems] The present invention comprises a step of growing three binary layers of two-element compound semiconductors with different conductivity types on a compound semiconductor substrate, and a step of forming a quaternary layer made of a compound semiconductor of four elements on the binary layer; a step of forming a resist film having striped openings with a predetermined opening width on the quaternary layer; forming an opening in the quaternary layer by selective dry etching using the quaternary layer as a mask, and forming a striped groove having a substantially arrowhead-shaped cross section in the lower binary layer by selective etching using the quaternary layer as a mask. A method for manufacturing a compound semiconductor device, comprising the steps of:

[Function] According to the method for manufacturing a compound semiconductor device according to the present invention, 4
Openings of a predetermined shape are formed in the original layer by selective dry etching. Next, using this quaternary layer as a mask, selective etching is performed on the binary layer immediately below to form striped grooves having an arrowhead-shaped cross section with good reproducibility. As a result, a compound semiconductor device that achieves a low threshold voltage can be easily obtained at a high yield.

[Examples] Examples of the present invention will be described below with reference to the drawings. FIG. 1 is an explanatory diagram showing an example of the present invention in the order of steps. First, as shown in the same figure (A), a P-type InP substrate 2 is prepared.
0 by the LPE method. N-InP
A layer 22 and an InGaAsP layer 24 are grown. Next, as shown in the same figure (B), AZ-1 is placed on the InGaAsP layer 24.
A resist film 25 made of 350J (trade name, manufactured by SHL PLEY) is formed, and an opening 26 having a width of 2 μm or less is formed therein by ordinary photolithography. Note that the post-baking was performed at about 140° C. in order to increase the resistance of the resist film 25 to dry etching, which will be described later. Next, as shown in FIG. 2C, dry etching is performed using reactive ion beam etching using, for example, carbon gas using the resist groove 25 as a mask.
Selective etching is performed on the G a As P layer 24 to form an opening 27 . In addition, at this time, the P-In in the lower layer
There is no problem even if the P layer 23 is etched. Next, after removing the resist film 25, Cone Hc at 21° C.
i? selectively etching the binary layers 23 . . . 21 of the InGaAs P layer 24 directly under the mask to form striped openings 28 having a substantially arrowhead-shaped cross section (see the figure). After that, the InGaAsP layer 24 is made of 3H2SO.
4: IH20: By removing with a solution consisting of IH202, striped grooves 29 having a substantially arrowhead-shaped cross section and having the same width as the opening 26 formed in the resist film 25 are obtained with good reproducibility. Thereafter, formation of a predetermined active layer, electrode formation, etc. are performed to obtain a compound semiconductor device that satisfies desired specifications.

Note that the surface of the P-1nP layer 23 exposed to the ion beam during dry etching is HCJ2. Since the ion beam is removed by the ion beam, no damage caused by the ion beam remains on the element.

In this method of manufacturing a compound semiconductor device, the selective P layer etching of the InGaAsP layer 24, which is a quaternary layer, is performed by dry etching, so that stripes with a predetermined cross section approximately in the shape of an arrowhead can be formed with extremely good reproducibility. Grooves can be formed.

As a result, devices with low threshold voltage can be obtained at high yield.

[Effects of the Invention] As explained above, according to the method for manufacturing a compound semiconductor device according to the present invention, it is possible to easily produce a compound semiconductor device that achieves a low threshold voltage by forming striped grooves of a predetermined shape with good reproducibility. It is something that can be obtained.

[Brief explanation of drawings]

Fig. 1 is an explanatory diagram showing an example of the present invention in the order of steps;
The figure is an explanatory diagram showing a conventional method for manufacturing a compound semiconductor device in order of steps. 20 ・= I n P substrate, 21-P layer-1nP layer,
22-N-I n P layer, 23 =-P-I n
P layer, 24--InGaAsP layer, 25--resist film, 2δ--opening, 27--opening, 28--
- Opening, 29...groove. Applicant's agent Patent attorney Takeshi Suzue Industry 1 Figure 2

Claims (1)

[Claims] A step of growing three binary layers made of two-element compound semiconductors on a compound semiconductor substrate with different conductivity types sequentially, and a quaternary layer made of four-element compound semiconductors on the topmost binary layer. a step of forming a resist film having striped openings with a predetermined opening width on the quaternary layer, and forming an opening in the quaternary layer by selective dry etching using the resist film as a mask. and a step of forming striped grooves having a substantially arrowhead-shaped cross section in the lower binary layer by selective etching using the quaternary layer as a mask. manufacturing method.