JPS6323353A - Controlling system for output clip level of solid-state image pickup device - Google Patents

Abstract

PURPOSE:To minimize a circuit scale without requiring a clip level controlling circuit on the outside, by using a solid state image pickup element of charge transfer type, specifying transfer clock and set clock, and controlling the voltage of an output gate. CONSTITUTION:Electric charge 207 is reset so as to turn a resetting transistor 108 on, and the potential of a floating diffusion layer 103 is set at the same level as that of a drain electrode 101. At the time when the potentials of phiS, 105 and phiS2 106 are in a transition period and the potential of a storage domain of phiS2 106 and the potential of a barrier domain of phiS1 105 reach the same level, the potential difference Q between the potential produced by an output gate 104 and the potential of the storage domain of phiS2 106 is set smaller than the potential difference Q2 between the storage domain and the barrier domain of phiS2 106, and the reset transister 108 is in ON-state. In this condition, the excess charge flowing into the floating diffusion layer 103 is rapidly reset, and white clip operation is performed.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to an output clip level control method for the RI solid-state image pickup device, in particular, a clipping operation of the output level is performed at the output portion inside the image pickup element to suppress the output below a certain value. The present invention relates to an output clip level control method for a solid-state imaging device.

[Conventional technology]

Not only solid-state imaging devices but also devices that apply virtual image devices have a smaller dynamic range on the circuit side than the dynamic range of the device, and the output of TV cameras is standardized for interface with other imaging devices. Therefore, in order to obtain an output that corresponds to large changes in the amount of light, gain control, nonlinear compression, etc. are performed, and clipping is performed to cut out unnecessary areas. In particular, it is commonly used as a white clip for television camera equipment.

FIG. 3 is a block diagram showing an example of an output clip level control method for a conventional solid-state imaging device.

In the figure, the output from an image sensor 301 is input to an amplifier 302. Through the DC regenerator 303, the image sensor 30
A DC level is set for the signal from 1, and the signal is clipped to a predetermined clip level by a white clipper 304. After this clipped signal is received by the amplifier 305, it is transmitted to the subsequent circuit. This output clip level control method can be inserted anywhere in the signal path of the camera system, but if it is inserted at the rear of the system, all the preceding circuits will be affected by the dynamic range of the sensor output. In addition, a stable DC regeneration circuit is required.Furthermore, as the power supply voltage of recent integrated circuits for camera systems is low, the circuit dynamics are also decreasing. Therefore, it is usually used in a relatively low part of the system, that is, a part close to the image sensor output.

[Problems to be Solved by the Invention] The above-mentioned conventional output clip level control method for solid-state imaging devices has a disadvantage in terms of circuit design, especially when dealing with a highly aggressive output such as the output of a solid-state imaging device. The disadvantage is that there are many points to be considered and the structure is complicated. In addition, in camera systems that require equal color separation of single-tube color cameras and single-chip color cameras, the light sensitivity of the output of each color is generally different, so the clip level is different for each color.
Clipping at a single output point is impossible and is done after color separation, so it has the disadvantage of becoming large in size.

[Means for solving problems]

The output clip level control method of the solid-state imaging device of the present invention includes a transfer register consisting of a charge transfer device formed on the same semiconductor substrate, and a floating diffusion layer for converting the charge transferred by the transfer register into an output voltage. In the solid-state imaging device, the solid-state imaging device includes an output amplifier using the above, a reset transistor for resetting the charge of the floating diffusion layer, and an output gate section provided between the transfer register and the floating diffusion layer. The reset transistor is in a conductive state at the timing when charge is transferred to the potential well adjacent to the output gate portion of the transfer register, and the voltage applied to the output gate portion is accumulated in the floating diffusion layer. It is equipped with a control means for controlling the charge to be below a certain amount.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention.

Figure 1 (@ side view showing the cross section of the image sensor part in blri Figure 1 ta+, Figure 1 fc) is Figure 1 (a)
Fig. 1(d) is an enlarged view of the time t3 portion in Fig. 1(C), and Fig. 2 is a timing diagram of the applied pressure applied to the main electrode. FIG. 1 is a diagram showing the potential of the 11 main poles in FIG. 1 [a] in the typing shown in FIG. 1 (C).

In this embodiment, the inside of the image sensor 111 includes transfer electrodes φ81105. A two-phase drive transfer register 107 with φSt 106, a drain t&lOx in the diffusion layer lOO, a source terminal in the floating diffusion 4103, and a φR in the gate terminal.
It is configured to include a reset transistor 108 connected to an electrode 102, and an output amplifier 109 connected to the source terminal of the reset transistor 108. Further, the output terminal of the output amplifier 109 is connected to the amplifier 110 via the coupling capacitor C1, and the transfer register 1
07 output game) 104d clip level adjuster 113
A reset power supply 112 is connected to the drain electrode 101 of the reset transistor 108 .

Next, the operation of the output clear and pre-level control method of the solid-state imaging device of this embodiment will be explained with reference to FIG.

In Fig. 2, the shaded area indicates that charge is accumulated in the corresponding electrode, and the white clipped charge e-
1 [shown as load 208].

Charge 209ri shows the charge generated at a time after the generation of charge 208.

In FIG. 2, the horizontal axis represents the time axis t, and when 1=1°, charges 207 from the previous stage circuit are accumulated in the floating diffusion layer 103. By setting the φR electrode 102 to a high level, that is, making the reset transistor 108 conductive, the current 207 is reset, and the potential of the floating diffusion layer 103 is set to the same level as the potential of the pole ioi. That is, when the charge 208 is transferred to the floating diffusion layer 103, the clearing operation is performed so that an output corresponding to the amount of transferred charge is obtained. Next, in the state of 1=13 shown in FIG. 1(d), between this state rttz and 14, φSt 105 and φ
The potential of 5t106 becomes φ82106 during the transition period.
This figure shows the moment when the potentials of the storage area of φ31105 and the barrier area of φ31105 reach the same level.

At this point, as shown in (3) in FIG. 2, if the potential difference Ql between the potential created by the output gate 104 and the potential of the storage region of φ5z106 is set smaller than the potential difference Q2 of both the storage and barrier regions of φ5z106. If charges exceeding the former potential difference are transferred, excess 'fx charges will flow into the floating diffusion layer 103 through the output gate 104. If the reset transistor 108 is in a conductive state at this time, the excess charge flowing into the floating diffusion layer 103 is quickly reset and a white clipping operation is performed. And the white clipped charge is 1=1. After the reset transistor 108 becomes non-conductive at t=
At t1Vc, charge 208 is transferred to floating diffusion layer 103, and a white-clipped output voltage is obtained. Therefore, in a system where clipping operation is possible at the output part inside the image sensor 111, the amplifier 110 is installed outside the image sensor 111, and the signal can only be amplified to a predetermined level and transmitted to the subsequent circuit. can.

Note that the voltage of the output gate 104 is adjusted by the clip level adjuster 1.
13, the clip level can be freely selected, and the clip can also be set not to operate.

〔Effect of the invention〕

As explained above, the present invention uses a charge transfer type solid-state image sensor, defines the timing of the transfer clock and the reset clock, and controls the voltage of the output gate, thereby performing a clipping operation at the internal output section of the solid-state image sensor. Since there is no need for any external circuit for controlling the level, the size of one circuit can be made very small. In addition, since the output gate has a small load capacity, it can be easily modulated externally, and even in single-chip color camera devices, it has the effect of easily clipping by changing the clip level according to the output color signal. .

[Brief explanation of drawings]

Fig. 1 fal ri A block diagram showing an embodiment of the present invention, Fig. 1 (b) A sectional view showing the cross section of the image sensor portion in Fig. 1 (a), Fig. 1 [C] ri 1st
Figure (timing diagram of the voltage applied to the main electrode of aj,
Fig. 1 (d) ri A diagram showing the time t3 portion in Fig. 1 tc+ enlarged, Fig. 2 ri Fig. 1 at the timing shown in Fig. 1 tel (Fig. 1 in aj) 3 is a block diagram showing an example of an output clip level control method of a conventional solid-state imaging device. 100...Diffusion layer, 101...Drain Electrode. 102...φR electrode, 1o3... Floating diffusion layer, 104... Output gate, 105, 10
6...Transfer electric sign (φSInφSz), 107・
...Transfer register, 108...Reset transistor, 109...Output amplifier, 110
......Amplifier, 111...Image sensor, 112...Reset power supply, 113...
・・Clip level adjuster, 207, 208, 209・
...Charge, 303...DC regenerator, 30
4...E 1st entry (LOL) 7th 'Z (, b' Figure 1 (ti) Figure 2

Claims (1)

[Claims] a transfer register consisting of a charge transfer device formed on the same semiconductor substrate; an output amplifier using a floating diffusion layer for converting the charge transferred by the transfer register into an output voltage; In a solid-state imaging device comprising a reset transistor for resetting and an output gate section provided between the transfer register and the floating diffusion layer, a potential well adjacent to the output gate section of the transfer register is provided. The reset transistor is in a conductive state at the timing when the charge is transferred, and a control means is provided for controlling the voltage applied to the output gate part so that the charge accumulated in the floating diffusion layer is equal to or less than a certain amount. An output clip level control method for a solid-state imaging device characterized by: