JPS63232624A - Da converter circuit - Google Patents

Abstract

PURPOSE:To simplify a circuit constitution and to contrive to attain small size by using a current switch basic circuit so as to output an output of a DA converter through an AMP constituted by applying feedback from a collector of an opposite side TR to the opposite side of the input to the base. CONSTITUTION:The DA converter circuit 4 employs basic circuits each comprising two collector resistors in a cell, transistors (TRs) Q1, Q2 and a current source 1 as switch circuits turned on/off depending whether a digital input signal is higher or lower than the reference voltage Vref. The buffer AMP 5 is constituted by connecting the emitter of a TR Q4 and the base of the TR Q2 so as to apply feedback from the collector of the TR Q2 of the internal basic circuit to the base. Then the base of the TR Q1 is used as the input and the emitters of the TRs Q3, Q4 are used as the outputs.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a DA coco/par circuit.

[Conventional technology]

Conventionally, when using a DA converter circuit, the configuration has been divided into a single DA converter and a logic section that controls it.

(Problems to be Solved by the Invention) The above-mentioned conventional technology is configured by being divided into a single DA converter circuit and a logic section that controls it, so it takes up too much space and is not suitable for miniaturization. It was not possible to implement a logic circuit configured using a DA converter circuit within LliI.

An object of the present invention is to construct a logic circuit using an LEI KDM converter and to achieve miniaturization and high integration of the circuit.

[Means for solving problems]

The above purpose is to use a logic gate array to configure one current source of a current switch type basic logic circuit into a DA converter that corresponds to the weight of one digit of the DA converter circuit, and to convert the output of the current source into a current switch type basic logic circuit. This is achieved by using a configuration in which feedback is applied from the collector to the base of the transistor on the opposite side of the input, and the output is output through the configured AMP.

[Effect]

One current source of the current switch type basic circuit is connected to the base of the transistor on the input side as a common, and the collector resistor of the transistor on the input side of the current switch type basic circuit is connected to correspond to the weight of two DA converter circuits and one digit. When an internal logic level is input to this circuit, the current switch basic circuit, which is wired in correspondence to the weight of one digit in two DAM converters, turns on and off at the same time in response to the input, and the wired collector resistor turns on and off simultaneously. The current flowing through changes in response to the input, and the internal logic level is high. It operates to output individual voltages at level, low, and between levels. The operation of the above circuit is nothing but the operation of two DA converters.

If two DA converter circuits are configured using the above method, the output amplitude will be the same as the internal logic amplitude, but feedback will be returned to the base from the collector of the transistor on the opposite side of the input of the current switch type basic circuit used to configure the DM converter circuit. A.M.
By configuring P and outputting through it, the output amplitude can be made smaller than the internal logic amplitude.

・Using a logic gate array according to the above method.

Two DA converters can be configured, and a circuit using two DA converters can be integrated into an LSI.

〔Example〕

The present invention will be explained below by taking as an example a case where a variable delay circuit is constructed using a logic gate array.

As shown in FIG. 1, the variable delay circuit includes two DA converter circuits, a buffer AMP5. It consists of a receiver circuit 6.

The DA converter 2 circuit turns on and off a basic circuit consisting of two collector resistors Ro, a transistor Q1, a transistor Q2, and a current source 1 in the cell depending on whether the digital input signal is at a low level or a level lower than the reference voltage Vref. Use it as a switch circuit to realize two DA converter circuits.

In the case of the two DA converter circuits shown in Fig. 1, there is one switch circuit for 2° weighting, two for 21 weighting, four for 22 weighting, and eight for 2s weighting.

For each of the 16 input transistors with 24 weightings, the bases of the transistors on the input side are connected as a common, and the collector resistor on the input side is connected, and by changing the switch, the current flowing through the connected collector resistor Ra is changed, and the output side analog changing the voltage.

The buffer AMP5 has feedback from the collector to the base of the transistor Q2 in the internal basic circuit, and from the emitter of the transistor Q4 to the transistor Q! The base of the transistor Q1 is used as an input, the emitter of the transistor Qs, and the emitter of the transistor Q4 are used as outputs. This buffer AMI' has characteristics as shown in FIG.

The receiver circuit 6 has the same configuration as the internal basic circuit, and instead of the reference voltage VrefO used in the internal basic circuit at the base of the transistor Q2, the analog output voltage set by the DA converter 2 circuit is input as the comparison voltage of the receiver circuit. are doing. By varying this comparison voltage, the pulse input from terminal 2 is delayed and the pulse input from terminal 3 is delayed.
Output from

When the switch circuits of the two DA converters are all turned off, the analog output voltage is at the high level of the internal logic level, and when all are turned on, the analog output voltage is equal to the low level of the internal logic level. Therefore, when the circuit configuration shown in Figure 2 is used and the DA converter is used at full bits, the two DA converters used as the comparison voltage of the receiver circuit become stable as a variable delay circuit when the set analog output voltage is close to the internal logic level. It doesn't work and there is a problem.

To solve this problem, either program the software so that it does not set unusable analog voltages, or configure the two DA converter circuits separately so that the amplitude of the output voltage is smaller than the internal logic amplitude. It is necessary to use the

Here, if a buffer AMP5 as shown in FIG. 1 is used to output the output of the DA converter 2 circuit through this buffer AMP5, and this output voltage is used as a comparison voltage of the receiver circuit 6,
Since the characteristics are as shown in FIG. 3, the amplitude of the voltage used as the comparison voltage of the receiver circuit 6 is smaller than the internal logic amplitude. By adopting the above circuit configuration, a variable delay circuit that operates stably even when the DA converter setting is used at full bits can be realized with a simple circuit configuration and a small number of gates, without changing the configuration of the DA converter circuit used. .

〔Effect of the invention〕

With the configuration as described above, the present invention can obtain the following effects.

t By using a gate array for logic circuits, 1
It is compact because it simultaneously includes logic for controlling two CKDA converter circuits.

2. A buffer AMP with a gain smaller than 1 can be realized with a simple circuit configuration, and by using this, the DA
The output amplitude of the converter circuit can be made smaller than the internal logic amplitude.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a variable delay circuit according to an embodiment of the present invention, FIG. 2 is a block diagram of a variable delay circuit, and FIG. 3 is a characteristic diagram of a transfer curve of a buffer AMP used in the present invention. Q1 to Q4...Bipolar transistor, RC...
Collector resistance, VBTB, VTτ... common potential line. Vref...Reference voltage, 1...Current source, 2...Pulse input terminal, 5...Pulse output terminal, 4...DA converter circuit, 5...Buffer AMP. 6...Receiver circuit. Figure 1 Figure 2 → Figure 3

Claims (1)

[Claims] 1. In a DA converter circuit using a logic gate array, the output of the DA converter circuit configured with a current switch type basic logic circuit used therein is connected to the collector of the transistor on the opposite side from the input using the current switch type basic circuit. A DA converter circuit characterized by outputting through an AMP configured by applying feedback to a base.