JPS63232368A - Hybrid optoelectronic integrated circuit - Google Patents
Hybrid optoelectronic integrated circuitInfo
- Publication number
- JPS63232368A JPS63232368A JP62064141A JP6414187A JPS63232368A JP S63232368 A JPS63232368 A JP S63232368A JP 62064141 A JP62064141 A JP 62064141A JP 6414187 A JP6414187 A JP 6414187A JP S63232368 A JPS63232368 A JP S63232368A
- Authority
- JP
- Japan
- Prior art keywords
- light emitting
- integrated circuit
- optical waveguide
- gaas
- optoelectronic integrated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000005693 optoelectronics Effects 0.000 title claims abstract description 18
- 239000004065 semiconductor Substances 0.000 claims abstract description 39
- 230000003287 optical effect Effects 0.000 claims abstract description 34
- 239000000758 substrate Substances 0.000 claims abstract description 23
- 238000002347 injection Methods 0.000 claims description 4
- 239000007924 injection Substances 0.000 claims description 4
- 238000004519 manufacturing process Methods 0.000 abstract description 7
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 30
- 238000005530 etching Methods 0.000 description 4
- 238000000034 method Methods 0.000 description 4
- 238000005253 cladding Methods 0.000 description 3
- 229920002120 photoresistant polymer Polymers 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 239000012776 electronic material Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 238000012827 research and development Methods 0.000 description 1
- 238000000992 sputter etching Methods 0.000 description 1
Abstract
Description
【発明の詳細な説明】
〔概 要〕
光導波路およびトランジスタなどの電子素子が一体に形
成され半絶縁性半導体基板に対してフリップチップタイ
プの半導体発光素子を光導波路をまたぐようにフェース
ダウンボンディングして・光結合させたハイブリッド光
電子集積回路。[Detailed Description of the Invention] [Summary] A flip-chip type semiconductor light emitting device is face-down bonded to a semi-insulating semiconductor substrate in which an optical waveguide and electronic elements such as transistors are integrally formed so as to straddle the optical waveguide. Hybrid optoelectronic integrated circuit with optical coupling.
本発明は、光電子集積回路(01! IC)、より詳し
くは、−半導体発光素子と、トランジスタなどの電子素
子と、光導波路とを複合化した光電子集積回路に関する
ものである。The present invention relates to an optoelectronic integrated circuit (01! IC), and more particularly to an optoelectronic integrated circuit that combines a semiconductor light emitting element, an electronic element such as a transistor, and an optical waveguide.
半導体レーザや発光ダイオードの発光素子および/又は
フォトダイオードの受光素子とMTS PETなどの電
子素子とを同一半導体基板に集積させた光電子集積回路
の研究開発がなされ、試作製品が発表されている(例え
ば、最近の光IC開発例、電子材料、1983年11月
号、Vol、22. Na1l、pp、38−58;小
林切部:“光集積回路(光IC) ”、日経マイクロ
デバイス、■985年7月号、隘1 、pp、211−
228、参照)。さらに、光導波路を組合せる研究も行
なわれている。Research and development has been conducted on optoelectronic integrated circuits in which a light emitting element such as a semiconductor laser or light emitting diode and/or a light receiving element such as a photodiode and an electronic element such as MTS PET are integrated on the same semiconductor substrate, and prototype products have been announced (for example, , Recent examples of optical IC development, Electronic Materials, November 1983 issue, Vol, 22. Na1l, pp, 38-58; Kiribe Kobayashi: “Optical integrated circuit (optical IC)”, Nikkei Microdevices, ■985 July issue, No. 1, pp, 211-
228, see). Furthermore, research on combining optical waveguides is also being conducted.
(発明が解決しようとする問題点〕
半導体発光素子、電子素子および光導波路を同一半導体
基板上にモノリシックに形成することは、特に発光素子
と電子素子とで構造が大きく異なるために、非常に複雑
な製作工程(プロセス)を必要とする。このことはその
製作を時間とコストとのかかるものとしている。(Problems to be solved by the invention) Monolithically forming a semiconductor light emitting device, an electronic device, and an optical waveguide on the same semiconductor substrate is extremely complicated, especially since the structures of the light emitting device and the electronic device are significantly different. This makes the production time-consuming and costly.
本発明の目的は、比較的簡単な製作工程で製造できる半
導体発光素子、電子素子および光導波路からなる光電子
集積回路を堤供することである。An object of the present invention is to provide an optoelectronic integrated circuit comprising a semiconductor light emitting device, an electronic device, and an optical waveguide, which can be manufactured through a relatively simple manufacturing process.
そこで、本発明の要旨は、半絶縁性半導体基板と、半導
体基板上に形成された光導波路と、半導体基板上に形成
された電子素子と、フリップチップタイプの半導体発光
素子とを含んでなり、半導体発光素子は光導波路をまた
ぐように半導体基板にフェースダウンボンディングされ
、半導体発光素子と光導波路とが光結合されていること
を特徴とするハイブリッド光電子集積回路である。要す
るに、本発明に係る光電子集積回路では、発光素子が別
途製作されて半導体基板上に取付けられるわけである。Therefore, the gist of the present invention is to include a semi-insulating semiconductor substrate, an optical waveguide formed on the semiconductor substrate, an electronic element formed on the semiconductor substrate, and a flip-chip type semiconductor light emitting element. The semiconductor light emitting device is face-down bonded to the semiconductor substrate so as to straddle the optical waveguide, and the semiconductor light emitting device and the optical waveguide are optically coupled, which is a hybrid optoelectronic integrated circuit. In short, in the optoelectronic integrated circuit according to the present invention, the light emitting element is separately manufactured and mounted on the semiconductor substrate.
半導体発光素子はその一面に両電極(p電極およびn電
極)が形成された横注入型レーザが好ましく、例えば、
本出願人が既に特願昭60−270509号にて提案し
たレーザが特に好ましい。The semiconductor light emitting device is preferably a horizontal injection type laser in which both electrodes (p electrode and n electrode) are formed on one surface, for example,
Particularly preferred is the laser already proposed by the present applicant in Japanese Patent Application No. 60-270509.
以下、添付図面を参照して本発明の実施態様例によって
本発明の詳細な説明する。DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will now be described in detail by way of embodiments with reference to the accompanying drawings.
第1図は本発明に係るハイブリッド光電子集積回路の概
略斜視図であり、この集積回路は、基本的に、半絶縁性
半導体(GaAs)基板1上にあるGaAsFETの電
子素子2、A I GaAs層の光導波路3および半導
体レーザの発光素子4からなる。なお、第1図において
は光導波路3の光を検出するMSM型ホトディテクタ5
が設けられている。FIG. 1 is a schematic perspective view of a hybrid optoelectronic integrated circuit according to the present invention, which basically consists of a GaAs FET electronic element 2 on a semi-insulating semiconductor (GaAs) substrate 1, an A I GaAs layer. It consists of an optical waveguide 3 and a semiconductor laser light emitting element 4. In addition, in FIG. 1, an MSM type photodetector 5 that detects the light of the optical waveguide 3
is provided.
本発明に係る光電子集積回路が、例えば、次のようにし
て製作される。The optoelectronic integrated circuit according to the present invention is manufactured, for example, as follows.
まず、半絶縁性半導体(A l 6.asGao、 5
sAs)基牟反1の上にノンドープのA1゜、 zGa
6. aAs層そしてGaAs層を連続エピタキシャル
成長させる。First, a semi-insulating semiconductor (Al6.asGao, 5
sAs) Non-doped A1゜, zGa on substrate 1
6. The aAs layer and the GaAs layer are successively epitaxially grown.
MSNホトディテクタ5のために、GaAs層の一部を
第1図に示す如くに少しずつ薄くなるように斜めエツチ
ングする。このGaAs層の選択的斜めエツチングのた
めに、エツチングすべきGaAs層表面部分を露出させ
て、それ以外の全面をホトレジストマスク層にて覆う、
200℃程度のボストベークを行なって、ホトレジスト
マスク層のレジストを柔かくし表面張力によってマスク
層のかどを丸くする。このマスク層をマスクとして、イ
オンミリング(Ar”イオン使用)によって、露出した
GaAs層部分をエツチングするわけであるが、この際
に、イオンが基板に対して80〜70度の角度で衝突す
るようにしかつ基板を回転させる。このエツチングの結
果として、GaAs層を緩やかな斜面とすることができ
る。そして、ホトレジストマスク層を除去する。For the MSN photodetector 5, a part of the GaAs layer is diagonally etched so as to become thinner little by little as shown in FIG. For this selective oblique etching of the GaAs layer, the surface portion of the GaAs layer to be etched is exposed, and the entire other surface is covered with a photoresist mask layer.
Bost baking is performed at about 200° C. to soften the resist of the photoresist mask layer and round the edges of the mask layer due to surface tension. Using this mask layer as a mask, the exposed portion of the GaAs layer is etched by ion milling (using Ar" ions). At this time, the ions are made to collide with the substrate at an angle of 80 to 70 degrees. Then, the substrate is rotated. As a result of this etching, the GaAs layer can have a gentle slope.The photoresist mask layer is then removed.
次に、適切なエツチング方法によってGaAs層を選択
エツチングしてGaAs FET2のためのGaAs部
分8およびMSMホトディテクタ5のための斜面を有す
るGaAs部分9を残す。さらに、エッチャントおよび
レジストパターンを変えたエツチング方法によって、ノ
ンドープA I GaAs層を選択的にエツチングして
光導波路3 (MSMホトディテクタ5用GaAs部分
9の下を含む)およびGaAs FET2のGaAs部
分8の下にA I GaAs部分10を残す。第1図に
示すようにGaAs FET2の^It GaAs部分
10およびGaAs部分8が島状にA I GaAs基
vi、1上に形成される。このGaAs部分8に公知の
GaAs FET製造工程の処置を施こしてソース領域
、ドレイン領域、ソース電極11、ドレイン電極12お
よびゲート電極13を形成し、所定の配線14〜17を
形成して、FETを製造する。この配線形成時に、MS
Mホトディテクタ5の電極配線18を形成して光検出器
となる。この場合には、光導波路3の光をGaAs部分
9へもれ込ませてホールとエレクトロンを発生させ、あ
らかじめ電圧を電極に印加しておいてその電流変化とし
て光を電気信号に変える。また、配線14および15の
光導波路3近くの端部はこの光導波路3と平行なストラ
イプ状のパッドであって、後述する半導体レーザ(発光
素子)4のn電極21およびn電極22に対応してフリ
ップチップボンディング方式で接続するものである。The GaAs layer is then selectively etched by a suitable etching method to leave a GaAs portion 8 for the GaAs FET 2 and a GaAs portion 9 with a slope for the MSM photodetector 5. Furthermore, by using an etching method using different etchants and resist patterns, the non-doped A I GaAs layer is selectively etched to form the optical waveguide 3 (including under the GaAs portion 9 for the MSM photodetector 5) and the GaAs portion 8 of the GaAs FET 2. Leaving the A I GaAs section 10 underneath. As shown in FIG. 1, the ^It GaAs portion 10 and the GaAs portion 8 of the GaAs FET 2 are formed in the form of islands on the A I GaAs group vi,1. This GaAs portion 8 is subjected to a known GaAs FET manufacturing process to form a source region, a drain region, a source electrode 11, a drain electrode 12, and a gate electrode 13, and predetermined wirings 14 to 17 are formed to complete the FET. Manufacture. When forming this wiring, MS
The electrode wiring 18 of the M photodetector 5 is formed to become a photodetector. In this case, the light from the optical waveguide 3 leaks into the GaAs portion 9 to generate holes and electrons, and a voltage is applied to the electrode in advance and the light is converted into an electrical signal as the current changes. Further, the ends of the wirings 14 and 15 near the optical waveguide 3 are striped pads parallel to the optical waveguide 3, and correspond to the n-electrodes 21 and n-electrodes 22 of the semiconductor laser (light emitting device) 4, which will be described later. The connection is made using the flip-chip bonding method.
半導体レーザ4は別途製造しておくものであり、本出願
人が提案した横注入型レーザをフリップチップとして製
造する。この横注入型レーザは、基本的には、半絶縁性
GaAs基板23、高抵抗^It GaAsクラッド層
、多重量子井戸(MQ■活性層、高抵抗A II Ga
Asクラッド層、ノンドープGaAsキャップ層、n電
極21、およびn電極22からなり、活性層の発光領域
を横方向にはさむようにp型頭域24およびn型領域2
5が形成されており、そしてp型コンタクト領域26お
よびn型コンタクト領域27が形成されて、電流が活性
層の発光領域を横方向に流れるようになっている。そし
て、この半導体レーザ4の光を光導波路へもらすために
発光領域上の電極側クランド層を選択エツチングして少
し薄くしておく (約0.7μm厚にする)、あまり薄
くしすぎるとクラッド層として光とじ閉め効果が低下し
てしまう。なお、端面の発光の必要がない場合には、レ
ーザ端面の両面に高反射コーテイング膜(図示せず)を
形成しておいてレーザの像間化が図れる。The semiconductor laser 4 is manufactured separately, and the horizontal injection type laser proposed by the present applicant is manufactured as a flip chip. This lateral injection laser basically consists of a semi-insulating GaAs substrate 23, a high-resistance ^It GaAs cladding layer, a multiple quantum well (MQ■ active layer, a high-resistance A II Ga
It consists of an As cladding layer, a non-doped GaAs cap layer, an n-electrode 21, and an n-electrode 22, and a p-type head region 24 and an n-type region 2 sandwiching the light emitting region of the active layer in the lateral direction.
5 is formed, and a p-type contact region 26 and an n-type contact region 27 are formed to allow current to flow laterally through the light emitting region of the active layer. Then, in order to allow the light from this semiconductor laser 4 to pass through the optical waveguide, the electrode-side cladding layer above the light-emitting area is selectively etched to make it a little thinner (about 0.7 μm thick). As a result, the optical closing effect decreases. Incidentally, when there is no need for light emission from the end face, high reflection coating films (not shown) are formed on both sides of the laser end face to achieve laser image formation.
得られた半導体レーザ4を第1図に示すごとく光導波路
3をまたぐようにフェースダウンボンディング方式で配
線14および15に接続する。この際に、レーザ4から
の光導波路3への光のシミ出しを確実にするために、ク
ラッド層と同程度かこれよりも小さい屈折率の接着剤(
例えば、レンズボンド(商品名))28を用いる。この
ようにして半導体レーザ(発光素子)4と光導波路3と
を光学的に接続することができる。さらに、光導波路3
へ公知の光コネクターを用いて信号光29を入れること
ができる。The obtained semiconductor laser 4 is connected to wirings 14 and 15 by face-down bonding so as to straddle the optical waveguide 3, as shown in FIG. At this time, in order to ensure that the light from the laser 4 bleeds into the optical waveguide 3, an adhesive (
For example, Lensbond (trade name) 28 is used. In this way, the semiconductor laser (light emitting element) 4 and the optical waveguide 3 can be optically connected. Furthermore, the optical waveguide 3
A signal light 29 can be input into the optical connector using a known optical connector.
上述したようにして電子素子と光導波路とをモノリシッ
クに同一半導体基板上に形成したものに発光素子をワイ
ヤボンディングでなくハイブリッド組込みした光電子集
積回路が得られる。As described above, an optoelectronic integrated circuit can be obtained in which an electronic element and an optical waveguide are monolithically formed on the same semiconductor substrate, and a light emitting element is hybrid-integrated instead of by wire bonding.
上述の場合はGaAs系であるが、InP系の材料でも
って構成した同様な光電子集積回路も製作できる。Although GaAs is used in the above case, similar optoelectronic integrated circuits made of InP-based materials can also be fabricated.
本発明よれば、ハイブリッド方式を採用して比較的簡単
な製作工程でもって光電子集積回路が得られて、個別部
品からの構成よりも小型化かつシステムの信頼性向上が
図れる。According to the present invention, an optoelectronic integrated circuit can be obtained through a relatively simple manufacturing process by employing a hybrid method, and the system can be made smaller and more reliable than a configuration made of individual components.
第1図は本発明に係るハイブリッド光電子集積回路の概
略斜視図である。
1・・・半絶縁性半導体基板、
2・・・電子素子(GaAs FET)、3・・・光導
波路、
4・・・発光素子(半導体レーザ)、
8、9−GaAs部分、
14〜17・・・配線、 21・・・p電極、2
2・・・n電極。FIG. 1 is a schematic perspective view of a hybrid optoelectronic integrated circuit according to the present invention. DESCRIPTION OF SYMBOLS 1... Semi-insulating semiconductor substrate, 2... Electronic element (GaAs FET), 3... Optical waveguide, 4... Light emitting element (semiconductor laser), 8, 9-GaAs portion, 14-17. ...Wiring, 21...p electrode, 2
2...n electrode.
Claims (1)
た光導波路と、前記半導体基板上に形成された電子素子
と、フリップチップタイプの半導体発光素子とを含んで
なり、前記半導体発光素子は前記光導波路をまたぐよう
に前記半導体基板にフェースダウンボンディングされ、
前記半導体発光素子と前記光導波路とが光結合されてい
ることを特徴とするハイブリッド光電子集積回路。 2、前記半導体発光素子は横注入型レーザであることを
特徴とする特許請求の範囲第1項記載のハイブリッド光
電子集積回路。[Claims] 1. A semi-insulating semiconductor substrate, an optical waveguide formed on the semiconductor substrate, an electronic device formed on the semiconductor substrate, and a flip-chip type semiconductor light emitting device. The semiconductor light emitting device is face-down bonded to the semiconductor substrate so as to straddle the optical waveguide,
A hybrid optoelectronic integrated circuit characterized in that the semiconductor light emitting device and the optical waveguide are optically coupled. 2. The hybrid opto-electronic integrated circuit according to claim 1, wherein the semiconductor light emitting device is a lateral injection type laser.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62064141A JPS63232368A (en) | 1987-03-20 | 1987-03-20 | Hybrid optoelectronic integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62064141A JPS63232368A (en) | 1987-03-20 | 1987-03-20 | Hybrid optoelectronic integrated circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63232368A true JPS63232368A (en) | 1988-09-28 |
Family
ID=13249502
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62064141A Pending JPS63232368A (en) | 1987-03-20 | 1987-03-20 | Hybrid optoelectronic integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63232368A (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4999686A (en) * | 1988-06-24 | 1991-03-12 | U.S. Philips Corporation | Semiconductor device comprising an integrated optical guide, which has at least one rectilinear part and one curved part |
JP2008198957A (en) * | 2007-02-16 | 2008-08-28 | Hitachi Ltd | Semiconductor laser device and optical amplifier |
JP2009542033A (en) * | 2006-06-30 | 2009-11-26 | インテル コーポレイション | Electrically pumped semiconductor evanescent laser |
US8994000B2 (en) | 2005-07-29 | 2015-03-31 | Osram Opto Semiconductors Gmbh | Optoelectronic semiconductor chip |
JP2015232621A (en) * | 2014-06-09 | 2015-12-24 | 日本電信電話株式会社 | Optical semiconductor element packaging method and device |
CN111247704A (en) * | 2017-11-01 | 2020-06-05 | 国际商业机器公司 | Electro-optic device with lateral active regions |
-
1987
- 1987-03-20 JP JP62064141A patent/JPS63232368A/en active Pending
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4999686A (en) * | 1988-06-24 | 1991-03-12 | U.S. Philips Corporation | Semiconductor device comprising an integrated optical guide, which has at least one rectilinear part and one curved part |
US8994000B2 (en) | 2005-07-29 | 2015-03-31 | Osram Opto Semiconductors Gmbh | Optoelectronic semiconductor chip |
JP2009542033A (en) * | 2006-06-30 | 2009-11-26 | インテル コーポレイション | Electrically pumped semiconductor evanescent laser |
JP2013048302A (en) * | 2006-06-30 | 2013-03-07 | Intel Corp | Electrically pumped semiconductor evanescent laser |
US8767792B2 (en) | 2006-06-30 | 2014-07-01 | Intel Corporation | Method for electrically pumped semiconductor evanescent laser |
JP2008198957A (en) * | 2007-02-16 | 2008-08-28 | Hitachi Ltd | Semiconductor laser device and optical amplifier |
JP2015232621A (en) * | 2014-06-09 | 2015-12-24 | 日本電信電話株式会社 | Optical semiconductor element packaging method and device |
CN111247704A (en) * | 2017-11-01 | 2020-06-05 | 国际商业机器公司 | Electro-optic device with lateral active regions |
JP2021501462A (en) * | 2017-11-01 | 2021-01-14 | インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Machines Corporation | How to make transverse current injection electro-optic devices, silicon photonic chips and electro-optic devices |
CN111247704B (en) * | 2017-11-01 | 2022-06-14 | 国际商业机器公司 | Electro-optic device with lateral active regions |
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