JPS63228006A - Optical coordinate detector - Google Patents

Abstract

PURPOSE:To output a corresponding detection area when input coordinates within the range of a detection area are detected by providing a detection area setting means, a detection area number setting means, and a detection position deciding means. CONSTITUTION:An area and a number are set and stored in a detection area specifying memory 14 and a detection area number memory 16 respectively and when a reset signal (c) is reset, a 1st scanning is performed. A comparison part 5 discriminates whether or not a detection signal (e) is detected by said scanning, a detection position comparator 15 discriminates which detection area range input coordinates corresponding to the signal (e) are in when the signal (e) is detected, and when the coordinates are in the range of some detection area of the memory 14, the corresponding area number is outputted from the memory 16 with a signal (e). When the comparison part 5 does not detect the signal (e), when the comparator 15 decides that the input coordinates corresponding to the signal (e) are within none of the detection areas, or when an error code is detected, a counter circuit 1 is reset with signals (r) and (j) and made to restart counting, thereby repeating the scanning.

Description

Detailed Description of the Invention (Field of Industrial Application) The present invention provides an optical coordinate system that outputs a corresponding detection area number when input coordinates by a coordinate input operation are within a predetermined detection area. This invention relates to a detection device.

(Prior Art) In general, an optical coordinate detection device includes a plurality of pairs of light sources and corresponding light receiving elements, and scans by sequentially driving the light sources in accordance with a counter value output from a counter circuit.
When the optical path is blocked by the coordinate input operation and the corresponding light receiving element cannot receive light, a detection signal is output, and a counter value corresponding to this detection signal is detected as the input coordinate. In addition,
A device that performs coordinate detection using X-Y coordinates is
A plurality of pairs of light sources and corresponding light receiving elements are arranged in the axial direction.

In the conventional optical coordinate detection device, each time the -th scan is completed, an input coordinate or an undetected code indicating that no coordinate input has been made is output to the host computer.

Then, in the host computer, it is determined which detection area the input coordinates fall within, and a menu operation corresponding to the detection area is executed.

(Problems to be Solved by the Invention) Generally, the detection area in which a menu operation is executed is not set at all the input coordinates of the detection device, but only partially.

Therefore, if the input coordinates detected in - scans are output to the host computer and it is determined that these input coordinates are not within the set detection area, the host computer will waste time performing this determination process. It is said that it was used in Furthermore, in order for the host computer to determine which detection area the input coordinates fall within, a large amount of time is required for the host computer to process the determination.

As described above, the conventional optical coordinate detection device places a heavy burden on the host computer and occupies a large amount of time. As a result, there is a problem in that the time available for the host computer to be used for other purposes is reduced, resulting in poor usage efficiency of the host computer.

An object of the present invention is to solve the problems of the conventional optical coordinate detection device described above. An object of the present invention is to provide an optical coordinate detection device that outputs an area number.

(Means for Solving the Problems) In order to achieve the above object, the optical coordinate detection device of the present invention includes a plurality of pairs of light sources and light receiving elements corresponding thereto, and a counter output from a counter circuit. The light source is sequentially driven and scanned according to the value, and when the optical path is blocked by the coordinate input operation and the corresponding light receiving element cannot receive light, a detection signal is output and the input coordinates corresponding to the counter value are output. In the type coordinate detection device, a detection area setting means for setting a plurality of detection areas, a detection area number setting means for setting a detection area number corresponding to the detection area, and a detection area number setting means for setting a detection area number corresponding to the detection area; detection position determination means for determining whether the input coordinates are within the range of the detection area, and configured to output a corresponding detection area number from the detection area number setting means when input coordinates within the range of the detection area are detected. has been done.

(Operation) When a detection signal is detected, it is determined which detection area the input coordinates fall within, and the corresponding detection area number is output. If the detected input coordinates are not within the range of any detection area, nothing is output.

(Example) Hereinafter, an example of the present invention will be described with reference to FIGS. 1 to 3. FIG. 1 is a block circuit diagram of an embodiment of the optical coordinate detection device of the present invention, FIG. 2 is a block circuit diagram of the comparing section of FIG. 1, and FIG. It is a flowchart explaining the dedication.

First, the overall structure will be explained with reference to FIG. In FIG. 1, a clock signal a is applied from a host computer to a counter circuit 1, and a counter value of this counter circuit 1 is applied to a switch 2, a pulse generator 3, a coordinate detector 4, and a comparator 5. Further, a reset signal C is applied from the host computer to the counter circuit 1, the comparator 5, the detection start coordinate memory 6, and the continuous counter circuit 7.

Then, the drive signal d from the pulse generator 3 is transmitted to the coordinate detection section 4.
The detection signal e is sent to the comparator 5 via the amplifier circuit 8.
given to. Further, the counter value of the counter circuit 1 is applied to the detection start coordinate memory 6 via the switch 2, and the counter value f stored in the detection start coordinate memory 6 is applied to the adder 9. Further, the counter value g of the continuous counter circuit 7 is provided to the adder 9 via a 1/2 divider 18. The calculated value of the adder 9 is applied to the detected coordinate memory 11 via the switch 10, where it is converted into a code and stored. Also, the error code memory 12
The error code is then given to the detected coordinate memory 11 via the switch 13 and stored therein. Then, the contents stored in the detection coordinate memory 11 and the contents of the detection area designation memory 14, which is a detection area setting means, are given to a detection position comparator 15, which is a detection position determination means, and from this detection position comparator 15, a signal i is given to the detection area number memory 16, which is a detection area number setting means, and the signal j is given to the counter circuit 1.
It will be done. Then, a signal k is given from the detection area number memory 16 to the output control section 17. Note that the output control signal 2 is given to the output control section 17 from the host computer,
Output data m is given to the host computer. Furthermore, the signal n from the comparator 5 is sent to the comparator 2, the signal O is sent to the continuous counter circuit 7, the signal p is sent to the switch 1'0 and the detection position comparator 15, and the signal q is sent to the switch I3 and the detection position comparator 15. 15 each. In addition, the detection area specification memory 11
A plurality of detection areas are specified and stored in advance, and detection area numbers corresponding to the detection areas are set and stored in the detection area number memory 16 in advance.

Next, the comparing section 5 will be explained with reference to FIG. In FIG. 2, a detection signal e is given to a detection presence/absence comparator 31, and if the detection signal e exists, a signal S is given to the detection start comparator 32, and if not, a signal t is given to the continuous flag memory 33. It will be done. Then, the detection start comparator 32 determines whether the detection start flag memory 34 is in the reset state or the set state, and if it is in the reset state, sets the detection start flag memory 34 and the continuous flag memory 33 in the set state, A signal n is output that increments the individual counter 35 by 1 and temporarily closes the switch 2.
In the set state, a signal U is given to the continuous detection comparator 36. The continuous detection comparator 36 to which this signal U is applied determines whether the continuous flag memory 33 is in a reset state or a set state, and if it is in a reset state, it increments the individual counter 35 by 1; For example, a signal 0 is given to the continuous counter circuit 7.

Further, the scan end counter value memory 37 stores in advance a counter value for ending one scan, and this scan end counter value V is given to the scan end comparator 38. This scan end comparator 38 is given a counter value S, and when the scan end counter value V and the counter value S match, a signal W is given to an error non-detection comparator 39. Then, the error non-detection comparator 39 supplied with the signal W determines that the counter value X of the independent counter 35 is // 0
//If the signal r is given to the counter circuit 1, and 〃1
If it is 2 or more, the signal p is added to the switch IO connected to the addition N9, the independent counter 35 and the detection position comparator 15, and if it is roughly 2 or more, the signal q is added to the switch connected to the error code memory 12. 13, a single counter 35, and a detected position comparator 15, respectively. Note that the reset signal C is applied to the detection start flag memory 34 and the independent counter 35.
given to.

The operation of such a configuration is as follows. Reset signal C
When this is released, the counter circuit 1 starts counting, and the light sources are sequentially driven in the coordinate detection section 4 to start scanning. Then, when the coordinate input operation is performed and the first detection signal e is provided from the coordinate detection section 4 to the comparison section 5, the detection presence/absence comparator 31 outputs the signal S to operate the detection start comparator 32. Here, the detection start flag memory 34 is in a reset state, the signal n is output, the detection start flag memory 34 and the continuous flag memory 33 are set, and the individual counter 35 is incremented.
1, the switch 2 is temporarily closed, and the counter value of the counter circuit 1 is stored in the detection start coordinate memory 6. When the detection signal e is continuously given to the comparator 5 in one scan, the detection start comparator 32 supplies the signal U to the continuous detection comparator 36 to operate it, since the detection start flag memory 34 is in the set state. . This continuous detection comparator 36 is
Since the continuous flag memory 33 is in the set state, the signal 0
is given to the continuous counter circuit 7. When the detection signal e is continuously applied to the comparator 5, this signal 0 is applied to the continuous counter circuit 7 and counted by the number of consecutive signals minus 1.

Here, if the detection signal e is not given to the comparator 5 in one scan, the independent counter 35 remains at 0. Further, when only one detection signal e is given, the independent counter 35 becomes 1, and the signal 0 is output from the continuous detection comparator 36.
is not output. Then, after − scans, the detection signal e
When the detection signal e is interrupted once and is given to the comparator 5 twice or more, when the first detection signal e is interrupted, the signal t is given from the detection presence/absence comparator 31 to the continuous flag memory 33 to set it in a reset state. , the next detection signal e provides an incrementing signal from the continuous detection comparator 36 to the individual counter 35, and the individual counter 35 takes on a value of 2 or more.

When the -th scan is completed and the signal W is applied to the error undetected comparator 39, one of the signals p, q, and r corresponding to the counter value of the independent counter 35 is output.

By the way, if the counter value f stored in the detection start coordinate memory 6 is A and the number of consecutive detection signals e is N, then the counter value g of the continuous counter circuit 7 is (N-1), and the calculation of the adder 9 is If the value is B, then by rounding off the decimal point, etc., the average value of the input coordinates from which the detection signal e is continuously obtained can be calculated with the accuracy of the pitch at which the light source and light receiving element are arranged. be done.

Then, when the counter value of the individual counter 35 is 1 and the signal p is output from the error undetected comparator 39, the switching device 10 is closed, and the calculated value is given to the detected coordinate memory 11 and encoded. is recorded and memorized. Further, a detection position comparator 15 determines whether this calculated value corresponds to the range of the detection area set in the detection area designation memory 14. When it is determined that the calculated value is within the range of one of the detection areas, a signal i is output and the corresponding detection area number is read out from the detection area number memory 16, and a signal k is used to read out the corresponding detection area number from the output control section 17. given to. This detection area number is read out as output data m by an output control signal 1 from the host computer. Further, when the detection position comparator 15 determines that the calculated value given from the adder 9 to the detection coordinate memory 11 is not within the range of any detection area, a signal j is output and the counter circuit 1 is reset. The count starts again and the next scan is performed.

Further, when the counter value of the individual counter 35 is 2 or more and the signal q is output from the error undetected comparator 39, the error code is transferred to the detected coordinate memory 11 by closing the switch 13.
given and memorized. Further, this error code is compared with the detection area by the detection position comparator 15, but the error code does not correspond to the detection area and the signal j is output.

Then, the next scan is performed using this signal j.

Note that the individual counter 35 is reset by the signals p and q to prepare for the next scan.

Furthermore, when the counter value of the individual counter 35 is 0 and the signal r is output from the error undetected comparator 39, the counter circuit 1 is reset by this signal r and counting is started, and the next scan is started. be exposed.

As mentioned above, the operation of the optical coordinate detection device of the present invention is as follows:
Set and store the detection area and detection area number in the detection area designation memory 14 and the detection area number memory 16 in advance (Step 3 in Figure 3), and when the reset signal C is released, perform the first scan (Step 3 in Figure 3). ■). Then, the comparator 5 determines whether or not the detection signal e is detected by this scan (step 3 in FIG. 3). If it is not detected, the counter circuit 1 is reset by the signal r and counting is started again, and the scan is started. Repeat (Step ■ in Figure 3). Moreover, when the detection signal e is detected,
The detection position comparator 15 determines whether the input coordinates corresponding to this detection signal e are within the range of any detection area.
If the detection area is within the range of any detection area, the corresponding detection area number is outputted from the detection area number memory 16 in response to the signal i (step (2) in FIG. 3), and the operation is completed. In addition, if the input coordinates corresponding to the detection signal e are not within the range of any detection area or if an error code is detected, the counter circuit 1 is reset by the signal j and counting is started again to scan (
Repeat step (■) in Figure 3.

Note that the above embodiment shows a device that detects coordinates by scanning in the -axis direction, and in order to detect coordinates in the X-Y coordinates, the block circuit surrounded by the dashed line in FIG. Two block circuits are provided, one block circuit is scanned as an X-axis coordinate detection device, and when the scanning of this one device is completed, this block circuit is made inactive, and the other block circuit is scanned as a Y-axis coordinate detection device. Just let it happen.

(Effects of the Invention) As explained above, according to the optical coordinate detection device of the present invention, scanning is repeated until a coordinate input operation is performed and input coordinates within the range of one of the detection areas are detected. When input coordinates within the detection area are detected, the detection area number corresponding to the corresponding detection area is output, so the judgment processing by the host computer is significantly reduced compared to conventional devices of this type. This has the excellent effect that the time that the host computer is occupied is significantly shortened, allowing more time to be used for other purposes.

[Brief explanation of the drawing]

FIG. 1 is a block circuit diagram of an embodiment of the optical coordinate detection device of the present invention, FIG. 2 is a block circuit diagram of the comparison section of FIG. 1, and FIG. It is a flow chart explaining. 1: Counter circuit, 4: Coordinate detection section, 5: Comparison section, 11: Detection coordinate memory, 14: Detection area specification memory, 15: Detection position comparator, 16: Detection area number memory.

Claims (1)

[Claims] A plurality of pairs of light sources and corresponding light-receiving elements are arranged, and the light sources are sequentially driven and scanned according to the counter value output from the counter circuit, and the optical path is interrupted by coordinate input operation, and the corresponding light-receiving elements are In an optical coordinate detection device that outputs a detection signal when light cannot be received and outputs input coordinates corresponding to the counter value, there is provided a detection area setting means for setting a plurality of detection areas, and a detection area number corresponding to the detection area. detection area number setting means for setting a detection area number setting means, and detection position determination means for determining in which of the detection areas the input coordinates according to the detection signal are located, and the input coordinates within the range of the detection area are An optical coordinate detection device characterized in that, when detected, the detection area number setting means outputs a corresponding detection area number.