JPS63221412A - Power control device - Google Patents

Power control device

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Publication number
JPS63221412A
JPS63221412A JP5423687A JP5423687A JPS63221412A JP S63221412 A JPS63221412 A JP S63221412A JP 5423687 A JP5423687 A JP 5423687A JP 5423687 A JP5423687 A JP 5423687A JP S63221412 A JPS63221412 A JP S63221412A
Authority
JP
Japan
Prior art keywords
control
cycle
energization
phase
power supply
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5423687A
Other languages
Japanese (ja)
Other versions
JPH0762810B2 (en
Inventor
Sadaaki Baba
貞彰 馬場
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP62054236A priority Critical patent/JPH0762810B2/en
Publication of JPS63221412A publication Critical patent/JPS63221412A/en
Publication of JPH0762810B2 publication Critical patent/JPH0762810B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

PURPOSE:To improve the control resolution by shifting successively by the specific value between the phase of a waveform of the power supply voltage and the phase set at the start of energization of a control cycle so that the time of energization is changed for a bidirectional semiconductor switch. CONSTITUTION:A cycle control device 6 selects an optional integer (n) via an input means 13 and supplies it to an m-arithmetic means 14. The means 14 decides an integer (m) from the value of the integer (n) and the time (t) of a single cycle of a power supply waveform. Both integers (m) and (n) are supplied to a control cycle arithmetic means 15 for decision of a control cycle T via an equation. Thus the phase of the waveform of the power supply voltage is successively shifted by t/n from the phase set at the start of energization of the cycle T. As a result, the time of energization of a bidirectional semiconductor switch 2 is changed in each cycle T by a zero cross trigger circuit 3 and therefore the average energization factor of n-frequency control cycles can be optionally set. Thus, the accuracy of the average energization factor and the control resolution can be improved and therefore the load is controlled with high accuracy.

Description

【発明の詳細な説明】 [産業上の利用分野] この発明は電力制御装置、特にサイクル制御方式の電力
制御装置の分解能の向上に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to improving the resolution of a power control device, particularly a cycle control type power control device.

[従来の技術] 第4図はサイクル制御方式の電力制御装置を示すブロッ
ク図であり、図において(1)は無接点スイッチ、(2
)は無接点スイッチ(1)の双方向サイリスクスイッチ
、(3)は双方向サイリスクスイッチ(2)の開閉を行
なうゼロクロストリガ回路、(4)はコンデサ、(5)
は抵抗であり、コンデンサ(4)と抵抗(5)で双方向
サイリスクスイッチ(2)のサージ吸収素子を構成して
いる。(6)はサイクル制御装置、(7)は入力装置で
あり、無接点スイッチ(1)とサイクル制御装置(6)
及び入力装置(7)で電力$ilJ御装置を構成してい
る。
[Prior Art] Fig. 4 is a block diagram showing a cycle control type power control device, in which (1) is a non-contact switch, (2) is a block diagram showing a cycle control type power control device.
) is a non-contact switch (1), a two-way thyrisk switch, (3) is a zero cross trigger circuit that opens and closes the two-way thyrisk switch (2), (4) is a capacitor, and (5)
is a resistor, and the capacitor (4) and resistor (5) constitute a surge absorption element of the bidirectional thyrisk switch (2). (6) is a cycle control device, (7) is an input device, which includes a non-contact switch (1) and a cycle control device (6).
and an input device (7) constitute a power control device.

(8)は双方向サイリスクスイッチ(2)で制御する例
えば電気炉(9)のヒータ、(lO)は電気炉(7)内
の温度を検出する温度検出器、(11)は温度調節器、
(12)は電源である。
(8) is a heater for, for example, an electric furnace (9) that is controlled by a bidirectional sirisk switch (2), (lO) is a temperature detector that detects the temperature inside the electric furnace (7), and (11) is a temperature controller. ,
(12) is a power source.

上記のように構成された電力制御装置により電気炉(9
)内の温度制御を行なう場合の動作を第5図に示したサ
イクル制御装置(6)と双方向サイリスタスイッチ(2
)との出力波形に基いて説明する。
The electric furnace (9
) The cycle control device (6) and the bidirectional thyristor switch (2) shown in Fig.
) will be explained based on the output waveform.

電気炉(9)の温度を温度検出器(10)で検出し、検
出した温度に基いて炉内温度を設定値に設定するように
制御信号を温度調節器(11)から入力装置(ア)を介
してサイクル制御装置(6)に送る。サイクル制御装置
(6)は制御信号を受けると第5図に示すように電源波
形の位相と位相が一致した一定の制御周期(T)内で所
定のオン時間(To)だけ通電し、その後オフするパル
ス信号を無接点スイッチ(1)に出力する。無接点スイ
ッチ(1)のゼロクロストリガ回路(3)はサイクル制
御装置(4)からのパルス信号を受1−すると、このパ
ルス信号と第5図の(b)に示す電源波形に対応した一
定サイクル数だけ双方向サイリスクスイッチ(2)を通
電するようにし、その後制御周期(T)内で双方向サイ
リスクスイッチ(2)を無通電・とする動作状態をくり
返してヒータ(8)の電力を制御する。第5図の(e)
は上記動作中の双方向サイリスクスイッチ(2)出力波
形を示す。
The temperature of the electric furnace (9) is detected by the temperature detector (10), and a control signal is input from the temperature controller (11) to the temperature controller (11) to input a control signal to set the furnace temperature to a set value based on the detected temperature. to the cycle control device (6). When the cycle control device (6) receives a control signal, the cycle control device (6) energizes for a predetermined on time (To) within a certain control period (T) in which the phase matches that of the power supply waveform, as shown in Fig. 5, and then turns off. outputs a pulse signal to the non-contact switch (1). When the zero cross trigger circuit (3) of the non-contact switch (1) receives a pulse signal from the cycle control device (4), it generates a constant cycle corresponding to this pulse signal and the power supply waveform shown in FIG. 5(b). The power to the heater (8) is increased by energizing the two-way thyrisk switch (2) for the number of times, and then repeating the operation state in which the two-way thylisking switch (2) is de-energized within the control period (T). Control. (e) in Figure 5
shows the output waveform of the bidirectional thyrisk switch (2) during the above operation.

[発明が解決しようとする問題点] 上記従来のサイクル制御方式の電力制御装置において制
御分解能、すなわち双方向サイリスクスイッチ(2)の
出力特性の最小変化値はゼロクロストリガ回路(3)の
ゼロクロス機能により、制御周期(T)に対する電源波
形の1周期(1)の1/2の時間の割合で定められる。
[Problems to be Solved by the Invention] In the conventional cycle control type power control device described above, the control resolution, that is, the minimum change value of the output characteristics of the bidirectional cycle control switch (2) is determined by the zero cross function of the zero cross trigger circuit (3). It is determined by the ratio of 1/2 of one period (1) of the power supply waveform to the control period (T).

したがって電源波形の位相ど位相が一致した制御周期(
T)を短くすると制御分解能が大となり、サイクル制御
における通電率の微調整ができないという問題点があっ
た。
Therefore, the phase of the power supply waveform is the control period (
When T) is shortened, the control resolution becomes large and there is a problem in that fine adjustment of the energization rate in cycle control is not possible.

この発明は、かかる問題点を解決するためになされたも
のであり、制御分解能の向上を図ることができるサイク
ル制御方式の電力制御装置を提案することを目的とする
ものである。
The present invention was made to solve these problems, and an object of the present invention is to propose a cycle control type power control device that can improve control resolution.

[問題点を解決するための手段] この発明に係る電力制御装置は、任意の整数(n)と、
この整数(n)と入力される制御信号で算出した整数(
1)及び電源電圧波形の1周期の時間(1)より、サイ
クル制御の制御周期(T)をT−mt+− で定めて、ゼロクロストリガ機能付の双方向半導体スイ
ッチの動作を制御することを特徴とする。
[Means for solving the problem] The power control device according to the present invention has an arbitrary integer (n),
The integer (n) calculated from this integer (n) and the input control signal
1) and the time of one cycle of the power supply voltage waveform (1), the control period (T) of cycle control is determined as T-mt+-, and the operation of the bidirectional semiconductor switch with zero cross trigger function is controlled. shall be.

[作用] この発明においては、電源電圧波形の位相と制御周期(
T)の通電開始時位相を順次t/nだけずらすことによ
り、ゼロクロス機能によって各制御周期(T)における
双方向半導体スイッチの通電時間を変化させ、電源電圧
波形の位相と制御周期(T)の位相が一致するn回の制
御周期の平均制御分解能を向上させる。
[Operation] In this invention, the phase of the power supply voltage waveform and the control period (
By sequentially shifting the phase at the start of energization of T) by t/n, the energization time of the bidirectional semiconductor switch in each control period (T) is changed by the zero cross function, and the phase of the power supply voltage waveform and the control period (T) are changed. The average control resolution of n control cycles in which the phases match is improved.

[実施例] 第1図はこの発明の一実施例を示すブロック図であり、
図において(1)〜(5) 、  (7)〜(12)は
上記第4図に示した従来例と全く同じものである。
[Embodiment] FIG. 1 is a block diagram showing an embodiment of the present invention.
In the figure, (1) to (5) and (7) to (12) are exactly the same as the conventional example shown in FIG. 4 above.

(6)はサイクル制御装置であり、サイクル制御装置(
6)は任意の整数(n)を選択する入力手段(13)と
、任意の整数(m)を算出するm演算手段(14)及び
制御周期演算手段(15)とを備え、電源波形の1周期
の時間(1)によりサイクル制御の制御周期(T)を次
式 %式% で算出し、無接点スイッチ<1)のゼロクロストリガ回
路(3)に送る。
(6) is a cycle control device, and the cycle control device (
6) is equipped with an input means (13) for selecting an arbitrary integer (n), an m calculation means (14) for calculating an arbitrary integer (m), and a control period calculation means (15). The control period (T) of the cycle control is calculated from the period time (1) using the following formula (%) and sent to the zero cross trigger circuit (3) of the non-contact switch <1).

第2図は上記のように構成したサイクル制御装置(6)
のm演算手段(14)の構成を示すブロック図であり、
(2])は入力装置(7)から送られる制御信号により
制御周期(T)内のオン時間(To)を設定するオン時
間設定手段、(22)は同じく人力装置(7)からの制
御信号により双方向サイリスクスイッチ(2)の通電率
(η)を設定する通電率設定手段、(23)は各制御周
期(T)内で双方向サイリスクスイッチ(2)が通電す
る波数(kl)を決定する通電波数決定手段、(24)
はn回の制御周期(nT)間に双方向サイリスクスイッ
チ(2)が通電する全波数k 麿   Σ k 。
Figure 2 shows the cycle control device (6) configured as above.
It is a block diagram showing the configuration of the m calculation means (14) of
(2)) is an on-time setting means for setting an on-time (To) within a control period (T) by a control signal sent from an input device (7), and (22) is also a control signal from a human-powered device (7). The energization rate setting means sets the energization rate (η) of the bidirectional thyrisk switch (2) by , and (23) is the wave number (kl) at which the bidirectional thyrisk switch (2) conducts electricity within each control period (T). (24) energizing wave number determining means for determining
is the total number of waves k during which the bidirectional si-risk switch (2) is energized during n control cycles (nT).

を算出する全通電波数決定手段、(25)は整数(m)
を決定するm決定手段である。
Total conduction wave number determining means for calculating, (25) is an integer (m)
This is m determining means for determining.

次に、上記のように構成した電力制御装置の動作を説明
する。入力手段(13)で任意の整数n)を選択しmt
i算手段(14)に入力する。m演算手段(14)の通
電波数決定手段はまず選択された整数(n)の値と式t
/nから電源電圧波形の位相と制御周期(T)の通電開
始時の位相が一致する制御周期(T)の回数nを定める
。次に各制御周期(T)内で双方向サイリスクスイッチ
(2)が出力する出力波形の波数(ki)を決定する。
Next, the operation of the power control device configured as described above will be explained. Select an arbitrary integer n) using the input means (13) and mt
It is input to the i calculation means (14). The energizing wave number determining means of the m calculating means (14) first calculates the value of the selected integer (n) and the formula t.
/n determines the number n of control cycles (T) in which the phase of the power supply voltage waveform and the phase at the start of energization of the control cycle (T) match. Next, the wave number (ki) of the output waveform output by the bidirectional thyrisk switch (2) within each control period (T) is determined.

この出力波形の波数(kl)は次のようにして決定され
る。電源電圧波形の位相と制御周期(T)の通電開始時
の位相が一致しているときの双方向サイリスクスイッチ
(2)出力波形の波数をk 、波長をλとすると、この
位相が一致しているときから第2回目の制御周期におい
ては、通電開始時の位相は電源電圧波形の位相からλ/
nだけずれる。
The wave number (kl) of this output waveform is determined as follows. When the phase of the power supply voltage waveform and the phase at the start of energization of the control period (T) match, if the wave number of the output waveform of the bidirectional thyrisk switch (2) is k and the wavelength is λ, then the phases match. In the second control cycle, the phase at the start of energization is λ/
It shifts by n.

この位相のずれとゼロクロストリガ回路(3)のゼロク
ロス機能により双方向サイリスクスイッチ(2)の出力
波形の波数(k2)が代る。同様に第i回目の制御周期
の通電開始時の位相は(1−1)λ/nだけ電源電圧波
形の位相とずれる。
The wave number (k2) of the output waveform of the bidirectional thyrisk switch (2) changes due to this phase shift and the zero cross function of the zero cross trigger circuit (3). Similarly, the phase at the start of energization in the i-th control cycle deviates from the phase of the power supply voltage waveform by (1-1)λ/n.

この位相のずれが のときは第1回目の制御周期における波数(kl)はk
 i ”” k iとなり、 n          2 のときの第i回目の制御周期における波数(kl)はに
、−に、−1/2となる。この結果、各制御局期におけ
る双方向サイリスクスイッチ(2)が出力する出力波形
の波数(kl)が決定される。
When this phase shift is , the wave number (kl) in the first control cycle is k
i "" k i , and the wave number (kl) in the i-th control cycle when n 2 is -, -1/2. As a result, the wave number (kl) of the output waveform output by the bidirectional thyrisk switch (2) in each control station period is determined.

この決定した各制御周期(T)における波数(kl)を
全通電波数決定手段(24)に送ると共に入力手段(1
3)から送られた制御信号によりオン時間設定手段(2
1)で設定した制御周期(T)内のオン時間(T。)を
全通電波数決定手段(24)を送り、このオン時間(T
  )から波数(kl)を決定し、n回の制御周期(n
T)間に双方向サイリスクスイッチ(2)が出力する全
波数(k)を算出する。この算出した全波数(k)と入
力手段(13)で選択した整数(n)及び通電率設定手
段(22)で制御信号により設定した通電率(η)をm
決定手段(25)に入力し整数(m)を決定する。すな
わちn回の制御周期(nT)間の通電率(η)はT −
m t + t / nすなわちnTm(mn+1)t
と全波数(k)から次式で得られる。
This determined wave number (kl) in each control period (T) is sent to the total energization wave number determining means (24), and the input means (1
The on-time setting means (2) is controlled by the control signal sent from the on-time setting means (2).
The on time (T.) within the control period (T) set in step 1) is sent to the total energization wave number determining means (24), and this on time (T.
), and determine the wave number (kl) from n control periods (n
Calculate the total number of waves (k) output by the bidirectional thyrisk switch (2) during T). m
It is input to the determining means (25) to determine an integer (m). In other words, the energization rate (η) during n control cycles (nT) is T −
m t + t / n or nTm(mn+1)t
and the total wave number (k) using the following equation.

したがって、この式から整数(m)を決定することがて
きる。
Therefore, the integer (m) can be determined from this formula.

この決定した整数(m)と入力手段り13)で選択した
整数(n)を制御周期演算手段(15)に入カル、式T
 −m t + t / nにより制御周期(T)を決
定する。
The determined integer (m) and the integer (n) selected by the input means 13) are entered into the control period calculation means (15), and the formula T
-m t + t / n determines the control period (T).

第3図は、」1記実施例により具体的に通電率(η)を
設定1、て制御周期(T)を決定したときのザイクル制
御装置(6)の出力波形(a)と電源電圧波形(b)及
び双方向サイリスクスイッチ(2〉の出力波形(c)を
示す。
FIG. 3 shows the output waveform (a) of the cycle control device (6) and the power supply voltage waveform when the energization rate (η) is specifically set 1 and the control period (T) is determined according to the embodiment described in 1. (b) and the output waveform (c) of the bidirectional thyrisk switch (2>) are shown.

いま、例えば通電率(η)を41%とし、制御周期(T
)のオン時間〈To)を電源電圧波形(b)の1周期の
時間(1)に大して(1+3/4)tとし、整数(n)
をn−4とすると、電源電圧波形の位相と制御周期(T
)のオン時間(To)開始時の位相が一致17ていると
きの制御周期(T)における双方向サイリスタスイッチ
(2)の出力波数(k  )はに、−2となる。−力制
御周期(T)は(m t + t / n )で設定さ
れるため第2回目から第4回目までの制御周期(T)の
オン時間開始時の位相は順次λ/4たけずれるため、出
力波数(k、)は第3図(C)に】 示すように順次り、5,2.1.5となる。したがって
第1回から第4回までの制御周期(4T)における双方
向サイリスクスイッチ(2)の全出力波数(k)はに=
7となり、この全出力波数(k)、整数(n)及び通電
率(η)の値から整数(1)はmm4と得られる。この
結果、制御周期(T)は第3図の(a)に示すようにT
−4t+t/4として得られる。
For example, let us assume that the energization rate (η) is 41% and the control period (T
) is the on-time (To) of one cycle of the power supply voltage waveform (b), which is greater than (1+3/4)t, and is an integer (n).
is n-4, the phase of the power supply voltage waveform and the control period (T
), the output wave number (k) of the bidirectional thyristor switch (2) in the control period (T) when the phases at the start of the on-time (To) match 17 is -2. - Since the force control period (T) is set as (m t + t / n), the phase at the start of the on time of the second to fourth control periods (T) is sequentially shifted by λ/4. , the output wave number (k,) is sequentially 5, 2, 1, and 5 as shown in FIG. 3 (C). Therefore, the total output wave number (k) of the bidirectional thyrisk switch (2) in the first to fourth control cycles (4T) is =
7, and the integer (1) is obtained as mm4 from the values of the total output wave number (k), the integer (n), and the energization rate (η). As a result, the control period (T) becomes T as shown in Fig. 3(a).
-4t+t/4.

この場合、第3図に示すように第1回目の制御周期(T
)においては通電率(η)は 2t η − 4t + □ から47%となる。しかし、電源電圧波形(b)と制御
周期(T)の位相のずれにより4回の制御周期における
平均通電率は41%となり制御分解能の向上を図ること
ができる。
In this case, the first control cycle (T
), the current conductivity (η) becomes 47% from 2t η − 4t + □. However, due to the phase shift between the power supply voltage waveform (b) and the control cycle (T), the average energization rate in the four control cycles becomes 41%, making it possible to improve the control resolution.

[発明の効果] この発明は以上説明したように、電源電圧波形の位相と
制御周期(T)の通電開始時の位相を順次t/nだけず
らすことにより、ゼロクロス機能によって各制御周期(
T)における双方向半導体スイッチの通電時間を変化さ
せ、n回の制御周期の平均通電率を任意に設定できるよ
うにしたから、平均通電率精度向上すなわち制御分解能
の向上を図ることができ、高精度に負荷を制御すること
ができる効果を有する。
[Effects of the Invention] As explained above, the present invention sequentially shifts the phase of the power supply voltage waveform and the phase at the start of energization of the control period (T) by t/n, thereby adjusting each control period (T) using the zero cross function.
By changing the energization time of the bidirectional semiconductor switch at T), the average energization rate for n control cycles can be arbitrarily set, so it is possible to improve the accuracy of the average energization rate, that is, to improve the control resolution. It has the effect of being able to control the load with precision.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明の実施例を示すブロック図、第2図は
上記実施例のサイクル制御装置を示すブロック図、第3
図は上記実施例の出力波形図、第4図は従来例を示すブ
ロック図、第5図は上記従来例の出力波形図である。 (1)・・・無接点スイッチ、(2)・・・双方向サイ
リスクスイッチ、(3)・・・ゼロクロストリガ回路、
(6)・・・サイクル制御回路、(7)・・・入力装置
、(11)・・・温度調節器、(13〉・・・入力手段
、(14)・・・m演算手段、(15)・・・制御周期
演算手段。 なお、各図中同一符号は同−又は相当部分を示す。
FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a block diagram showing a cycle control device of the above embodiment, and FIG.
4 is a block diagram showing the conventional example, and FIG. 5 is an output waveform diagram of the conventional example. (1)... Non-contact switch, (2)... Bidirectional thyrisk switch, (3)... Zero cross trigger circuit,
(6)... Cycle control circuit, (7)... Input device, (11)... Temperature controller, (13>... Input means, (14)... m calculation means, (15 )...Control cycle calculation means. In each figure, the same reference numerals indicate the same or corresponding parts.

Claims (1)

【特許請求の範囲】 負荷に流れる電流を開閉するゼロクロストリガ機能付の
双方向半導体スイッチを有し、該双方向半導体スイッチ
のオンオフ時間比を制御信号により一定の制御周期内で
変えて負荷電力を調整するサイクル制御方式の電力制御
装置において、電源波形の1周期の時間をtとすると、
上記制御周期(T)を T=mt+t/n 但しnは任意の整数、mはnと入力される制御信号で定
まる整数、 とすることを特徴とする電力制御装置。
[Claims] It has a bidirectional semiconductor switch with a zero cross trigger function that opens and closes the current flowing to the load, and the load power is controlled by changing the on/off time ratio of the bidirectional semiconductor switch within a certain control period using a control signal. In a cycle control type power control device to be adjusted, if the time of one cycle of the power supply waveform is t, then
A power control device characterized in that the control period (T) is T=mt+t/n, where n is an arbitrary integer, and m is an integer determined by n and an input control signal.
JP62054236A 1987-03-11 1987-03-11 Power control device Expired - Fee Related JPH0762810B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62054236A JPH0762810B2 (en) 1987-03-11 1987-03-11 Power control device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62054236A JPH0762810B2 (en) 1987-03-11 1987-03-11 Power control device

Publications (2)

Publication Number Publication Date
JPS63221412A true JPS63221412A (en) 1988-09-14
JPH0762810B2 JPH0762810B2 (en) 1995-07-05

Family

ID=12964905

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62054236A Expired - Fee Related JPH0762810B2 (en) 1987-03-11 1987-03-11 Power control device

Country Status (1)

Country Link
JP (1) JPH0762810B2 (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5028832U (en) * 1973-07-07 1975-04-02

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5028832U (en) * 1973-07-07 1975-04-02

Also Published As

Publication number Publication date
JPH0762810B2 (en) 1995-07-05

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