JPS63219050A - Data processing system - Google Patents

Abstract

PURPOSE:To connect an expanded bus without decreasing the transfer capacity of a basic bus by outputting an instruction to the expanded bus in the case that the channel number of the instruction from a central processing unit (CPU) to a peripheral control device and a group channel number coincide to each other. CONSTITUTION:A bus relaying device 100 is connected to the CPU through the basic bus 101, and connected to the peripheral control device through the expanded bus 102. A group channel number register 113 holds the group channel number of a peripheral control device group. The channel number of the instruction from the CPU and the contents of the register 113 are compared by a channel number comparison circuit 112. When they coincide, a transfer control circuit 116 is informed of it, and a basic bus interface control circuit 111 is controlled so as to receive the instruction from the central processing unit and to release the basic bus 101. The fetched instruction is outputted to the expanded bus 102 through an expanded bus interface control circuit 115.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a data processing system including a bus relay device that logically extends a common input/output bus.

Conventionally, in this type of data processing system, the channel numbers of the peripheral devices connected to the expansion bus were not known, and as shown in the figure, the central processing unit on the basic bus 414tl When θl sends command information to the peripheral control device lI3/ on the expansion bus TAXCO, the basic bus l
The command information output to I41F/ is sent to the bus relay device Dacol.
and 12 buses to the expansion buses II and 4I. The peripheral control device ii 143/ compares the channel number of the command information with the channel number of its own device, and if they match, it outputs an affirmative response indicating that the command information has been received to the expansion bus adapter. The bus relay device l12/ transmits the acknowledgment on the expansion bus lI to the central processing bag f'40/ on the basic bus 41/. The bus transfer for command transmission on the basic bus 41/ has an acknowledgment from the central processing unit a.
It is completed when it is transmitted to oi, and until then the basic bus da4
/ is occupied by the central processing unit θl.

The Maoka point that the invention aims to solve is that in data processing using the conventional bus relay device described above, the central processing unit on the basic bus transmits commands to the peripheral control devices on the expansion bus via the bus relay device. When doing,
Since the basic bus is occupied until the acknowledgment from the peripheral control device on the expansion bus is transmitted to the basic bus, adding an expansion bus worsens the usage efficiency of the basic bus and reduces the transfer performance of the basic bus. There was a drawback to that.

The present invention has been made in order to eliminate the above-mentioned drawbacks inherent in the conventional technology, and an object of the present invention is to make it possible to connect an expansion bus without reducing the transfer capacity of the basic bus. The objective is to provide a new data processing system.

Means for Solving the Problems In order to achieve the above object, the data processing system according to the present invention provides a central processing unit, a storage device, a peripheral control device, a common input/output bus, a bus relay device, and a bus relay device. The bus relay device includes means for holding group channel numbers of a group of peripheral control devices under the expansion bus, and means for holding group channel numbers of commands from the central processing unit to the peripheral control devices and the group channel numbers. means for comparing the channel numbers, response means for returning an affirmative response from the bus relay device to the central processing unit when the channel numbers match by the comparison means, means for outputting the command to the expansion bus, and means for outputting the command to the expansion bus; and means for notifying the central processing unit when the peripheral control unit cannot receive the command.

EXAMPLE The present invention will be specifically explained below with reference to the drawings with reference to a preferred embodiment thereof.

FIG. 1 is a block configuration diagram showing an embodiment of a bus relay device used in a data processing system according to the present invention.
FIG. 2 is a block diagram showing an embodiment of the data processing system according to the present invention.

First, a data processing system to which the present invention is applied will be described with reference to FIG.
and peripheral control devices koj/-kojn.

The bus relay device lOO relays between the basic bus toi and 10 expansion buses, and peripheral control device groups 23/-23n are connected to the 10 expansion buses. bus relay device lo
o' relays between the basic bus 10/ and the expansion bus 10', and peripheral control device groups ui to tIn are connected to the expansion bus 102'.

Peripheral control devices #23) - 3n and 4En each have a t-bit channel number, and the channel number is composed of the group channel number of the upper bit and the lower μ as shown in Figure S. The device is divided into bits and channel number. Peripheral control devices connected to the same expansion bus have the same group channel number. Therefore, the bus relay device 100 or 100' is
By checking the group channel number of the command from I to the peripheral control device, it can be determined whether the command is directed to the peripheral control device connected to the expansion bus provided by the bus relay device.

FIG. 1 is a block diagram showing an embodiment of a bus relay device according to the present invention.

Next, the main part of the present invention will be explained with reference to FIG. 1. The bus relay collection Htoo or lOg is connected to the central processing bag t2// of the data processing system via the basic bus 10/. . It is also connected to peripheral control devices via an expansion bus io- or lO'.

Group channel number register //, I is expansion bus 10
It holds the group channel number of the peripheral control device group connected to 2. The upper kebit of the channel number of the command from the central processing unit 2// on the basic bus 10/ is checked by the address (channel number) comparing circuit // with the contents of the group channel register l/3, and a match is found. If so, the transfer control circuit //A will notify you. The transfer control circuit//l is the basic bus control circuit//l.
/, receives commands from the central processing unit -//, and outputs an affirmative response to the central processing unit -//.

The bus transfer operation on the basic bus 10/ is performed by the bus relay device 100.
An acknowledgment from to central processor =7/ completes, and central processor =7/ releases elementary bus 101. The command information taken in via the basic bus interface control circuit /// is stored in the buffer //II, and is output to the expansion bus 102 via the expansion bus interface control circuit //jt. When the peripheral control devices 231 to 3n having the corresponding channel number on the expansion bus 10 receive the command, the command is output to the bus relay device 100, and the bus transfer on the expansion bus 102 is completed.

If the peripheral control device cannot accept the command, a negative response is output to the bus relay device ioo. The expansion bus interface control circuit //j of the bus relay device lOθ notifies the transfer control circuit //A that the peripheral control device has responded negatively to the command. The transfer control circuit//A informs the central processing unit//l that the peripheral control devices on the 10 expansion buses have not accepted the command.
In order to notify the buffer 7/7 of the negative response, information indicating that it is a negative response is stored in the buffer //7, and the buffer 7/7 is sent to the basic bus ioi via the basic bus interface control circuit ///.
7 and notifies the central processing unit ko/l that the peripheral control device did not accept the command.

FIG. 3 shows the state of bus transfer.

When a command is transferred from the central processing unit 2// to the peripheral control device 3/, the bus transfer on the basic bus 10/ ends when the command is accepted by the bus relay device 100,
The basic bus lθ/ is released. After that, bus relay device 1
A command is transferred from 00 to the peripheral control device 237 via the expansion bus IO-.

DETAILED DESCRIPTION OF THE INVENTION As described in detail, the data processing system of the present invention includes means for holding group channel numbers of a group of peripheral control devices under an expansion bus, and channel numbers for commands from a central processing unit to peripheral control devices. and means for comparing the group channel number with the group channel number; response means for returning an affirmative response from the bus relay device to the central processing unit when the channel numbers match by the comparison means; and outputting the command to the expansion bus. By having a bus relay device having means and means for notifying the central processing unit when a peripheral control device having a corresponding channel number on the expansion bus responds negatively to the command, the basic bus An expansion bus can be connected without reducing transfer capacity.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of a bus connection device that is a component of a data processing system according to the present invention, FIG. 2 is a block diagram showing an example of the configuration of a data processing system according to the present invention, and FIG. The figure is a block diagram showing an example of the operation of the data processing system of the present invention, and the SIT diagram is a block diagram showing an example of the operation of the conventional data processing system. Figure @j is a diagram showing an example of the structure of channel numbers. too, 10o'...Bus relay device, 101...Basic bus, 101, /θko'...Expansion lotus, //l...
・Basic bus interface control circuit, //co...channel number comparison circuit, //J...group channel number register, //lI...buffer, iis...
Expansion bus interface control circuit, //A...transfer control circuit, //ri...buffer, controller ii...central processing unit, controller...storage device, 231-3n, kodarl
~Co44n, CoS7~Co3n... Peripheral control device, u
O/...Central processing unit % Da2/, Dakoyu...Bus relay device, Il, 3/, 113...Peripheral control device, 41/...Basic bus, Dadako, Hiro 13... Expansion Bus Patent Applicant NEC Corporation Agent Patent Attorney Yutabe Kumagai 6132 Figure 3 I'(51?<1

Claims (1)

[Claims] A central processing unit, a storage device, and a peripheral control device are connected to each other by a common input/output bus, and the common input/output bus can be logically extended to provide an expansion bus equivalent to the common input/output bus. A data processing system including one or more bus relay devices, wherein the bus relay device has means for retaining group channel numbers of a group of peripheral control devices under the expansion bus, and a means for retaining group channel numbers of a group of peripheral control devices under the expansion bus, and a means for retaining group channel numbers of a group of peripheral control devices under the expansion bus, and means for comparing the channel number of the command with the group channel number; response means for returning an affirmative response from the bus relay device to the central processing unit when the channel numbers match by the comparison means; A bus relay device configured as described above, comprising means for outputting to an expansion bus, and means for notifying a central processing unit when a peripheral control device of the expansion bus cannot receive the command. A data processing system characterized by being able to connect an expansion bus without reducing the transfer capacity of the basic bus.