JPS63215915A - Resolver-digital converter - Google Patents

Abstract

PURPOSE:To enable the following of a resolver signal rotating at a high speed, by a method wherein an output value of a phase detector is converted into digital from analog and added to a digital value to vary digital values at a time. CONSTITUTION:This converter is made up of an A/D converter 6 to convert an output voltage (j) of a phase detector 5 into digital from analog and a register 8 to hold an added value 7 of the output (k) and a digital value (f) and the digital value (f) itself. The output voltage (j) is converted 6 into a digital signal (k) which indicates difference between an angle of a resolver oscillator and the digital signal (f). The output value (k) of the converter 6 and the digital value (f) are added 7 to calculate a new digital value (l) and the updating of the digital value (f) is performed by an external clock. By repeating the above- mentioned operation, the digital value (f) is varied to convert the resolver signal into a digital value until an angle of the resolver signal equals an angle of a digital signal of a reversible counter.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a tracking type resolver digital (
This is related to the conversion (hereinafter referred to as 几/D).

[Conventional technology]

FIG. 2 is a configuration diagram showing a conventional tracking type R/D conversion device. In Fig. 2, (1) is a quadrant selection circuit that switches and outputs the polarity of the resolver signal depending on the angular quadrant of the resolver signal, (21U quadrant selection circuit (1)).
Enter the s output.

A cosine multiplier that performs cosine multiplication, (3) is a quadrant selection circuit (
1) A sine multiplier that inputs the lock output and performs sine multiplication;
(4) is a subtracter that subtracts two signals and finds the difference between them. (5) is a phase detector that detects the output signal of subtracter (4) using a carrier wave. (9) is a phase detector that detects the output signal of subtracter (4) using a carrier wave. αG, a voltage controlled oscillator that outputs a clock signal according to the output signal
is a reversible counter that rises or falls depending on the clock number 100 which is the output of the voltage controlled oscillator (9) and the output number 100 of the phase detector (5).

The conventional tracking type L/D converter is configured as shown in FIG. (to) 180 degree and 90 degree weight signals (
) and (e) are output to the signal selected from the second quadrant.

Here, the angle of the resolver oscillator is 0. What is the maximum amplitude of the resolver signal?If the reference signal (c) is 1iHvt, the output signals of the quadrant selection circuit (1)) and (e) are K +
sin wt・sim#, Kmsi*wt-anti
become. Next, the signal () is multiplied by cosine in a cosine multiplier (2), and its output ())t-! +U reverse cow/ri αG
If the angle of the digital signal is φ, then ()) = K・s
in wt-sia (/・φSφ. Also signal (to)
is multiplied by sine in the sine multiplier (3), and its output (g) is (fi = K-simwt - cos tl
−sinφ. The above signal (g).

(a) is subtracted by the next subtractor (4). The output of this subtractor (4) (1 power is (1 month = (g) - esu = K-siIlwt -5
iaθ −LDsφ−,, 1IIWl ・Sono#'l
uφ=ni-sihowt(si161-assφ--tXIs
θ ・Si−φ) From the trigonometry theorem, (su)=K−siawt −5ii(11−φ).

Next, the signal (su) is detected by the phase detector (5) using the reference signal e1. This detection signal) is -5ia (#-φ
) is detected. This detected signal is input to a voltage controlled oscillator (9), and a clock signal ψ proportional to its magnitude is output. This clock signal (b) and the output of the phase detector (5) are input to the reversible counter a, and the reversible counter a increases or decreases. The voltage controlled oscillator (9) uses a reversible counter 0 until the voltage of the output of the phase detector (5) reaches 0, that is, 5il(0-φ)=0.
Operate 1. As a result, 0=φ, and the same digital value as the angle of the resolver oscillator is obtained.

This digital value becomes the output of the L/D converter.

[Problem that the invention seeks to solve]

In the conventional R/D i wedge device as described above, the voltage side (
The reversible counter changes the digital value one by one from the output C2 of the +11 oscillator.

l For this reason, a problem arose in that it was not possible to follow the resolver signal that rotated at high speed.

The present invention was made to solve this problem, and an object of the present invention is to change the digital value using the output signal of the 0-phase detector to follow the resolver signal which rotates at a higher speed than the conventional device.

[Means for addressing problems]

The R/D converter according to the present invention converts the output voltage of a phase detector into analog-to-digital conversion and adds it to a digital value, thereby changing the digital value by a plurality of values at once.

[For production]

In this invention, the digital value is changed by a value corresponding to the error (θ-φ).

〔Example〕

Figure 1 is a diagram showing one embodiment of this invention.
) to (5) are completely the same as the conventional apparatus described above.

(6) is an analog-to-digital converter that converts the output of the phase detector (5) from an analog signal to a digital signal;
(7) is an adder that adds the output of the analog-to-digital converter and the digital value, and (8) is the register that holds the digital value.

In the D/D converter 2 configured as described above, a phase detector (5
) is exactly the same as the conventional device. The output voltage of the phase detector (5) is converted into a digital signal by the analog/digital converter (6). This digital signal (e) corresponds to the difference between the angle U of the resolver excavator and the digital value (e). The output of the analog-to-digital converter (6) and the digital value (Q) are added by the adder (7) to obtain a new digital value (Q), and the new digital value (Q) is updated by the external clock (7). be done. By repeating the above operation, the digital value (to) changes until 0=φC2, and can be converted into a digital value as a resolver signal.

〔Effect of the invention〕

As explained above, in this invention, the digital value is changed by a value corresponding to the output voltage of the phase detector (5), and a high tracking speed of the L/D converter can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing an embodiment of the present invention, and FIG. 2 is a diagram showing a conventional L/D conversion device. In the figure, tt+rc quadrant selection circuit, (2) μ string multiplier, (3) sine multiplier, (4) subtracter 4, (5
) is a phase detector, and (6) is an analog-to-digital converter. (7) is an adder, (8) is a register, (9) is a voltage controlled oscillator, and (11 is calculated by a 9-inverse counter. In each figure, the same reference numerals indicate the same or half-phase parts.

Claims (1)

[Claims] In the tracking type resolver/digital conversion device comprising a quadrant selection circuit, a cosine multiplier, a sine multiplier, a subtracter, a phase detector, an analog-to-digital converter, an adder, and a register, the quadrant selection circuit Input a two-phase resolver signal to the two inputs of the
a quadrant selection circuit that outputs two signals, a sine wave signal of one of the two output signals of the quadrant selection circuit is input to a first input terminal, and a digital signal of the register is input to a second input terminal. A cosine multiplier that multiplies a sine wave signal by the value of the cosine of the angle of a digital signal; A sine multiplier that inputs the digital signal of the register to an input terminal and multiplies the cosine wave signal by the sine value of the angle of the digital signal; a subtracter that inputs the output of a sine multiplier to an input terminal and subtracts two signals; a subtracter that inputs the output of the subtracter to a first input terminal, inputs a reference signal to a second input terminal; a phase detector that detects and rectifies based on a reference signal; an analog-to-digital converter that inputs the output of the phase detector to its input terminal and converts it into a digital signal; and a first input terminal that receives the output of the analog-to-digital converter. an adder that inputs the output, inputs the digital signal of the register to a second input terminal, and adds them together, inputs a clock to the first input terminal, and inputs the output of the adder to the second input terminal. and a register for temporarily holding the signal applied to the second input terminal with the signal applied to the first input terminal.