JPS63208145A - Ic card - Google Patents

Abstract

PURPOSE:To improve the security of an IC card by storing data whose confidentiality is high, such as an identification number, etc., in a memory in a CPU chip, and storing data whose confidentiality is low, in a memory chip. CONSTITUTION:A microprocessor 15 sets a signal of a control line to '1', only at the time of designating an area of a memory chip 3, and accesses the memory 3 through external bus lines 8a-10a. At the time of accessing other RAM 4, ROM 5a and serial interface 16 of the inside of a CPU chip 2 than said memory, each buffer 12-14 becomes OFF by setting the signal of the control line 11 to '0'. Especially, at the time of access to a confidential data area 5b, all the buffers 12-14 are set to OFF, so that data of the inside of the CPU chip 2 cannot be read from the outside.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to an IC card having a CPU chip and a memory chip, and is particularly suitable for maintaining high confidentiality of stored data and preventing card forgery and unauthorized use. Regarding IC cards.

[Conventional technology]

To prevent counterfeiting and unauthorized use of IC cards.

Conventionally, the PIN number was checked by the CPU inside the card (Patent No. 940548), or a special secret area was set up in the memory (Patent No. 1228210, Japanese Patent Laid-Open No. 61-321).
No. 92), the data stored on the IC card was kept confidential. Most conventional IC cards had a CPU and memory on one chip, but in order to increase the amount of data stored and to prevent mechanical damage to the chip, the CPU chip and memory chip are now separate and separated. (Japanese Patent Application Laid-Open No. 60-205786).

[Problem that the invention seeks to solve]

In an IC card in which a CPU chip and a memory chip are arranged separately, data in the memory chip is read out through a chip connection part such as a bonding pad of the memory chip.
There is a risk of dead copying. However, conventionally, safety and confidentiality have only been discussed based on whether or not stored data can be retrieved from the input/output terminals of the IC card itself, without considering the risk of stored data being retrieved directly from the memory chip. .

An object of the present invention is to provide an IC card that has a memory chip in addition to a CPU chip and has a high level of security in which it is difficult to read confidential data.

[Means for solving problems]

The above purpose is to provide an I
In C cards, highly confidential data such as PIN numbers are stored in the memory in the CPU chip, less confidential data is stored in the memory chip, and highly confidential data is read out via the CPU. This is achieved by doing this.

[Operation] When inputting and outputting data into the memory of the CPU chip,
This cannot be done without the intervention of the CPU.

In other words, confidential data stored in the memory of the CPU chip cannot be read even if a probe is placed on the bonding pad of the CPU chip. Therefore, an IC card cannot be used unless the PIN number matches.
Counterfeiting and unauthorized use of cards will be prevented.

〔Example〕

Hereinafter, one embodiment of the present invention will be described with reference to the drawings.

1 and 2 are a schematic configuration diagram and a detailed configuration diagram of main parts of an IC card according to an embodiment of the present invention. The IC card 1 includes a CPU chip 2 and a memory chip 3. The CPU chip 2 includes a microprocessor 15 and an RA
In addition to the M section 4 and the ROM section 5, the serial interface 1
6 and 3 buffers 12.13.14. The memory chip 3 is, for example, EEPROM (E
The memory card is electrically erasable ROM (ROM that can be electrically written/erased). C.P.
The U chip 2 and the memory chip 3 are connected by an address bus 8, a data bus 9, and a control bus 10. Address bus 8, data bus 9 and control bus 10 are connected to microprocessor 15 and RAM section 4, respectively.
external bus lines 8a, 9a, 10a, and internal bus lines 8b, 9b, 10b, which interconnect the ROM section 5 and serial interface 16;
2.13°14. Each buffer 1
2.13° 14 is controlled as will be described later by a signal on a control line 11 drawn from an internal control bus 10b. The ROM unit 5 includes a regular ROM 5a in which fixed programs and data are stored in advance, and a FROM 5b (confidential data area) into which confidential data such as a password can be written later. The IC card 1 is connected to an external card reader/writer (not shown) via an external terminal 7.

FIG. 3 is a diagram showing an address map of RAM 4°, memory 3. Serial interface 16. There are addresses indicating each of the general area 5a and confidential data area 5b of the ROM section 5.

FIG. 4 is a configuration diagram of the buffer 13. Buffer 13
transfers the signal from the external data bus 9a to the internal data bus 9
a gate 13a that passes the signal on the internal data bus 9b to the external data bus 9a, and an AND gate 13c that takes the logical product of the signal on the control line 11 and the inverted signal of the read/write (R/W) signal. and control line 11 signal and read/write (R/W)
), and each AND gate 13c.

Gates 13a and 13b are turned on/off by the output of gate 13d. In other words, the signal on the control line 11 is “
0'', both gates 13a and 13b are shut off,
When the signal on the control line 11 is LL I I+, either one of the gates 13a,
13b is made conductive.

FIG. 5 is a configuration diagram of the buffer 12 (14). The buffer 12 (14) transfers the signal of the internal address bus 8b (internal control bus 10b) to the external address bus 8a (
Gate 12 conductive to external control bus 10a)
The gate 12a is configured to shut off when the signal on the control line 11 is "0".

In the IC card 1 having such a configuration, the microprocessor 1
5 accesses the memory 3 through the external bus lines 8a, 9a, and 10a by setting the control line signal to tLII+ only when specifying an area of the memory chip 3. Other than that, C: RA inside PU chip 2
When accessing M4, ROM5a, and serial interface 16, control line 1
By setting the signal of 1 to “OI+”, each buffer 12, 13
．． 14 is off (may be in a floating state).

In particular, when accessing the confidential data area 5b, all buffers 12, 13, and 14 are turned off, and the CPU is
The data inside chip 2 is made unreadable.

As a result, even if a probe is placed on the bonding pad of the CPU chip 2, it is impossible to input/output data in the memory in the CPU chip 2, especially in the confidential data area 5b, unless the password is known.

Note that the buffers 12, 13, and 14 may be set to turn off whenever an address area in the CPU chip 2 is specified, but they may be set to turn off only when only the confidential data area 5b is accessed. It's okay. Also, all buffers 12, 13, and 14 may be turned off,
Only the buffer 13 of the data bus 9 may be turned off. These are determined by how the control line signals are created.

In this embodiment, the PIN number is stored in the confidential data area, but if the encryption key is stored in the confidential data area and all data is encrypted, the data in the memory chip 3 will also become impossible to decipher. , there is no actual harm even if the data is read externally, and is effective in maintaining confidentiality.

〔Effect of the invention〕

According to the present invention, it is possible to prevent counterfeiting and unauthorized use of an IC card that includes a CPU chip and a memory chip, and is effective in improving the security of the IC card.

[Brief explanation of the drawing]

FIG. 1 is a schematic configuration diagram of an IC card according to an embodiment of the present invention, FIG. 2 is a detailed configuration diagram of main parts of the IC card shown in FIG. 1, FIG. 3 is an explanatory diagram of an address map, and FIG. 4 2 is a block diagram of the buffer of the data bus shown in FIG. 2, and FIG. 5 is a block diagram of the buffer of the address bus or control bus shown in FIG. 1... IC card, 2... CPU chip, 3... memory chip, 5... ROM section, 5a... general area, 5b... confidential data area.

Claims (2)

[Claims] 1. In IC cards equipped with a CPU chip and a memory chip, highly confidential data such as PIN numbers are stored in the CP.
An IC card characterized in that data is stored in a memory within a U-chip, less confidential data is stored in the memory chip, and highly confidential data is read out via a CPU. 2. When accessing memory in the CPU chip, use C
2. The IC card according to claim 1, wherein a buffer of a bus line connecting a PU chip and a memory chip is turned off or in a floating state.