JPS6320621U - - Google Patents
Info
- Publication number
- JPS6320621U JPS6320621U JP11182186U JP11182186U JPS6320621U JP S6320621 U JPS6320621 U JP S6320621U JP 11182186 U JP11182186 U JP 11182186U JP 11182186 U JP11182186 U JP 11182186U JP S6320621 U JPS6320621 U JP S6320621U
- Authority
- JP
- Japan
- Prior art keywords
- resistor
- input terminal
- resistance value
- fed back
- comparator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000005259 measurement Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Measurement Of Current Or Voltage (AREA)
Description
第１図および第２図はそれぞれ本考案の一実施
例を示す回路図、第３図は従来のコンパレータの
一例を示す回路図である。
１……測定信号入力端子、２……第１の抵抗器
、３……演算増幅器、４……第２の抵抗器、５…
…非反転信号出力端子、６……反転信号出力端子
、７……第５の抵抗器、８……第６の抵抗器、９
……基準電圧入力端子、１０……第７の抵抗器、
１１……演算増幅器、１２……第３の抵抗器、１
３……第４の抵抗器、１４……信号源。
FIGS. 1 and 2 are circuit diagrams showing an embodiment of the present invention, and FIG. 3 is a circuit diagram showing an example of a conventional comparator. 1... Measurement signal input terminal, 2... First resistor, 3... Operational amplifier, 4... Second resistor, 5...
...Non-inverting signal output terminal, 6...Inverting signal output terminal, 7... Fifth resistor, 8... Sixth resistor, 9
...Reference voltage input terminal, 10...Seventh resistor,
11...Operation amplifier, 12...Third resistor, 1
3... Fourth resistor, 14... Signal source.
Claims (1)
抗器を介して測定信号の入力端子が接続されると
ともに抵抗値Ｒ２を有する第２の抵抗器を介して
共通電位点が接続され、他方の入力端子に抵抗値
Ｒ５を有する第５の抵抗器を介して出力信号が帰
還されるとともに抵抗値Ｒ６を有する第６の抵抗
器を介して基準電圧が加えられるコンパレータに
おいて、 前記演算増幅器の他方の入力端子と第５の抵抗
器と第６の抵抗器の接続点との間に、次式で算出
される抵抗値Ｒ７を有する第７の抵抗器が接続さ
れたことを特徴とするコンパレータ。 Ｒ７＝（Ｒ１・Ｒ２）／（Ｒ１＋Ｒ２）[Claims for Utility Model Registration] A measurement signal input terminal is connected to one input terminal via a first resistor having a resistance value R1 , and a second resistor having a resistance value R2 . A common potential point is connected to the other input terminal, and the output signal is fed back to the other input terminal via a fifth resistor having a resistance value R5 , and a reference voltage is fed back via a sixth resistor having a resistance value R6 . is added, a seventh resistor having a resistance value R7 calculated by the following formula between the other input terminal of the operational amplifier and the connection point of the fifth resistor and the sixth resistor. A comparator characterized in that a device is connected to the comparator. R 7 = (R 1 · R 2 )/(R 1 +R 2 )
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11182186U JPS6320621U (en) | 1986-07-21 | 1986-07-21 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11182186U JPS6320621U (en) | 1986-07-21 | 1986-07-21 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6320621U true JPS6320621U (en) | 1988-02-10 |
Family
ID=30992104
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11182186U Pending JPS6320621U (en) | 1986-07-21 | 1986-07-21 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6320621U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5115358A (en) * | 1974-07-10 | 1976-02-06 | Ibm |
-
1986
- 1986-07-21 JP JP11182186U patent/JPS6320621U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5115358A (en) * | 1974-07-10 | 1976-02-06 | Ibm |
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