JPS6320047B2 - - Google Patents
Info
- Publication number
- JPS6320047B2 JPS6320047B2 JP15833279A JP15833279A JPS6320047B2 JP S6320047 B2 JPS6320047 B2 JP S6320047B2 JP 15833279 A JP15833279 A JP 15833279A JP 15833279 A JP15833279 A JP 15833279A JP S6320047 B2 JPS6320047 B2 JP S6320047B2
- Authority
- JP
- Japan
- Prior art keywords
- output
- tap
- input
- adder
- multiplication block
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000005070 sampling Methods 0.000 claims description 5
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000001914 filtration Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H17/00—Networks using digital techniques
- H03H17/02—Frequency selective networks
- H03H17/04—Recursive filters
- H03H17/0416—Recursive filters with input-sampling frequency and output-delivery frequency which differ, e.g. extrapolation; Anti-aliasing
- H03H17/0427—Recursive filters with input-sampling frequency and output-delivery frequency which differ, e.g. extrapolation; Anti-aliasing characterized by the ratio between the input-sampling and output-delivery frequencies
- H03H17/0438—Recursive filters with input-sampling frequency and output-delivery frequency which differ, e.g. extrapolation; Anti-aliasing characterized by the ratio between the input-sampling and output-delivery frequencies the ratio being integer
- H03H17/0444—Recursive filters with input-sampling frequency and output-delivery frequency which differ, e.g. extrapolation; Anti-aliasing characterized by the ratio between the input-sampling and output-delivery frequencies the ratio being integer where the output-delivery frequency is higher than the input sampling frequency, i.e. interpolation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H2218/00—Indexing scheme relating to details of digital filters
- H03H2218/06—Multiple-input, multiple-output [MIMO]; Multiple-input, single-output [MISO]
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Mathematical Physics (AREA)
- Transmission Systems Not Characterized By The Medium Used For Transmission (AREA)
- Filters That Use Time-Delay Elements (AREA)
Description
【発明の詳細な説明】 本発明はサンプル値補間フイルタに関する。[Detailed description of the invention] The present invention relates to sample value interpolation filters.
デイジタルフイルタのハードウエアは乗算器の
占める部分が多く、単位時間当りの乗算量低減が
要求される。サンプルレート変換や、狭帯域信号
をフイルタリングするための実現方法として、従
来は非再帰型デイジタルフイルタ(以下NRFと
略称する)が用いられていた。その理由を以下に
述べる。 A large portion of the hardware of a digital filter is occupied by a multiplier, and a reduction in the amount of multiplication per unit time is required. Conventionally, a non-recursive digital filter (hereinafter abbreviated as NRF) has been used to implement sample rate conversion and narrowband signal filtering. The reason for this is explained below.
NRFは、再帰型デイジタルフイルタ(以下RF
と略称する。)と比較して同一特性のフイルタを
得るのに多くの次数を必要とするが、NRFは低
サンプリングレートで動作させることが可能であ
るのに対し、RFは高サンプリングレートで動作
させなければならず単位時間当りの乗算量を比較
すると、NRFの方が小さくなるという利点を持
つているからである。 NRF is a recursive digital filter (RF
It is abbreviated as. ), but NRF can be operated at a low sampling rate, whereas RF must be operated at a high sampling rate. This is because NRF has the advantage of being smaller when comparing the amount of multiplication per unit time.
しかしながら例えばデルタ変調信号とPCM信
号との相互変換を考えると、そのフイルタ特性
は、かなり厳しいもの(帯域内リツプル:±
0.2dB、帯域外減衰量:40dB以上程度)が要求さ
れるから、従来のようにNRFで実現するために
はフイルタ次数を多く必要としハードウエア規模
が増加する欠点があつた。 However, when considering mutual conversion between a delta modulation signal and a PCM signal, for example, the filter characteristics are quite severe (in-band ripple: ±
0.2 dB, out-of-band attenuation: about 40 dB or more), so in order to implement it with NRF as in the past, it required a large number of filter orders and the hardware scale increased.
そこで本発明の目的は従来に比べて単位時間当
りの乗算回数が少なく、従つてハードウエア規模
の小さいサンプル値補間フイルタを提供すること
にある。 SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a sample value interpolation filter that requires fewer multiplications per unit time than the conventional filter and therefore requires a smaller hardware scale.
また本発明の他の目的は時分割多重処理に適し
たサンプル値補間フイルタを提供することにあ
る。 Another object of the present invention is to provide a sample value interpolation filter suitable for time division multiplexing.
前に述べたようにRFは高サンプルレートで動
作させる必要があるので、次数はNRFと比べて
小さいけれども単位時間当りの乗算量が多い。し
かしながら(1)式のような伝達関数H(Z)をもつ
RFで構成すればサンプリングレートの低減又は
増加を乗算量低減に直接反映させることが可能な
NRFの利点と、フイルタ次数の低減に有用なRF
の利点を兼ね備えたものとなりハードウエア規模
を小さくすることが可能となる。 As mentioned earlier, RF needs to operate at a high sample rate, so although the order is smaller than NRF, the amount of multiplication per unit time is large. However, it has a transfer function H(Z) as shown in equation (1).
If configured with RF, it is possible to directly reflect the reduction or increase in sampling rate in reducing the amount of multiplication.
Advantages of NRF and RF useful for reducing filter order
It has the following advantages, and it is possible to reduce the hardware scale.
H(Z)=a0Z0+a1Z-1+a2Z-2+…+anZ-m/1+b1Z-K
+b2Z-2 H(Z)=a 0 Z 0 +a 1 Z -1 +a 2 Z -2 +...+a n Z -m /1+b 1 Z -K
+b 2 Z -2
Claims (1)
チヤネル時分割多重信号を入力とする入力段加算
器と、前記入力段加算器の出力信号を受けるタツ
プ付遅延素子と、複数個の乗算器とこれらの出力
信号を受ける加算器とから成る分母係数乗算ブロ
ツクと、複数個の乗算器とこれらの出力信号を受
ける加算器とから成る分子係数乗算ブロツクK
(但しKは2以上の整数)組と、前記K組の分子
係数乗算ブロツクの加算器の出力信号を共に入力
とし各々時分割にK個の入力信号のうち1個を選
択するK個の選択回路とを備え、前記タツプ付遅
延素子の隣接タツプ間の遅延量を同一となるよう
構成し、各タツプ出力を1から順番に番号を付与
すると同時に前記タツプ付遅延素子の入力を第0
番目のタツプ出力とした時、前記分母係数乗算ブ
ロツク内の複数個の乗算器はそれぞれ前記タツプ
付遅延素子の第K・i(但しi=1、2、3…)
番目のタツプ出力の信号を受けると共に前記分母
係数乗算ブロツク内の加算器の出力信号を前記入
力段加算器に入力し、前記K組の分子係数乗算ブ
ロツクを1、2、…、Kと番号付けした時第k
(但しk=1、2、…、K)番目の分子係数乗算
ブロツク内の複数個の乗算器はそれぞれ前記タツ
プ付遅延素子の第{K(i−1)+k−1}番目の
タツプ出力の信号を受けるように構成し前記K個
の選択回路出力において、それぞれサンプリング
周波数K・fsのlチヤネル時分割多重信号を得る
ようにしたことを特徴とするサンプル値補間フイ
ルタ。1 l of sampling frequency fs (l is a positive integer)
a denominator coefficient comprising an input stage adder receiving a channel time division multiplexed signal as input, a delay element with a tap receiving the output signal of the input stage adder, a plurality of multipliers and an adder receiving the output signals thereof; A numerator coefficient multiplication block K consisting of a multiplication block, a plurality of multipliers, and an adder that receives their output signals.
(where K is an integer of 2 or more) and the output signal of the adder of the numerator coefficient multiplication block of the K set are both input, and each selects one of the K input signals in a time-sharing manner. circuit, configured so that the amount of delay between adjacent taps of the delay element with taps is the same, and at the same time assigns a number to each tap output sequentially starting from 1, and at the same time assigns a number to the input of the delay element with taps.
When the tap output is the K.sup.th tap output, each of the plurality of multipliers in the denominator coefficient multiplication block is the K.sub.ith tap output (where i=1, 2, 3, etc.) of the tap delay element.
While receiving the signal of the tap output, the output signal of the adder in the denominator coefficient multiplication block is input to the input stage adder, and the K sets of numerator coefficient multiplication blocks are numbered 1, 2, ..., K. kth when
(However, the plurality of multipliers in the numerator coefficient multiplication block of k=1, 2, ..., K) are respectively configured to output the {K(i-1)+k-1}th tap output of the delay element with taps. A sample value interpolation filter, characterized in that it is configured to receive a signal, and is configured to obtain l-channel time-division multiplexed signals each having a sampling frequency of K·fs at the outputs of the K selection circuits.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15833279A JPS5680916A (en) | 1979-12-06 | 1979-12-06 | Interpolating filter for sampled value |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15833279A JPS5680916A (en) | 1979-12-06 | 1979-12-06 | Interpolating filter for sampled value |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5680916A JPS5680916A (en) | 1981-07-02 |
JPS6320047B2 true JPS6320047B2 (en) | 1988-04-26 |
Family
ID=15669321
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15833279A Granted JPS5680916A (en) | 1979-12-06 | 1979-12-06 | Interpolating filter for sampled value |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5680916A (en) |
-
1979
- 1979-12-06 JP JP15833279A patent/JPS5680916A/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS5680916A (en) | 1981-07-02 |
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